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STFI11N65M2

STFI11N65M2

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO262-3

  • 描述:

    MOSFET N-CH 650V 7A I2PAKFP

  • 数据手册
  • 价格&库存
STFI11N65M2 数据手册
STF11N65M2 Datasheet N-channel 650 V, 0.60 Ω typ., 7 A MDmesh M2 Power MOSFET in a TO-220FP package Features 1 2 3 TO-220FP D(2) Order code VDS RDS(on) max. ID PTOT STF11N65M2 650 V 0.68 Ω 7A 25 W • • Extremely low gate charge Excellent output capacitance (COSS) profile • • 100% avalanche tested Zener-protected Applications • Switching applications G(1) Description S(3) NG1D2S3Z This device is an N-channel Power MOSFET developed using MDmesh M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. Product status link STF11N65M2 Product summary Order code STF11N65M2 Marking 11N65M2 Package TO-220FP Packing Tube DS10136 - Rev 3 - June 2019 For further information contact your local STMicroelectronics sales office. www.st.com STF11N65M2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol VGS Parameter Gate-source voltage Value Unit ±25 V Drain current (continuous) at TC = 25 °C 7 Drain current (continuous) at TC = 100 °C 4.4 IDM(2) Drain current (pulsed) 28 A PTOT Total power dissipation at TC = 25 °C 25 W dv/dt(3) Peak diode recovery voltage slope 15 dv/dt(4) MOSFET dv/dt ruggedness 50 VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s, TC = 25 °C) 2.5 kV Tstg Storage temperature range -55 to 150 °C Value Unit ID(1) TJ Operating junction temperature range A V/ns 1. Limited by maximum junction temperature. 2. Pulse width limited by TJ max. 3. ISD ≤ 7 A, di/dt = 400 A/μs, VDS (peak) < V(BR)DSS, VDD = 400 V. 4. VDS ≤ 520 V. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient 5 62.5 °C/W Table 3. Avalanche characteristics Symbol DS10136 - Rev 3 Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by TJ max) 1.5 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 110 mJ page 2/12 STF11N65M2 Electrical characteristics 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage Min. VGS = 0 V, ID = 1 mA Typ. 650 Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 3.5 A VGS = 0 V, VDS = 650 V, TC = 125 Unit V VGS = 0 V, VDS = 650 V IDSS Max. 1 °C(1) 100 µA ±10 µA 3 4 V 0.60 0.68 Ω Min. Typ. Max. Unit - 410 - - 20 - - 0.9 - 2 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Reverse transfer capacitance (1) pF Equivalent output capacitance VDS = 0 to 520 V, VGS = 0 V - 43 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 6.4 - Ω Qg Total gate charge - 12.5 - Qgs Gate-source charge - 3.2 - Qgd Gate-drain charge - 5.8 - Coss eq. VDD = 520 V, ID = 7 A, VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS10136 - Rev 3 Parameter Test conditions Min. Typ. Max. Turn-on delay time VDD = 325 V, ID = 3.5 A, - 9.5 - Rise time RG = 4.7 Ω, VGS = 10 V - 7.5 - Turn-off delay time (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) - 26 - - 15 - Fall time Unit ns page 3/12 STF11N65M2 Electrical characteristics Table 7. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 7 A ISDM (1) Source-drain current (pulsed) - 28 A VSD (2) Forward on voltage - 1.6 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Qrr IRRM VGS = 0 V, ISD = 7 A - 318 ns (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 2.5 µC - 15.5 A Reverse recovery time ISD = 7 A, di/dt = 100 A/µs, - 437 ns Reverse recovery charge VDD = 60 V, TJ = 150 °C - 3.2 µC Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 15 A ISD = 7 A, di/dt = 100 A/µs, VDD = 60 V 1. Pulse width is limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DS10136 - Rev 3 page 4/12 STF11N65M2 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 2. Thermal impedance Figure 1. Safe operating area ID (A) 101 K GIPG080915MQF1045YFSOA GC20940 Operation in this area is limited by RDS(on) 10 μs 10-1 100 μs 100 1 ms 10-2 10 ms 10-1 10-2 10-1 100 Tj ≤ 150 °C Tc = 25 °C single pulse 101 VDS (V) 102 10-3 10-4 Figure 3. Output characteristics ID (A) ID (A) GIPG110515MQF1LOCH VGS = 7 V 10-1 tp (s) 100 GIPG110515MQF1LTCH 12 10 VDS = 19 V 10 VGS = 6 V 8 8 6 6 4 4 2 0 0 4 8 12 VGS = 5 V 2 16 0 0 VDS (V) Figure 5. Gate charge vs gate-source voltage GIPG110515MQF1LQVG VDS VGS (V) 12 10-2 Figure 4. Transfer characteristics VGS = 8,9,10 V 12 10-3 (V) VDS 4 500 8 400 6 300 4 200 2 100 6 8 VGS (V) Figure 6. Static drain-source on-resistance RDS(on) (Ω) GIPG140815MQF1PRID 600 VDD = 520 V ID = 7 A 10 2 VGS = 10 V 0.624 0.608 0 0 DS10136 - Rev 3 2 4 6 8 10 12 0 Qg (nC) 0.592 0.576 0 2 4 6 ID (A) page 5/12 STF11N65M2 Electrical characteristics (curves) Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations C (pF) GIPG140815MQF1PCVR VGS(th) (norm.) GIPG110515MQF1LVTH ID = 250 µA 1.1 103 CISS 1.0 102 COSS 101 0.9 0.8 f = 1 MHz 100 10-1 10-1 100 CRSS 101 VDS (V) 102 Figure 9. Normalized on-resistance vs temperature RDS(on) (norm.) GIPG110515MQF1LRON VGS = 10 V 2.2 0.7 0.6 -75 1.00 1.0 0.96 0.6 0.92 75 125 Tj (°C) Figure 11. Output capacitance stored energy EOSS (μJ) GIPG110515MQF1LEOS 125 Tj (°C) GIPG110515MQF1LBDV ID = 1 mA 1.08 1.4 25 75 V(BR)DSS (norm.) 1.04 -25 25 Figure 10. Normalized V(BR)DSS vs temperature 1.8 0.2 -75 -25 0.88 -75 -25 25 75 125 Tj (°C) Figure 12. Source-drain diode forward characteristics VSD (V) GIPG140815MQF1PSDF Tj = -50 °C 3 1.0 2 0.8 1 0.6 Tj = 25 °C Tj = 150 °C 0 0 DS10136 - Rev 3 100 200 300 400 500 600 VDS (V) 0.4 0 2 4 6 ISD (A) page 6/12 STF11N65M2 Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS10136 - Rev 3 page 7/12 STF11N65M2 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 TO-220FP package information Figure 19. TO-220FP package outline 7012510_Rev_13_B DS10136 - Rev 3 page 8/12 STF11N65M2 TO-220FP package information Table 8. TO-220FP package mechanical data Dim. mm Min. Max. A 4.40 4.60 B 2.50 2.70 D 2.50 2.75 E 0.45 0.70 F 0.75 1.00 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.20 G1 2.40 2.70 H 10.00 10.40 L2 DS10136 - Rev 3 Typ. 16.00 L3 28.60 30.60 L4 9.80 10.60 L5 2.90 3.60 L6 15.90 16.40 L7 9.00 9.30 Dia 3.00 3.20 page 9/12 STF11N65M2 Revision history Table 9. Document revision history Date Revision 09-May-2014 1 Changes First release. Text and formatting changes throughout document. On cover page: - updated Title and Features 08-Sep-2015 2 In section Electrical characteristics: - updated and renamed table Static (was On /off states) Updated section Electrical characteristics (curves) Updated and renamed section Package information (was Package mechanical data) The part number STFI11N65M2 have been moved to a separate datasheet and the document has been updated accordingly. 26-Jun-2019 3 Updated Section 1 Electrical ratings and Section 2 Electrical characteristics. Minor text changes. DS10136 - Rev 3 page 10/12 STF11N65M2 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 DS10136 - Rev 3 page 11/12 STF11N65M2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS10136 - Rev 3 page 12/12
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