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STFI15N60M2-EP

STFI15N60M2-EP

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO262-3

  • 描述:

    MOSFET N-CH 600V 11A I2PAKFP

  • 数据手册
  • 价格&库存
STFI15N60M2-EP 数据手册
STF15N60M2-EP, STFI15N60M2-EP N-channel 600 V, 0.340 Ω typ., 11 A MDmesh™ M2 EP Power MOSFET in TO-220FP and I²PAKFP packages Datasheet - production data      TO-220FP Extremely low gate charge Excellent output capacitance (COSS) profile Very low turn-off switching losses 100% avalanche tested Zener-protected Applications I2PAKFP (TO-281)   Switching applications Tailored for very high frequency converters (f > 150 kHz) Figure 1: Internal schematic diagram Description D(2) These devices are N-channel Power MOSFETs developed using MDmesh™ M2 EP enhanced performance technology. Thanks to their strip layout and improved vertical structure, the devices exhibit low on-resistance and optimized switching characteristics with very low turn-off switching loss, rendering them suitable for the most demanding very high frequency converters. G(1) Table 1: Device summary Order code STF15N60M2-EP S(3) AM01476v1 STFI15N60M2-EP Marking Package Packaging TO-220FP 15N60M2EP I²PAKFP (TO-281) Tube Features Order code STF15N60M2-EP STFI15N60M2-EP January 2015 VDS@TJmax RDS(on)max. ID 650 V 0.378 Ω 11 A DocID027373 Rev 1 This is information on a product in full production. 1/15 www.st.com Contents STF15N60M2-EP, STFI15N60M2-EP Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package mechanical data ............................................................... 9 5 2/15 4.1 TO-220FP package information ...................................................... 10 4.2 I²PAKFP (TO-281) package information ......................................... 12 Revision history ............................................................................ 14 DocID027373 Rev 1 STF15N60M2-EP, STFI15N60M2-EP 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit ± 25 V VGS Gate-source voltage (1) ID Drain current (continuous) at TC = 25 °C 11 A (1) ID Drain current (continuous) at TC = 100 °C 7 A (2) IDM Drain current (pulsed) 44 A PTOT Total dissipation at TC = 25 °C 25 W dv/dt (3) Peak diode recovery voltage slope 15 V/ns dv/dt (4) MOSFET dv/dt ruggedness 50 V/ns 2500 V - 55 to 150 °C Value Unit 5 °C/W 62.5 °C/W Value Unit VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s,TC = 25 °C) Tstg Storage temperature Tj Operating junction temperature Notes: (1) (2) Limited by maximum junction temperature. Pulse width limited by safe operating area. (3) ISD ≤ 11 A, di/dt ≤ 400 A/µs; VDS peak < V(BR)DSS, VDD = 400 V. (4) VDS ≤ 480 V. Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max Table 4: Avalanche characteristics Symbol Parameter IAR Avalanche current, repetetive or not repetetive (pulse width limited by Tjmax) 2.8 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR; VDD = 50 V) 125 mJ DocID027373 Rev 1 3/15 Electrical characteristics 2 STF15N60M2-EP, STFI15N60M2-EP Electrical characteristics TC = 25 °C unless otherwise specified Table 5: On/off states Symbol Parameter V(BR)DSS Drain-source breakdown voltage IDSS Zero gate voltage drain current IGSS Test conditions Min. VGS = 0 V, ID = 1 mA 600 Typ. Max. Unit V VGS = 0 V, VDS = 600 V 1 µA VGS = 0 V, VDS = 600 V TC = 125 °C 100 µA Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 5.5 A 0.340 0.378 Ω Min. Typ. Max. Unit - 590 - pF - 30 - pF - 1.1 - pF 2 Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Test conditions VDS= 100 V,f = 1 MHz, VGS = 0 V Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 148 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 7 - Ω Qg Total gate charge - 17 - nC Qgs Gate-source charge - 3.1 - nC Qgd Gate-drain charge VDD = 480 V, ID = 11 A, VGS = 10 V (see Figure 15: "Gate charge test circuit") - 7.3 - nC Coss eq. (1) Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when VDS increases from 0 to 80% VDSS. Table 7: Switching energy Symbol E(off) 4/15 Parameter Test conditions Turn-off energy (from 90% VGS to 0% ID) Min. Typ. Max. Unit VDD = 400 V, ID = 1.5 A RG = 4.7 Ω, VGS = 10 V - 4.7 - µJ VDD = 400 V, ID = 3.5 A RG = 4.7 Ω, VGS = 10 V - 5.2 - µJ DocID027373 Rev 1 STF15N60M2-EP, STFI15N60M2-EP Electrical characteristics Table 8: Switching times Symbol td(on) tr Parameter Turn-on delay time Rise time td(off) tf Turn-off-delay time Fall time Test conditions Min. Typ. Max. Unit VDD = 300 V, ID = 5.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Switching times test circuit for resistive load" and Figure 19: "Switching time waveform" ) - 11 - ns - 10 - ns - 40 - ns - 15 - ns Min. Typ. Max. Unit Table 9: Source drain diode Symbol (1) ISD (2) ISDM VSD (3) Parameter Test conditions Source-drain current - 11 A Source-drain current (pulsed) - 44 A 1.6 V Forward on voltage VGS = 0 V, I = 11 A - trr Reverse recovery time - 280 ns Qrr Reverse recovery charge - 2.7 µC IRRM Reverse recovery current ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: " Test circuit for inductive load switching and diode recovery times" ) - 19.5 A ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: " Test circuit for inductive load switching and diode recovery times") - 400 ns - 3.8 µC - 19 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1) (2) (3) Limited by maximum junction temperature. Pulse width is limited by safe operating area. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. DocID027373 Rev 1 5/15 Electrical characteristics 2.1 STF15N60M2-EP, STFI15N60M2-EP Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance GC20940 GIPG200120151046MT ID (A) K 10 is ea n) ar DS(o is th R x in n ma tio by ra pe ed O mit Li 1 10 -1 10µs 100µs 1ms 10ms 10 -2 0.1 Tj=150°C Tc=25°C Single pulse 0.01 0.1 1 10 10 -3 10 -4 V DS(V) 100 Figure 4: Output characteristics 10 -1 10 0 T p(s) GIPG121220141419MT ID (A) ID(A) V GS=7, 8, 9, 10V V DS=17V 6V 20 20 15 5V 10 10 4V 5 5 0 0 0 4 8 12 16 V DS(V) Figure 6: Normalized gate threshold voltage vs temperature VGS(th) (norm) 0 GIPG181120141615ALS 4 V(BR)DSS 6 8 V GS(V) GIPG191120141457ALS (norm) 1.08 ID = 250 µA 1.0 1.04 0.9 1.00 0.8 0.96 0.7 0.6 -75 2 Figure 7: Normalized V(BR)DSS vs temperature 1.1 6/15 10 -2 Figure 5: Transfer characteristics GIPG121220141416MT 15 10 -3 ID = 1mA 0.92 -25 25 75 125 TJ(°C) DocID027373 Rev 1 0.88 -75 -25 25 75 125 TJ(°C) STF15N60M2-EP, STFI15N60M2-EP Electrical characteristics Figure 8: Static drain-source on-resistance GIPG121220141431MT R DS(on) (Ω) V GS=10V Figure 9: Normalized on-resistance vs temperature GIPG181120141628ALS RDS(on) (norm) 2.2 0.360 1.8 VGS = 10 V 0.350 1.4 0.340 1.0 0.6 0.330 0.2 -75 0.320 0 2 4 6 10 8 Figure 10: Gate charge vs gate-source voltage GIPG121220141425MT V DS V GS (V) (V) V DD=480V ID=11A 12 25 -25 75 TJ(°C) 125 ID(A) Figure 11: Capacitance variations GIPG121220141441MT C (pF) 600 1000 10 V DS Ciss 500 8 400 6 300 100 Coss 10 4 200 2 100 1 0 Q g(nC) 0.1 0 0 16 12 8 4 Figure 12: Turn-off switching loss vs drain current Crss 0.1 1 10 100 Figure 13: Source-drain diode forward characteristic GIPG161220141014MT GIPG121220141453MT E off (µJ) V DS(V) V SD(V) 1.1 5.4 VDD=400V, RG=4,7Ω,VGS=10V T J=-50°C 1 5.2 0.9 T J=25°C 5 0.8 4.8 T J=150°C 0.7 4.6 4.4 0.5 0.6 0.5 1 1.5 2 2.5 3 3.5 ID(A) DocID027373 Rev 1 0 2 4 6 8 10 ISD(A) 7/15 Test circuits 3 STF15N60M2-EP, STFI15N60M2-EP Test circuits Figure 15: Gate charge test circuit Figure 14: Switching times test circuit for resistive load VDD 47 k Ω 12 V 1 kΩ 100 nF I G = CONST Vi ≤ V GS 100 Ω D.U.T. VG 2.7 k Ω 2200 μ F 47 k Ω PW 1 kΩ AM01469v 1 Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform t on t d(on) V(BR)DSS t off tr t d(off) tf VD 90% 90% 10% I DM 10% 0 VDS ID VDD VGS VDD 0 AM01472v 1 8/15 DocID027373 Rev 1 10% 90% AM01473v 1 STF15N60M2-EP, STFI15N60M2-EP 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. DocID027373 Rev 1 9/15 Package mechanical data 4.1 STF15N60M2-EP, STFI15N60M2-EP TO-220FP package information Figure 20: TO-220FP package outline 10/15 DocID027373 Rev 1 STF15N60M2-EP, STFI15N60M2-EP Package mechanical data Table 10: TO-220FP mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID027373 Rev 1 11/15 Package mechanical data 4.2 STF15N60M2-EP, STFI15N60M2-EP I²PAKFP (TO-281) package information Figure 21: I²PAKFP (TO-281) package outline 8291506 Re v. C 12/15 DocID027373 Rev 1 STF15N60M2-EP, STFI15N60M2-EP Package mechanical data Table 11: I²PAKFP (TO-281) mechanical data mm Dim. Min. Typ. Max. A 4.40 - 4.60 B 2.50 2.70 D 2.50 2.75 D1 0.65 0.85 E 0.45 0.70 F 0.75 1.00 F1 1.20 G 4.95 5.20 H 10.00 10.40 L1 21.00 23.00 L2 13.20 14.10 L3 10.55 10.85 L4 2.70 3.20 L5 0.85 1.25 L6 7.50 DocID027373 Rev 1 7.60 7.70 13/15 Revision history 5 STF15N60M2-EP, STFI15N60M2-EP Revision history Table 12: Document revision history 14/15 Date Revision 26-Jan-2015 1 DocID027373 Rev 1 Changes First release. STF15N60M2-EP, STFI15N60M2-EP IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID027373 Rev 1 15/15
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