STFI20NM65N

STFI20NM65N N-channel 650 V, 15 A, 0.250 Ω typ., MDmesh™ II Power MOSFET in a I²PAKFP package Datasheet - production data Features Order code VDSS @Tjmax RDS(on) max. ID STFI20NM65N 710 V 0.270 Ω 15 A • 100% avalanche tested • Low input capacitance and gate charge • Low gate input resistance 1 2 I 2PAKFP 3 Applications (TO-281) • Switching applications Figure 1. Internal schematic diagram Description This device is an N-channel Power MOSFET developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. ' * 6 $0Y Table 1. Device summary Order code Marking Packages Packaging STFI20NM65N 20NM65N I2PAKFP (TO-281) Tube December 2013 This is information on a product in full production. DocID025737 Rev 1 1/12 www.st.com Contents STFI20NM65N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 .............................................. 8 DocID025737 Rev 1 STFI20NM65N 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain source voltage 650 V VGS Gate source voltage ± 25 V (1) ID Drain current continuous TC =25 °C 15 A ID Drain current continuous TC =100 °C 9.45 A Drain current pulsed 60 A Total dissipation at TC=25 °C 30 W Peak diode recovery voltage slope 15 V/ns 2500 V -55 to 150 150 °C Value Unit IDM (2) PTOT dv/dt (3) VISO Insulation withstand voltage (RMS) from all three leads to external heatsink (t=1 s; TC = 25 °C) Tstg TJ Storage temperature Max. operating junction temperature 1. Limited only by maximum temperature allowed. 2. Pulse width limited by safe operating area. 3. ISD ≤ 15 A, di/dt ≤ 400 A/μs, VDS peak ≤ V(BR)DSS, VDD = 80% V(BR)DSS. Table 3. Thermal data Symbol Parameters Rthjc Thermal resistance junction-case max. 4.17 °C/W Rthja Thermal resistance junction-ambient max. 62.5 °C/W Value Unit Table 4. Avalanche characteristics Symbol Parameters IAS Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) 4 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 115 mJ DocID025737 Rev 1 3/12 12 Electrical characteristics 2 STFI20NM65N Electrical characteristics (TC = 25 °C unless otherwise specified). Table 5. On/off states Symbol Parameter Test conditions V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 Min. Typ. Max. Unit 650 V 1 μA VDS = 650 V, TC=0 100 μA Gate body leakage (VDS=0) VGS= ±25 V, VDS=0 100 nA VGS(th) Gate threshold voltage ID = 250 μA, VGS =VDS 4 V RDS(on) Static drain-source on- resistance ID=7.5 A, VGS=10 V lDSS lGSS Zero gate voltage drain current (VGS=0) VDS = 650 V 2 3 Ω 0.250 0.270 Table 6. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse capacitance Test conditions VDS = 50 V, f = 1MHz, VGS = 0 Min. Typ. Max. Unit - 1280 - pF - 110 - pF - 10 - pF Equivalent output capacitance VDS = 0 to VGS = 0 - 260 - pF RG Intrinsic gate resistance f = 1MHz, ID=0 - 4.8 - Ω Qg Total gate charge - 44 - nC Qgs Gate source charge - 8 - nC Qgd Gate-drain charge - 22 - nC Coss eq (1) VDD = 520 V, ID = 15 A, VGS = 10 V (see Figure 14) 1. Coss eq: defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80 % VDSS. Table 7. Switching times Symbol td(on) tr td(off) tf 4/12 Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions VDD = 325 V, ID=7.5 A Rg=4.7 Ω, VGS=10 V (see Figure 13) (see Figure 18) DocID025737 Rev 1 Min. Typ. Max. Unit - 15 - ns - 13.5 - ns - 75 - ns - 21 - ns STFI20NM65N Electrical characteristics Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source drain current - 15 A ISDM (1) Source drain current (pulsed) - 60 A VSD (2) Forward on voltage - 1.6 V ISD = 15 A, VGS = 0 trr Reverse recovery time Qrr I = 15 A, di/dt = 100 A/μs Reverse recovery charge SD VDD = 60 V (see Figure 15) Reverse recovery current IRRM trr Qrr IRRM - 455 ns - 5.5 μC - 24.5 A Reverse recovery time - 710 ns ISD =15 A, di/dt = 100 A/μs Reverse recovery charge VDD = 60 V, Tj = 150 °C (see Figure 15) Reverse recovery current - 8 μC - 24 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5 %. DocID025737 Rev 1 5/12 12 Electrical characteristics 2.1 STFI20NM65N Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM09139v1 ID (A) on ) D S( O p Li er m at ite io d ni by n m this ax a R rea is Tj=150°C Tc=25°C Single pulse 10 10µs 100µs 1ms 10ms 1 0.1 0.1 10 1 VDS(V) 100 Figure 4. Output characteristics Figure 5. Transfer characteristics AM09140v1 ID (A) 35 VGS=10V AM09141v1 ID (A) VDS=19V 35 30 30 6V 25 25 20 20 15 15 10 10 5V 5 0 0 5 5 10 15 4V 20 VDS(V) Figure 6. Normalized V(BR)DSS vs temperature AM09028v1 V(BR)DSS (norm) ID=1mA 1.10 0 0 2 4 6 8 10 VGS(V) Figure 7. Static drain-source on-resistance AM09143v1 RDS(on) (Ω) VGS=10V 0.260 1.08 1.06 0.255 1.04 0.250 1.02 1.00 0.245 0.98 0.96 0.94 0.92 -50 -25 6/12 0.240 0 25 50 75 100 TJ(°C) 0.235 0 DocID025737 Rev 1 2 4 6 8 10 12 14 ID(A) STFI20NM65N Electrical characteristics Figure 8. Gate charge vs gate-source voltage AM09144v1 VGS (V) VDS VDS (V) VDD=520V ID=15A 12 Figure 9. Capacitance variations AM09145v1 C (pF) 500 Ciss 1000 10 400 8 300 100 6 Coss 200 4 10 Crss 100 2 0 0 20 10 40 30 1 0.1 0 50 Qg(nC) Figure 10. Normalized gate threshold voltage vs temperature AM09146v1 VGS(th) (norm) 1 10 100 VDS(V) Figure 11. Normalized on-resistance vs temperature AM09147v1 RDS(on) (norm) ID=250µA 1.10 2.1 ID=7.5A VGS=10V 1.9 1.00 1.7 1.5 1.3 0.90 1.1 0.9 0.80 0.7 0.70 -50 -25 0 25 75 100 50 TJ(°C) 0.5 -50 -25 0 25 50 75 100 TJ(°C) Figure 12. Source-drain diode forward characteristics AM09148v1 VSD (V) 1.6 TJ=-50°C 1.4 TJ=25°C 1.2 TJ=150°C 1.0 0.8 0.6 0.4 0.2 0 2 4 6 8 10 12 14 16 ISD(A) DocID025737 Rev 1 7/12 12 Test circuits 3 STFI20NM65N Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/12 0 DocID025737 Rev 1 10% AM01473v1 STFI20NM65N 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID025737 Rev 1 9/12 12 Package mechanical data STFI20NM65N Figure 19. I2PAKFP (TO-281) drawing ĆUHY$ Table 9. I2PAKFP (TO-281) mechanical data mm Dim. Min. Typ. A 4.40 4.60 B 2.50 2.70 D 2.50 2.75 D1 0.65 0.85 E 0.45 0.70 F 0.75 1.00 F1 10/12 Max. 1.20 G 4.95 H 10.00 10.40 L1 21.00 23.00 L2 13.20 14.10 L3 10.55 10.85 L4 2.70 3.20 L5 0.85 1.25 L6 7.30 7.50 - DocID025737 Rev 1 5.20 STFI20NM65N 5 Revision history Revision history Table 10. Revision history Date Revision 20-Dec-2013 1 Changes Initial release. DocID025737 Rev 1 11/12 12 STFI20NM65N Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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