STFU10N80K5

STF10N80K5, STFU10N80K5 N-channel 800 V, 0.470 Ω typ., 9 A MDmesh™ K5 Power MOSFETs in a TO-220FP and TO-220FP ultra narrow leads Datasheet - production data Features VDS RDS(on) max. ID PTOT 800 V 0.600 Ω 9A 30 W Order code STF10N80K5 STFU10N80K5      Figure 1: Internal schematic diagram Industry’s lowest RDS(on) x area Industry’s best figure of merit (FoM) Ultra-low gate charge 100% avalanche tested Zener-protected Applications  Switching applications Description These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code STF10N80K5 STFU10N80K5 September 2016 Marking Package TO-220FP 10N80K5 TO-220FP ultra narrow leads DocID026564 Rev 5 This is information on a product in full production. Packing Tube 1/17 www.st.com Contents STF10N80K5, STFU10N80K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 11 5 2/17 4.1 TO-220FP package information ...................................................... 12 4.2 TO-220FP ultra narrow leads package information ......................... 14 Revision history ............................................................................ 16 DocID026564 Rev 5 STF10N80K5, STFU10N80K5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ± 30 V ID(1) Drain current (continuous) at TC = 25 °C 9 A ID(1) Drain current (continuous) at TC = 100 °C 6 A IDM(2) Drain current pulsed 36 A PTOT Total dissipation at TC = 25 °C 30 W IAR Max. current during repetitive or single pulse avalanche (pulse width limited by Tjmax.) 3 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAS, VDD = 50 V) 130 mJ VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C) 2500 V dv/dt (3) Peak diode recovery voltage slope 4.5 dv/dt (4) MOSFET dv/dt ruggedness 50 Tj Operating junction temperature range Tstg Storage temperature range - 55 to 150 V/ns °C Notes: (1)Limited (2)Pulse (3)I SD≤ (4)V DS by maximum junction temperature. width limited by safe operating area. 9 A, di/dt ≤ 100 A/μs; VDS peak ≤ V(BR)DSS ≤ 640 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 4.2 °C/W Rthj-amb Thermal resistance junction-ambient 62.5 °C/W DocID026564 Rev 5 3/17 Electrical characteristics 2 STF10N80K5, STFU10N80K5 Electrical characteristics TC = 25 °C unless otherwise specified Table 4: On/off-state Symbol Parameter V(BR)DSS Drain-source breakdown voltage Test conditions Min. VGS = 0 V, ID = 1 mA 800 Typ. Max. Unit V VGS = 0 V, VDS = 800 V 1 µA IDSS Zero gate voltage drain current VGS = 0 V, VDS = 800 V TC = 125 °C (1) 50 µA IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 4.5 A 0.470 0.600 Ω 3 Notes: (1)Defined by design, no subject to production test. Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Equivalent capacitance time related Min. Typ. Max. Unit - 635 - pF - 53 - pF - 0.8 - pF - 85 - pF 34 - pF VDS = 0 to 640 V, VGS = 0 V Co(er)(2) Equivalent capacitance energy related Rg Intrinsic gate resistance f = 1 MHz , ID = 0 A - 6 - Ω Qg Total gate charge - 22 - nC Qgs Gate-source charge - 5.5 - nC Qgd Gate-drain charge VDD = 640 V, ID = 9 A VGS = 10 V See Figure 16: "Test circuit for gate charge behavior" - 13.2 - nC Notes: (1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when V DS increases from 0 to 80% VDSS. (2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS. 4/17 DocID026564 Rev 5 STF10N80K5, STFU10N80K5 Electrical characteristics Table 6: Switching times Symbol Parameter Test conditions Turn-on delay time td(on) tr Rise time td(off) Turn-off delay time tf VDD = 400 V, ID = 4.5 A, RG = 4.7 Ω VGS = 10 V See Figure 15: "Test circuit for resistive load switching times" and Figure 20: "Switching time waveform" Fall time Min. Typ. Max. Unit - 14.5 - ns - 11 - ns - 35 - ns - 14 - ns Min. Typ. Max. Unit Table 7: Source-drain diode Symbol Parameter Test conditions Source-drain current - 9 A ISDM(1) Source-drain current (pulsed) - 36 A VSD(2) Forward on voltage - 1.5 V ISD ISD = 9 A, VGS = 0 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current - 370 ns VDD = 60 V, see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 4.58 µC - 25 A - 520 ns - 5.88 µC - 22.5 A Test conditions Min Typ. Max Unit IGS = ± 1 mA, ID = 0 A 30 - - V ISD = 9 A, di/dt = 100 A/µs, trr Reverse recovery time ISD = 9 A, di/dt = 100 A/µs, Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V, Tj = 150 °C see Figure 17: "Test circuit for inductive load switching and diode recovery times" Notes: (1)Pulse width limited by safe operating area. (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. Table 8: Gate-source Zener diode Symbol V (BR)GSO Parameter Gate-source breakdown voltage The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. DocID026564 Rev 5 5/17 Electrical characteristics 2.1 6/17 STF10N80K5, STFU10N80K5 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics DocID026564 Rev 5 STF10N80K5, STFU10N80K5 Electrical characteristics Figure 6: Gate charge vs. gate-source voltage Figure 7: Static drain-source on-resistance Figure 8: Capacitance variations Figure 9: Source-drain diode forward characteristics Figure 10: Normalized gate threshold voltage vs. temperature Figure 11: Normalized on-resistance vs. temperature DocID026564 Rev 5 7/17 Electrical characteristics STF10N80K5, STFU10N80K5 Figure 12: Normalized V(BR)DSS vs. temperature Figure 13: Maximum avalanche energy vs. starting TJ Figure 14: Output capacitance stored energy 8/17 DocID026564 Rev 5 STF10N80K5, STFU10N80K5 3 Test circuits Test circuits Figure 16: Test circuit for gate charge behavior Figure 15: Test circuit for resistive load switching times Figure 17: Test circuit for inductive load switching and diode recovery times Figure 18: Unclamped inductive load test circuit DocID026564 Rev 5 9/17 Test circuits STF10N80K5, STFU10N80K5 Figure 19: Unclamped inductive waveform 10/17 DocID026564 Rev 5 Figure 20: Switching time waveform STF10N80K5, STFU10N80K5 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID026564 Rev 5 11/17 Package information 4.1 STF10N80K5, STFU10N80K5 TO-220FP package information Figure 21: TO-220FP package outline 12/17 DocID026564 Rev 5 STF10N80K5, STFU10N80K5 Package information Table 9: TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID026564 Rev 5 13/17 Package information 4.2 STF10N80K5, STFU10N80K5 TO-220FP ultra narrow leads package information Figure 22: TO-220FP ultra narrow leads package outline 8576148_1 14/17 DocID026564 Rev 5 STF10N80K5, STFU10N80K5 Package information Table 10: TO-220FP ultra narrow leads mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 B 2.50 2.70 D 2.50 2.75 E 0.45 0.60 F 0.65 0.75 F1 - 0.90 G 4.95 5.20 G1 2.40 H 10.00 10.40 L2 15.10 15.90 L3 28.50 30.50 L4 10.20 11.00 L5 2.50 3.10 L6 15.60 16.40 L7 9.00 9.30 L8 L9 3.20 3.60 - 1.30 Dia. 3.00 3.20 DocID026564 Rev 5 2.54 2.70 15/17 Revision history 5 STF10N80K5, STFU10N80K5 Revision history Table 11: Document revision history 16/17 Date Revision Changes 23-Jun-2014 1 First release. 13-Aug-2014 2 -Document status promoted from preliminary to production data. -Inserted Section 3: Electrical characteristics (curves). -Minor text changes. 17-Sep-2014 3 Updated title, features and description in cover page. 05-Nov-2014 4 Updated Section 3: Electrical characteristics (curves). Minor text changes. 08-Sep-2016 5 Added the order code STFU10N80K5 and the relative Section 4.2: "TO220FP ultra narrow leads package information". DocID026564 Rev 5 STF10N80K5, STFU10N80K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID026564 Rev 5 17/17