STFU13N65M2

STFU13N65M2 N-channel 650 V, 0.37 Ω typ., 10 A MDmesh™ M2 Power MOSFET in a TO-220FP ultra narrow leads package Datasheet - production data Features 1 2     3 Order code VDS RDS(on) max ID STFU13N65M2 650 V 0.43 Ω 10A Extremely low gate charge Excellent output capacitance (Coss) profile 100% avalanche tested Zener-protected Applications TO-220FP ultra narrow leads  Figure 1: Internal schematic diagram D(2) Switching applications Description This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. G(1) S(3) AM15572v1_no_tab Table 1: Device summary Order code Marking Package Packaging STFU13N65M2 13N65M2 TO-220FP ultra narrow leads Tube May 2015 DocID027538 Rev 1 This is information on a product in full production. 1/12 www.st.com Contents STFU13N65M2 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuit ....................................................................................... 8 4 Package mechanical data ............................................................... 9 4.1 5 2/12 TO-220FP package information ........................................................ 9 Revision history ............................................................................ 11 DocID027538 Rev 1 STFU13N65M2 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol VGS ID Parameter Value Unit Gate-source voltage ± 25 V Drain current (continuous) at TC = 25 °C 10 (1) A A Drain current (continuous) at TC = 100 °C 6.3(1) IDM(2) Drain current (pulsed) 40(1) A PTOT Total dissipation at TC = 25 °C 25 W VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C) 2500 V ID dv/dt (3) Peak diode recovery voltage slope 15 dv/dt (4) MOSFET dv/dt ruggedness 50 Tstg Storage temperature Tj V/ns - 55 to 150 Max. operating junction temperature °C 150 Notes: (1)Limited (2)Pulse (3)I SD (4)V by maximum junction temperature.. width limited by safe operating area. ≤ 10 A, di/dt ≤ 400 A/µs; VDSpeak < V(BR)DSS, VDD=400 V DS ≤ 520 V Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max Value Unit 5 °C/W 62.5 °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited byT jmax) 1.8 A EAS Single pulse avalanche energy (starting Tj = 25°C, ID = IAR; VDD = 50 V) 350 mJ DocID027538 Rev 1 3/12 Electrical characteristics 2 STFU13N65M2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 5: On /off states Symbol Parameter Test conditions Min. V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 V 650 IDSS Zero gate voltage drain current (VGS = 0) VDS = 650 V IGSS Typ. Max. Unit V 1 µA VDS = 650 V, TC = 125 °C 100 µA Gate-body leakage current (VDS = 0) VGS = ± 25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 5 A 0.37 0.43 Ω Min. Typ. Max. Unit - 590 - pF - 27.5 - pF - 1.1 - pF pF 2 Table 6: Dynamic Symbol Ciss Parameter Test conditions Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V Coss Output capacitance Crss Reverse transfer capacitance C (1) oss eq. Equivalent output capacitance VDS = 0 to 520 V, VGS = 0 V - 168.5 - RG Intrinsic gate resistance f = 1 MHz open drain - 6.5 - Ω Qg Total gate charge - 17 - nC Qgs Gate-source charge - 3.3 - nC Qgd Gate-drain charge - 7 - nC VDD = 520 V, ID = 10 A, VGS = 10 V Notes: (1)C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol td(on) tr td(off) tf 4/12 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 325 V, ID = 5 A, RG = 4.7 Ω, VGS = 10 V Fall time DocID027538 Rev 1 Min. Typ. Max. Unit - 11 - ns - 7.8 - ns - 38 - ns - 12 - ns STFU13N65M2 Electrical characteristics Table 8: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 10 A ISDM(1) Source-drain current (pulsed) - 40 A VSD(2) Forward on voltage - 1.6 V trr ISD = 10 A, VGS = 0 V Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr ISD = 10 A, di/dt = 100 A/µs, VDD = 60 V Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 10 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C - 312 ns - 2.7 µC - 17.5 A - 464 ns - 4.1 µC - 17.5 A Notes: (1)Pulse width limited by safe operating area. (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID027538 Rev 1 5/12 Electrical characteristics 2.1 6/12 STFU13N65M2 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Normalized VBR(DSS)vs temperature Figure 7: Static drain-source on-resistance DocID027538 Rev 1 STFU13N65M2 Electrical characteristics Figure 8: Gate charge vs gate-source voltage Figure 9: Capacitance variations Figure 10: Normalized gate threshold voltage vs temperature Figure 11: Normalized on-resistance vs temperature GIPD180920141459FSR R DS(on) (norm) 2.2 V GS= 10V 1.8 1.4 1 0.6 0.2 -75 Figure 12: Source-drain diode forward characteristics DocID027538 Rev 1 -25 25 75 125 T j(°C) Figure 13: Output capacitance stored energy 7/12 Test circuit 3 STFU13N65M2 Test circuit Figure 14: Switching times test circuit for resistive load Figure 15: Gate charge test circuit Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform 8/12 DocID027538 Rev 1 STFU13N65M2 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 TO-220FP package information Figure 20: TO-220FP ultra narrow leads package outline 8576148_1 DocID027538 Rev 1 9/12 Package mechanical data STFU13N65M2 Table 9: TO-220FP ultra narrow leads mechanical data mm Dim. Min. 10/12 Typ. Max. A 4.40 4.60 B 2.50 2.70 D 2.50 2.75 E 0.45 0.60 F 0.65 0.75 F1 - 0.90 G 4.95 5.20 G1 2.40 H 10.00 10.40 L2 15.10 15.90 L3 28.50 30.50 L4 10.20 11.00 L5 2.50 3.10 L6 15.60 16.40 L7 9.00 9.30 L8 L9 3.20 3.60 - 1.30 Dia. 3.00 3.20 DocID027538 Rev 1 2.54 2.70 STFU13N65M2 5 Revision history Revision history Table 10: Document revision history Date Revision 26-May-2015 1 DocID027538 Rev 1 Changes Initial release 11/12 STFU13N65M2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 12/12 DocID027538 Rev 1