STFU13N80K5

STFU13N80K5 N-channel 800 V, 0.37 Ω typ., 12 A MDmesh™ K5 Power MOSFET in a TO-220FP ultra narrow leads package Datasheet - production data Features 1 2 Order code VDS RDS(on) max ID PTOT STFU13N80K5 800 V 0.45 Ω 12 A 35 W      3 TO-220FP ultra narrow leads Industry’s lowest RDS(on) x area Industry’s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected Applications Figure 1: Internal schematic diagram D(2)  Switching applications Description This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. G(1) S(3) AM15572v1_no_tab Table 1: Device summary Order code Marking Package Packing STFU13N80K5 13N80K5 TO-220FP ultra narrow leads Tube July 2017 DocID028462 Rev 2 This is information on a product in full production. 1/13 www.st.com Contents STFU13N80K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuit ....................................................................................... 9 4 Package information ..................................................................... 10 4.1 5 2/13 TO-220FP ultra narrow leads package information ......................... 10 Revision history ............................................................................ 12 DocID028462 Rev 2 STFU13N80K5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate source voltage ±30 V ID(1) Drain current (continuous) at TC = 25 °C 12 A ID(1) Drain current (continuous) at TC = 100 °C 7.6 A IDM(2) Drain current (pulsed) 48 A PTOT Total dissipation at TC = 25 °C 35 W IAS Max current during repetitive or single pulse avalanche (pulse width limited by Tjmax ) 4 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAS, VDD = 50 V) 148 mJ VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C) 2500 V Peak diode recovery voltage slope 4.5 V/ns MOSFET dv/dt ruggedness 50 V/ns -55 to 150 °C dv/dt (3) dv/dt (4) Tstg Storage temperature range Tj Operating junction temperature range Notes: (1)Limited (2)Pulse (3)I SD (4)V by package. width limited by safe operating area. ≤ 12 A, di/dt ≤ 100 A/μs, VDS(peak) ≤ V(BR)DSS. SD ≤ 640 V. Table 3: Thermal data Symbol Parameter Value Rthj-case Thermal resistance junction-case 3.57 Rthj-amb Thermal resistance junction-ambient 62.5 DocID028462 Rev 2 Unit °C/W 3/13 Electrical characteristics 2 STFU13N80K5 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4: On /off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 800 Unit V VGS = 0 V, VDS = 800 V 1 µA VGS = 0 V, VDS = 800 V, TC = 125 °C (1) 50 µA Gate-body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 6 A 0.37 0.45 Ω Min. Typ. Max. Unit - 870 - pF - 50 - pF - 2 - pF - 110 - pF IDSS Zero gate voltage drain current IGSS 3 Notes: (1)Defined by design, not subject to production test. Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Equivalent output capacitance Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V VGS = 0 V, VDS = 0 to 640 V Co(er)(2) Equivalent capacitance energy related RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 5 - Ω VDD = 640 V, ID = 12 A, VGS = 0 to 10 V (see Figure 16: "Test circuit for gate charge behavior") - 29 - nC - 7 - nC - 18 - nC Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge 43 pF Notes: (1)Time related is defined as a constant equivalent capacitance giving the same charging time as C oss when VDS increases from 0 to 80% VDSS. (2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS. 4/13 DocID028462 Rev 2 STFU13N80K5 Electrical characteristics Table 6: Switching times Symbol td(on) tr td(off) tf Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. Unit VDD = 400 V, ID = 6 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15: "Test circuit for resistive load switching times" and Figure 20: "Switching time waveform") - 16 - ns - 16 - ns - 42 - ns - 16 - ns Min. Typ. Max. Unit Table 7: Source drain diode Symbol Parameter Test conditions ISD Source-drain current - 14 A ISDM Source-drain current (pulsed) - 56 A VSD(1) Forward on voltage ISD = 12 A, VGS = 0 V - 1.5 V ISD = 12 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 406 ns - 5.7 µC - 28 A ISD = 12 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 600 ns - 7.9 µC - 26 A Min. Typ. Max. Unit 30 - - V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1)Pulsed: pulse duration = 300μs, duty cycle 1.5%. Table 8: Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions IGS = ± 1mA, ID = 0 A The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. DocID028462 Rev 2 5/13 Electrical characteristics 2.1 STFU13N80K5 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance 6/13 DocID028462 Rev 2 STFU13N80K5 Electrical characteristics Figure 8: Capacitance variations Figure 9: Source-drain diode forward characteristics Figure 10: Normalized gate threshold voltage vs temperature Figure 11: Normalized on-resistance vs temperature Figure 12: Output capacitance stored energy Figure 13: Normalized V(BR)DSS vs temperature DocID028462 Rev 2 7/13 Electrical characteristics STFU13N80K5 Figure 14: Maximum avalanche energy vs temperature EAS (mJ) 8/13 DocID028462 Rev 2 STFU13N80K5 3 Test circuit Test circuit Figure 15: Test circuit for resistive load switching times Figure 16: Test circuit for gate charge behavior Figure 17: Test circuit for inductive load switching and diode recovery times Figure 18: Unclamped inductive load test circuit Figure 19: Unclamped inductive waveform Figure 20: Switching time waveform DocID028462 Rev 2 9/13 Package information 4 STFU13N80K5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 TO-220FP ultra narrow leads package information Figure 21: TO-220FP ultra narrow leads package outline 8576148_1 10/13 DocID028462 Rev 2 STFU13N80K5 Package information Table 9: TO-220FP ultra narrow leads mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 B 2.50 2.70 D 2.50 2.75 E 0.45 0.60 F 0.65 0.75 F1 - 0.90 G 4.95 5.20 G1 2.40 H 10.00 10.40 L2 15.10 15.90 L3 28.50 30.50 L4 10.20 11.00 L5 2.50 3.10 L6 15.60 16.40 L7 9.00 9.30 L8 L9 3.20 3.60 - 1.30 Dia. 3.00 3.20 DocID028462 Rev 2 2.54 2.70 11/13 Revision history 5 STFU13N80K5 Revision history Table 10: Document revision history 12/13 Date Revision Changes 08-Oct-2015 1 Initial release 14-Jul-2017 2 Modified Figure 7: "Static drain-source on-resistance ". Minor text changes. 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All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID028462 Rev 2 13/13