STG3220
Low voltage high bandwidth dual SPDT switch
Features
■
Ultra low power dissipation:
– ICC = 1 μA (max.) at TA = 85 °C
■
Low "ON" resistance:
– RON = 4.8 Ω (TA = 25 ºC) at VCC = 4.3 V
– RON = 5.9 Ω (TA = 25 ºC) at VCC = 3.0 V
QFN10
(1.8 x 1.4 mm)
■
Wide operating voltage range:
– VCC (opr) = 1.65 V to 4.3 V
■
4.3 V tolerant and 1.8 V compatible threshold
on digital control input at VCC = 2.3 V to 3.0 V
■
Typical bandwidth (-3 dB) at 800 MHz on all
channels
■
USB (2.0) high speed (480 Mbps) signal
switching compliant
■
Integrated fail safe function
■
Interrupt function to indicate to the processor
that the device is in dedicated port charging
mode
■
Latch-up performance exceeds 500 mA per
JESD 78, Class II
■
ESD performance exceeds JESD22:
– Dn pins: 4000-V human body model
(A114-A)
– All other pins: 2000-V human body model
(A114-A)
Applications
■
Mobile phones
Table 1.
May 2009
Description
The STG3220 is a high-speed CMOS low voltage
dual analog SPDT (single pole dual throw) switch
or 2:1 multiplexer/de-multiplexer switch fabricated
in silicon gate C2MOS technology. It is designed
to operate from 1.65 V to 4.3 V, making this
device ideal for portable applications.
The SEL input is provided to control the switch.
The switch nS1 is ON (connected to common
ports Dn) when the SEL input is held high and
OFF (high impedance state exists between the
two ports) when SEL is held low; the switch nS2 is
ON (it is connected to common port Dn) when the
SEL input is held low and OFF (high impedance
state exists between the two ports) when SEL is
held high. STG3220 has an integrated fail safe
function to withstand over-voltage condition when
the device is powered off.
The STG3220 also has an interrupt pin which
sends a signal to the processor when the device
is in dedicated port charging mode. Additional key
features are fast switching speed, break-beforemake-delay time and ultra low power
consumption. All inputs and outputs are equipped
with protection circuits against static discharge,
giving them ESD immunity and transient excess
voltage.
Device summary
Order code
Package
Packaging
STG3220QTR
QFN10 (1.8 x 1.4 mm)
Tape and reel
Doc ID 15647 Rev 1
1/23
www.st.com
23
Contents
STG3220
Contents
1
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Dedicated port charging detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2/23
Doc ID 15647 Rev 1
STG3220
1
Pin settings
Pin settings
Figure 1.
Pin connection (top through view)
Table 2.
3
3
).4
$
6##
'.$
3%,
$
3
3
Pin description
Pin number
Symbol
Name and function
1
INT
Interrupt
2
VCC
Positive supply voltage
3
SEL
Control
4
2S1
Independent channel for switch 2
5
2S2
Independent channel for switch 2
6
D2
Common channel for switch 2
7
GND
8
D1
Common channel for switch 1
9
1S2
Independent channel for switch 1
10
1S1
Independent channel for switch 1
Ground (0 V)
Doc ID 15647 Rev 1
3/23
Logic diagram
2
STG3220
Logic diagram
Figure 2.
Logic block diagram
1S1
D1
1S2
2S1
D2
2S2
SEL
Figure 3.
Logic equivalent circuit
N3
$N
N3
3%,
!-6
Table 3.
Truth table
SEL
Switch nS1
Switch nS2
H
ON
OFF(1)
L
OFF(1)
ON
1. High impedance.
4/23
Doc ID 15647 Rev 1
STG3220
3
Dedicated port charging detection
Dedicated port charging detection
The STG3220 has a built-in dedicated port charging detection circuit to detect the condition
when the USB D+/D- lines are both in high state. When this occurs, the device sends an
interrupt signal to the processor to indicate that the connected USB device is in dedicated
port charging mode.
Figure 4.
Interrupt function logic representation
INT
D1
1S1
1S2
D2
2S1
2S2
SEL
Doc ID 15647 Rev 1
5/23
Maximum rating
4
STG3220
Maximum rating
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 4.
Absolute maximum ratings
Symbol
VCC
Parameter
Supply voltage
Value
Unit
-0.5 to 5.5
V
-0.5 to VCC + 0.5
V
-0.5 to 5.5
V
-0.5 to VCC + 0.5
V
VI
DC input voltage
VIC
DC control input voltage
VO
DC output voltage
IIKC
DC input diode current on control pin (VSEL < 0V)
-50
mA
IIK
DC input diode current (VSEL < 0V)
±50
mA
IOK
DC output diode current
±20
mA
IO
DC output current
±128
mA
IOP
DC output current peak (pulse at 1ms, 10% duty cycle)
±300
mA
±100
mA
1120
mW
-65 to +150
°C
300
°C
Value
Unit
1.65 to 4.3
V
ICC or IGND DC VCC or ground current
PD
Power dissipation at TA = 70 °C
Tstg
Storage temperature
TL
(1)
Lead temperature (10 sec)
1. Derate above 70 °C by 18.5 mW/°C.
4.1
Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol
VCC
Supply voltage
VI
Input voltage
0 to VCC
V
VIC
Control input voltage
0 to 4.3
V
VO
Output voltage
0 to VCC
V
Top
Operating temperature
-40 to 85
°C
dt/dv
6/23
Parameter
Input rise and fall time control VL = 1.65 V to 2.7 V
input
VL = 3.0 to 4.3 V
Doc ID 15647 Rev 1
0 to 20
ns/V
0 to 10
STG3220
Electrical characteristics
5
Electrical characteristics
Table 6.
DC specifications
Value
Symbol
VIH
VIL
Parameter
High level input
voltage
Low level input
voltage
VCC
(V)
Test
conditions
TA = 25 °C
-40 to 85 °C
Min
Typ
Max
Min
Max
1.65 – 1.95
0.65 VCC
–
–
0.65VCC
–
2.3 – 2.5
1.2
–
–
1.2
–
1.3
–
–
1.3
–
3.3 – 3.6
1.4
–
–
1.4
–
4.3
1.6
–
–
1.6
–
1.65 – 1.95
–
–
0.25
–
0.25
2.3 – 2.5
–
–
0.25
–
0.25
–
–
0.25
–
0.25
3.3 – 3.6
–
–
0.30
–
0.30
4.3
–
–
0.40
–
0.40
2.7 – 3.0
2.7 – 3.0
–
–
Unit
V
V
VIH-INT
High level input
voltage for INT
4.3
–
2.4
–
–
2.4
–
V
VIL-INT
Low level input
voltage for INT
4.3
–
–
–
0.9
–
0.9
V
VOL-INT
Low level output
voltage for INT
4.3
–
–
0.40
–
0.50
V
–
15.1
17.8
–
–
–
6.4
8.0
–
–
–
5.9
7.5
–
–
–
5.0
6.5
–
–
–
4.8
6.1
–
–
4.2
5.4
–
–
IO = 4 mA
1.8
2.7
RPEAK
Switch ON peak
resistance
3.0
3.7
VS = 0 V to
VCC
IS = 8 mA
4.3
RON
3.0
VS = 3 V
IS = 8 mA
–
3.0
VS = 0.4 V
IS = 8 mA
–
Switch ON
resistance
Ω
Ω
Doc ID 15647 Rev 1
5.7
7.0
–
–
7/23
Electrical characteristics
Table 6.
STG3220
DC specifications (continued)
Value
Symbol
Parameter
VCC
(V)
Test
conditions
∆RON
Max
Min
Max
–
–
–
–
–
–
–
–
–
–
–
0.1
–
–
–
3.7
–
–
–
–
–
4.3
–
–
–
–
–
–
4.5
–
–
–
–
9.0
–
–
–
–
2.2
–
–
–
–
1.8
–
–
–
–
1.6
–
–
–
–
1.6
–
–
–
VS = 0.3 or 4 V
-20
–
20
-100
100
nA
VSEL = 0 to
4.3 V
-0.2
–
0.2
-1.0
1.0
µA
VSEL = VCC or
GND
-0.2
0.2
-1.0
1.0
µA
VSEL = 1.65 V
–
±37
±50
–
±100
VSEL = 1.80 V
–
±33
±40
–
±50
VSEL = 2.60 V
–
±11
±20
–
±30
2.7
3.0
VS at RON max
IS = 8 mA
VS = 0 V to
0.4 V
IS = 8 mA
1.8
RFLAT
2.7
3.0
3.7
VS = 0 V to
VCC
IS = 8 mA
4.3
IOFF
1.
OFF state
leakage current
(Sn), (D)
IIN
Input leakage
current
ICC
Quiescent supply
current
ICCLV
Quiescent supply
current for low
voltage driving
4.3
0 to 4.3
1.65 to 4.3
4.3
ΔRON = max |mSN-nSN|, where m = 1, 2 and n = 1, 2, N = 1, 2
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
8/23
Unit
Typ
1.8
ON resistance
flatness(2)
-40 to 85 °C
Min
1.8
ON resistance
match between
channels(1)
TA = 25 °C
Doc ID 15647 Rev 1
Ω
Ω
µA
STG3220
Table 7.
Electrical characteristics
AC characteristics (CL = 35 pf, RL: 50 Ω, TR = Tf ≤5 ns)
Value
Symbol
Parameter
VCC
(V)
Test
conditions
Propagation
delay
Typ
Max
Min
Max
–
0.21
–
–
–
–
0.15
–
–
–
3.0 - 3.3
–
0.14
–
–
–
3.6 - 4.3
–
0.13
–
–
–
–
34
–
–
–
–
20
23
–
26
–
15
17
–
20
–
13
15
–
17
–
27
–
–
–
–
19
22
–
25
–
14
16
–
18
–
11
13
–
14
–
10
–
–
–
–
6
–
–
–
–
4
–
–
–
–
3
–
–
–
2.3 - 2.7
–
1.65 - 1.95 VS = 0.8 V
2.3 - 2.7
tON
3.0 - 3.3
VS = 1.5 V
1.65 - 1.95 VS = 0.8 V
2.3 - 2.7
3.0 - 3.3
VS = 1.5 V
1.65 - 1.95
Break-beforemake time delay
ns
ns
Turn off time
3.6 - 4.3
tD
Unit
ns
Turn on time
3.6 - 4.3
tOFF
-40 to 85 °C
Min
1.65 - 1.95
tPLH, tPHL
TA = 25 °C
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
CL = 35 pF
RL = 50 Ω
VS = 1.5 V
ns
Doc ID 15647 Rev 1
9/23
Electrical characteristics
Table 8.
STG3220
AC electrical characteristics (CL = 5 pF, RL = 50 Ω, TA = 25 °C)
Value
Symbol
Parameter
VCC
(V)
Test
conditions
1.65
2.3
Q
Charge injection
3.0
CL = 100 pF
VGEN = 0 V
RGEN = 0 Ω
4.3
OIRR
Xtalk
OFF isolation(1)
Crosstalk
VS = 1V RMS,
f = 1 MHz
Signal = 0 dBm
Min
Typ
Max
Min
Max
–
3.9
–
–
–
–
4.8
–
–
–
–
5.2
–
–
–
–
6.4
–
–
–
–
-78
–
–
–
3.0 – 4.3
CIN
Control pin input
capacitance
CON
Sn port
capacitance
when switch is
enabled
3.3
Sn port
capacitance
when switch is
disabled
3.3
Unit
pC
dB
VS = 1 VRMS,
f = 10 MHz
Signal = 0 dBm
–
-57
–
–
–
VS = 1 VRMS,
f = 1 MHz
Signal = 0 dBm
–
-78
–
–
–
dB
1.65 – 4.3
-3dB bandwidth
VS = 1VRMS,
f = 10 MHz
Signal = 0 dBm
–
-58
–
–
–
RL = 50 Ω
Signal = 0 dBm
–
800
–
–
–
VCC = 0 V
–
2
–
–
–
f = 240 MHz
–
6
–
–
–
MHz
pF
f = 240 MHz
–
1. Off isolation = 20 Log10 (VD/VS), VD = output, VS = input to off switch.
10/23
-40 to 85 °C
1.65 – 4.3
BW
COFF
TA = 25 °C
Doc ID 15647 Rev 1
2
–
–
–
STG3220
Electrical characteristics
Table 9.
USB related AC electrical characteristics
Value
Symbol
Parameter
VCC
(V)
Test
conditions
TA = 25 °C
-40 to 85 °C
Min
Typ
Max
Min
Max
Unit
tSK(0)
Channel-tochannel skew
3.0 - 3.6
CL = 10 pF
–
26
–
–
–
ps
tSK(P)
Skew of
opposite
transition of the
same output
3.0 - 3.6
CL = 10 pF
–
60
–
–
–
ps
3.0 - 3.6
RL = 50 Ω
CL = 10 pF
tR = tF =
750 ps
at 480 Mbps
–
130
–
–
–
ps
TJ
Total jitter
Doc ID 15647 Rev 1
11/23
Test circuit
6
STG3220
Test circuit
Figure 5.
ON resistance
I
DS
V
V
CC
D
S1
VS
S2
IN
GND
GND
CS14071
12/23
Doc ID 15647 Rev 1
STG3220
Test circuit
Figure 6.
OFF leakage
V
CC
I
I
S(OFF)
D(OFF)
D
A
A
V
SS
V
D
S2
IN
V
CC
GND
CS14081
Figure 7.
OFF isolation
V
CC
S1
V OUT
50 Ω
S2
IN
GND
VS
GND
CS00381
Doc ID 15647 Rev 1
13/23
Test circuit
STG3220
Figure 8.
Bandwidth
V
CC
D
S1
V
OUT
S2
V
IN
CC
GND
CS00371
Figure 9.
Channel-to-channel crosstalk
CS14091
14/23
Doc ID 15647 Rev 1
STG3220
Test circuit
Figure 10. Test circuit
1. CL = 5/35 pF or equivalent (includes jig and probe capacitance)
2. RL = 50 Ω or equivalent
3. RT = ZOUT of pulse generator (typically 50 Ω)
Doc ID 15647 Rev 1
15/23
Test circuit
STG3220
Figure 11. Break-before-make time delay
Figure 12. Switching time and charge injection
(VGEN = 0 V, RGEN = 0 Ω, RL = 1 MΩ, CL = 100 pF)
Figure 13. Turn ON, turn OFF delay time
16/23
Doc ID 15647 Rev 1
STG3220
7
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 14. Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
7936408 Rev.D
Doc ID 15647 Rev 1
17/23
Package mechanical data
STG3220
Table 2. Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
Symbol
Millimeters
Min
Typ
Max
A
0.45
0.50
0.55
A1
0
0.02
0.05
A3
b
0.127
0.15
0.20
0.25
D
1.75
1.80
1.85
E
1.35
1.40
1.45
e
L
0.40
0.35
0.40
0.45
Figure 15. Footprint recommendations for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
18/23
Doc ID 15647 Rev 1
STG3220
Package mechanical data
Figure 16. Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
Doc ID 15647 Rev 1
19/23
Package mechanical data
STG3220
Figure 17. Reel information (front side) for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
20/23
Doc ID 15647 Rev 1
STG3220
Package mechanical data
Figure 18. Reel information (back view) for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
Doc ID 15647 Rev 1
21/23
Revision history
8
STG3220
Revision history
Table 10.
22/23
Document revision history
Date
Revision
14-May-2009
1
Changes
Initial release.
Doc ID 15647 Rev 1
STG3220
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23/23