STGIPS10K60A

STGIPS10K60A

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    DIP-25

  • 描述:

    SLLIMM小型低损耗智能成型模块IPM,3相逆变器,10 A、600 V短路保护IGBT

  • 数据手册
  • 价格&库存
STGIPS10K60A 数据手册
STGIPS10K60A SLLIMM™ small low-loss intelligent molded module IPM, 3-phase inverter, 10 A, 600 V short-circuit rugged IGBT Datasheet - production data Applications • 3-phase inverters for motor drives • Home appliances, such as washing machines, refrigerators, air conditioners Description This intelligent power module provides a compact, high performance AC motor drive in a simple, rugged design. Combining ST proprietary control ICs with the most advanced short-circuitrugged IGBT system technology, this device is ideal for 3-phase inverters in applications such as home appliances and air conditioners. SLLIMM™ is a trademark of STMicroelectronics. SDIP-25L Features • IPM 10 A, 600 V, 3-phase IGBT inverter bridge including control ICs for gate driving and freewheeling diodes • Short-circuit rugged IGBT • VCE(sat) negative temperature coefficient • 3.3 V, 5 V, 15 V CMOS/TTL inputs comparators with hysteresis and pull-down resistor • Undervoltage lockout • Internal bootstrap diode • Interlocking function • DBC substrate leading to low thermal resistance • Isolation rating of 2500 Vrms/min • 5 kΩ NTC thermistor for temperature control • UL recognized: UL1557 file E81734 Table 1. Device summary Order code Marking Package Packing STGIPS10K60A GIPS10K60A SDIP-25L Tube April 2015 This is information on a product in full production. DocID15587 Rev 11 1/18 www.st.com Contents STGIPS10K60A Contents 1 Internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.1 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 5 6 2/18 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 SDIP-25L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DocID15587 Rev 11 Internal block diagram and pin configuration STGIPS10K60A 1 Internal block diagram and pin configuration Figure 1. Internal block diagram Pin 1 Pin 25 OUTU V boot U L IN U HIN U V CC P LIN Vboot HIN VCC HVG OUT U LVG GND NU OUTV V boot V GN D L IN V P LIN Vboot HIN VCC HVG OUT V HIN V LVG GND OUTW NV V boot W P L IN W LIN Vboot HIN VCC HVG OUT W HIN W T1 T2 LVG GND NW Pin 16 NTC Pin 17 AM09364v1 DocID15587 Rev 11 3/18 18 Internal block diagram and pin configuration STGIPS10K60A Table 2. Pin description Pin Symbol 1 OUTU High side reference output for U phase 2 Vboot U Bootstrap voltage for U phase 3 LINU Low side logic input for U phase 4 HINU High side logic input for U phase 5 VCC Low voltage power supply 6 OUTV High side reference output for V phase 7 Vboot V Bootstrap voltage for V phase 8 GND Ground 9 LINV Low side logic input for V phase 10 HINV High side logic input for V phase 11 OUTW High side reference output for W phase 12 Vboot W Bootstrap voltage for W phase 13 LINW Low side logic input for W phase 14 HINW High side logic input for W phase 15 T1 NTC thermistor terminal 1 16 T2 NTC thermistor terminal 2 17 NW Negative DC input for W phase 18 W W phase output 19 P Positive DC input 20 NV Negative DC input for V phase 21 V V phase output 22 P Positive DC input 23 NU Negative DC input for U phase 24 U U phase output 25 P Positive DC input Description Figure 2. Pin layout (bottom view)                 0$5.,1*$5($  4/18     DocID15587 Rev 11     Electrical ratings STGIPS10K60A 2 Electrical ratings 2.1 Absolute maximum ratings Table 3. Inverter part Symbol Parameter Value Unit VPN Supply voltage applied between P - NU, NV, NW 450 V VPN(surge) Supply voltage (surge) applied between P - NU, NV, NW 500 V VCES Each IGBT collector emitter voltage (VIN(1) = 0) 600 V ± IC(2) Each IGBT continuous collector current at TC = 25°C 10 A Each IGBT pulsed collector current 20 A Each IGBT total dissipation at TC = 25°C 33 W Short-circuit withstand time, VCE = 0.5 V(BR)CES Tj = 125 °C, VCC = Vboot= 15 V, VIN (1)= 5 V 5 µs ± ICP (3) PTOT tscw 1. Applied between HINi, LINi and GND for i = U, V, W. 2. Calculated according to the iterative formula: Tj ( max ) – TC IC ( T C ) = ------------------------------------------------------------------------------------------------------R thj – c × V CE ( sat ) ( max ) ( T j ( max ), I C ( T C ) ) 3. Pulse width limited by max junction temperature. Table 4. Control part Symbol Parameter Min. Max Unit Vboot -18 Vboot + 0.3 V VOUT Output voltage applied between OUTU, OUTV, OUTW - GND VCC Low voltage power supply - 0.3 18 V Vboot Bootstrap voltage - 0.3 618 V Logic input voltage applied between HINi, LINi and GND for i = U, V, W - 0.3 VCC + 0.3 V 50 50 V/ns VIN dVOUT/dt Allowed output slew rate Table 5. Total system Symbol VISO Parameter Isolation withstand voltage applied between each pin and heatsink plate (AC voltage, t = 60 sec.) Value Unit 2500 V TJ Power chips operating junction temperature -40 to 150 °C TC Module case operating temperature -40 to 125 °C DocID15587 Rev 11 5/18 18 Electrical ratings 2.2 STGIPS10K60A Thermal data Table 6. Thermal data Symbol RthJC 6/18 Parameter Value Unit Thermal resistance junction-case single IGBT max. 3.8 °C/W Thermal resistance junction-case single diode max. 5.5 °C/W DocID15587 Rev 11 Electrical characteristics STGIPS10K60A 3 Electrical characteristics Tj = 25°C unless otherwise specified. Table 7. Inverter part Value Symbol VCE(sat) ICES VF Parameter Test conditions Unit Min. Typ. Max. VCC = Vboot = 15 V, VIN(1) = 5 V, IC = 5 A - 2.1 2.5 VCC = Vboot = 15 V, VIN(1) = 5 V, IC = 5 A, Tj = 125 °C - Collector-cut off current (VIN(1) = 0 “logic state”) VCE = 550 V VCC = Vboot = 15 V - 150 µA Diode forward voltage VIN(1) = 0 “logic state”, IC = 5 A - 1.9 V Collector-emitter saturation voltage V 1.8 Inductive load switching time and energy ton tc(on) toff tc(off) trr Turn-on time Crossover time (on) Turn-off time Crossover time (off) Reverse recovery time Eon Turn-on switching losses Eoff Turn-off switching losses VDD = 300 V, VCC = Vboot = 15 V, VIN(1)= 0 ÷ 5 V, IC = 5 A (see Figure 4) - 320 - - 70 - - 430 - - 135 - - 130 - - 65 - - 75 - ns µJ 1. Applied between HINi, LINi and GND for i = U, V, W. Note: tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are the switching time of IGBT itself under the internally given gate driving condition. DocID15587 Rev 11 7/18 18 Electrical characteristics STGIPS10K60A Figure 3. Switching time test circuit INPUT BUS BOOT Lin VBOOT>VCC HVG L Hin OUT VCC Vcc IC LVG VCE GND 0 1 AM17163v1 Figure 4. Switching time definition 100% IC 100% IC t rr IC VCE VIN VIN t ON t C(ON) VIN(ON) 10% IC 90% IC 10% VCE (a) turn-on 8/18 VCE IC t OFF VIN(OFF) t C(OFF) 10% VCE (b) turn-off DocID15587 Rev 11 10% IC AM09223V1 Electrical characteristics STGIPS10K60A 3.1 Control part Table 8. Low supply voltage (VCC = 15 V unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit VCCthON Under voltage turn on threshold 9.1 9.6 10.1 V VCCthOFF Under voltage turn off threshold 7.9 8.3 8.8 V Under voltage hystereses 0.9 VCChys V Iqccu Under voltage quiescent supply current VCC < 7.9 V 0.75 1.2 mA Iqcc Quiescent current VCC = 15 V 1 1.5 mA Table 9. Bootstrap supply (VCC = 15 V unless otherwise specified) Symbol Vboot_thON Parameter Test conditions Min. Typ. Max. Unit Under voltage turn on threshold 8.5 9.5 10.5 V Vboot_thOFF Under voltage turn off threshold 7.2 8.3 9.2 V Vboothys Iqboot RDS(on) Under voltage hystereses 0.9 V Quiescent current 250 Bootstrap driver on resistance VCC > 12.5 V µA Ω 125 Table 10. Logic input (1) (VCC = 15 V unless otherwise specified) Symbol Parameter Vil Low level logic input voltage Vih High level logic input voltage Test conditions Min. Typ. Max. Unit 1.1 Iil Low level logic input current VIN(2) Iih High level logic input current VIN(1) = 15 V =0V V 1.8 V -1 µA 20 70 µA 1. See Figure 9: Dead time and interlocking definition. 2. Applied between HINi, LINi and GND for i = U, V, W DocID15587 Rev 11 9/18 18 Electrical characteristics 3.1.1 STGIPS10K60A NTC thermistor Table 11. NTC thermistor Symbol Parameter Test conditions Min. R25 Resistance T = 25 °C 5 kΩ R125 Resistance T = 125 °C 300 Ω B B-constant T = 25 °C to 85 °C 3340 K T Operating temperature -40 Equation 1: resistance variation vs. temperature R ( T ) = R 25 ⋅ e 1 1 B  --- – ----------  T 298 Where T are temperatures in Kelvin. Figure 5. NTC resistance vs. temperature AM17164v1 NTC [kΩ] 100 80 60 MAX. 40 CENTER 20 MIN. 0 -40 -20 0 20 40 60 80 100 120 (°C) Figure 6. NTC resistance vs. temperature (zoom) AM17165v1 NTC [kΩ] 2,0 1,8 MAX. 1,6 1,4 CENTER 1,2 MIN. 1,0 0,8 0,6 0,4 0,2 50 10/18 Typ. Max. Unit. 60 70 80 90 DocID15587 Rev 11 100 110 120 (°C) 125 °C Electrical characteristics STGIPS10K60A Figure 7. Maximum IC(RMS) current vs. switching frequency (1) AM03801v1 IC (RMS) (A) Figure 8. Maximum IC(RMS) current vs. fSINE (1) AM03802v1 IC (RMS) (A) VPN = 300 V, Modulation index = 0.8, PF = 0.6, Tj= 150 °C, f SINE = 60 Hz VPN = 300 V, Modulation index = 0.8, PF = 0.6, Tj = 150°C, Tc = 100 °C 8 12 7 TC = 80°C 10 fsw = 12 kHz 6 fsw = 16 kHz 8 5 TC = 100°C 6 4 6 8 10 fsw = 20 kHz 12 14 16 4 fsw(kHz) 10 1 fSINE(Hz) 1. Simulated curves refer to typical IGBT parameters and maximum Rthj-c. Figure 9. Dead time and interlocking definition H IN DT DT LVG DT Interlocking function LIN HVG AM03794v1 Minimum recommended dead time (DT) between low and high side logic input: 1 µs. DocID15587 Rev 11 11/18 18 12/18 +15V Line CONTROLLER DocID15587 Rev 11 T2 T1 HINW LINW V boot W OUTW HINV LINV GND V boot V OUTV V CC C3 C2 C1 HVG HIN VCC HVG HIN VCC W-Phase Current V-Phase Current U-Phase Current LVG GND OUT Vboot LIN LVG GND OUT Vboot LVG GND OUT HVG Vboot LIN HIN VCC LIN 1 NTC R6 R5 R4 R3 R2 R1 2 T6 T5 T4 T3 T2 T1 D6 D5 D4 D3 D2 D1 NW W NV V NU U P M AM01231v1 + VDC 4 HINU LINU V boot U OUTU Application information STGIPS10K60A Application information Figure 10. Typical application circuit Application information STGIPS10K60A 4.1 Recommendations • Input signal HIN,LIN are active-high logic. A 500 kΩ (typ.) pull down resistor is built-in for each high side input. If an external RC filter is used, for noise immunity, pay attention to the variation of the input signal level. • To prevent the input signals oscillation, the wiring of each input should be as short as possible. • By integrating an application specific type HVIC inside the module, direct coupling to MCU terminals without any opto-coupler is possible. • Each capacitor should be located as nearby the pins of IPM as possible. • Low inductance shunt resistors should be used for phase leg current sensing. • Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible. Additional high frequency ceramic capacitor mounted close to the module pins will further improve performance. Table 12. Recommended operating conditions Symbol Parameter Conditions VPN Supply Voltage Applied between P-Nu, Nv, Nw VCC Control supply voltage Applied between VCC-GND VBS High side bias voltage Applied between VBOOTi-OUTi for i = U, V, W tdead Blanking time to prevent Arm-short For each input signal fPWM PWM input signal -40°C < Tc < 100°C -40°C < Tj < 125°C TC Case operation temperature Min. 12 11.5 Typ. Max. Unit 300 400 V 15 17 V 17 V 1 µs 20 kHz 100 °C Refer to AN3338 for further details. DocID15587 Rev 11 13/18 18 Package information 5 STGIPS10K60A Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Please refer to dedicated technical note TN0107 for mounting instructions. 5.1 SDIP-25L package information Figure 11. SDIP-25L package outline B 14/18 DocID15587 Rev 11 Package information STGIPS10K60A Table 13. SDIP-25L mechanical data mm Dim. Min. Typ. Max. A 43.90 44.40 44.90 A1 1.15 1.35 1.55 A2 1.40 1.60 1.80 A3 38.90 39.40 39.90 B 21.50 22.00 22.50 B1 11.25 11.85 12.45 B2 24.83 25.23 25.63 C 5.00 5.40 6.00 C1 6.50 7.00 7.50 C2 11.20 11.70 12.20 C3 2.90 3.00 3.10 e 2.15 2.35 2.55 e1 3.40 3.60 3.80 e2 4.50 4.70 4.90 e3 6.30 6.50 6.70 D 33.30 D1 5.55 E 11.20 E1 1.40 F 0.85 1.00 1.15 F1 0.35 0.50 0.65 R 1.55 1.75 1.95 T 0.45 0.55 0.65 V 0° 6° DocID15587 Rev 11 15/18 18 Package information 5.2 STGIPS10K60A Packing information Base quantity: 11 pcs Bulk quantity: 132 pcs 8123127_E AM10488v1 Figure 12. SDIP-25L packing information 16/18 DocID15587 Rev 11 Revision history STGIPS10K60A 6 Revision history Table 14. Document revision history Date Revision 16-Apr-2009 1 Initial release. 11-May-2009 2 Added Figure 7 and Figure 8. 17-Jul-2009 3 Reduced VCE(sat) value on Table 7. 06-Apr-2010 4 Document promoted from preliminary data to datasheet. Inserted Figure 3: Switching time test circuit and Table 12: Recommended operating conditions. Updated Table 5: Total system, Table 6: Thermal data, Table 7: Inverter part, Figure 5: NTC resistance vs. temperature, Figure 7: Maximum IC(RMS) current vs. switching frequency, Figure 8: Maximum IC(RMS) current vs. fSINE (1) and Section 5: Package information. 15-Jun-2010 5 Updated Table 7: Inverter part. Minor text changes to improve readability. 17-Nov-2010 6 Updated Table 3, 5, 11 and 12. Modified Figure 7 and Figure 8. 07-Mar-2011 7 Updated title with SLLIMM™ in cover page, added SDIP-25L tube dimensions Figure 12 on page 16. 8 Updated title with SLLIMM™ (small low-loss intelligent molded module) IPM, 3-phase inverter - 10 A, 600 V short-circuit rugged IGBT in cover page and SDIP-25L mechanical data Table 13 on page 14, Figure 11 on page 14. 28-Aug-2012 9 Modified: Min. and Max. value Table 4 on page 5. Updated: Table 13 on page 14, Figure 11 on page 14 and Figure 12 on page 16. Added: Figure 13 on page 17. 02-May-2013 10 Modified: Figure 3 on page 8 and Figure 5 on page 10. Added: Figure 6 on page 10. 13-Apr-2015 11 Text edits and formatting changes throughout document Updated Figure 2: Pin layout (bottom view) Updated Section 5: Package information 04-Nov-2011 Changes DocID15587 Rev 11 17/18 18 STGIPS10K60A IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 18/18 DocID15587 Rev 11
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