STH140N8F7-2

STH140N8F7-2 N-channel 80 V, 3.3 mΩ typ., 90 A STripFET™ F7 Power MOSFET in a H2PAK-2 package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STH140N8F7-2 80 V 4 mΩ 90 A 200 W     Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Applications  Figure 1: Internal schematic diagram Switching applications Description This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1: Device summary October 2014 Order code Marking Package Packaging STH140N8F7-2 140N8F7 H2PAK-2 Tape and reel DocID026821 Rev 2 This is information on a product in full production. 1/15 www.st.com Contents STH140N8F7-2 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 5 3 Test circuit ....................................................................................... 7 4 Package mechanical data ............................................................... 8 4.1 H2PAK-2 mechanical data ................................................................ 9 5 Packaging mechanical data .......................................................... 12 6 Revision history ............................................................................ 14 2/15 DocID026821 Rev 2 STH140N8F7-2 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 80 V VGS Gate-source voltage ± 20 V (1) A ID Drain current (continuous) at TC = 25 ° C ID 90 Drain current (continuous) at TC = 100 ° C 90 A IDM(2) Drain current (pulsed) 360 A PTOT Total dissipation at TC = 25 ° C 200 W EAS(3) Single pulse avalanche energy 515 mJ Tj Operating junction temperature - 55 to 175 °C Tstg Storage temperature Notes: (1)Limited (2)Pulse by package width is limited by safe operating area (3)Starting Tj =25 ° C, Id = 18.5 A, Vdd = 50 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-pcb (1) Thermal resistance junction-pcb 35 ° C/W Rthj-case Thermal resistance junction-case 0.75 ° C/W Notes: (1)When mounted on FR-4 board of 1inch² , 2oz Cu DocID026821 Rev 2 3/15 Electrical characteristics 2 STH140N8F7-2 Electrical characteristics (TCASE = 25 ° C unless otherwise specified) Table 4: On/off states Symbol Parameter Test conditions V(BR)DSS Drain-source breakdown voltage VGS = 0, ID = 250 µA Min. Typ. Max. 80 Unit V VGS = 0, VDS = 80 V 1 µA VGS = 0, VDS = 80 V, TJ=125 ° C 10 µA ± 100 nA 4.5 V 3.3 4 mΩ Min. Typ. Max. Unit - 6340 - pF - 1195 - pF - 105 - pF - 96 - nC - 30 - nC - 26 - nC Min. Typ. Max. Unit - 26 - ns - 51 - ns - 82 - ns - 44 - ns Min. Typ. IDSS Zero gate voltage Drain current IGSS Gate-source leakage current VDS = 0, VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance VGS=10 V, ID = 45 A Symbol Parameter 2.5 Table 5: Dynamic Ciss Test conditions Input capacitance VGS = 0, VDS = 40 V, f = 1 MHz Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDD = 40 V, ID = 64 A, VGS = 10 V Table 6: Switching times Symbol td(on) Parameter Test conditions Turn-on delay time tr Rise time td(off) VDD = 40 V, ID = 45 A RG=4.7 Ω, VGS = 10 V Turn-off-delay time tf Fall time Table 7: Source drain diode Symbol ISD ISDM(1) VSD (2) Parameter Test conditions Unit Source-drain current - 90 A Source-drain current (pulsed) - 360 A Forward on voltage VGS = 0, ISD = 90 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 64 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 ° C Notes: 4/15 Max. (1)Pulse width is limited by safe operating area (2)Pulse test: pulse duration = 300 µ s, duty cycle 1.5% DocID026821 Rev 2 - 1.2 V - 58 ns - 92 nC - 3.2 A STH140N8F7-2 2.1 Electrical characteristics Electrical characteristics (curves) Figure 3: Thermal impedance Figure 2: Safe operating area K GIPD130920130848MT ID (A) δ= 0.5 100 0.2 10 100µs Operation in this area is 10 -1 0.05 Limited by max RDS(on) 0.02 0.01 1ms Tj=175°C Tc=25°C 1 10 10 1 -2 10 V DS(V) -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 tp(s) Figure 5: Transfer characteristics Figure 4: Output characteristics GIPD130920130919MT ID (A) Single pulse 10ms Sinlge pulse 0.1 0.1 0.1 ID (A) V GS= 10V 300 300 7V 250 V DS= 2V 250 6V 200 200 150 150 5V 100 100 50 50 4V 0 0 2 4 6 8 0 0 V DS(V) Figure 6: Normalized V(BR)DSS vs. temperature V (BR)DSS 1 2 3 4 5 6 8 7 9 V GS(V) Figure 7: Static drain-source on resistance GIPD120920131215MT R DS(on) (mΩ) 3.315 ID= 250µA 1.04 V GS= 10V 3.310 1.02 3.305 1 3.300 0.98 3.295 0.96 0.94 -75 3.290 -25 0 25 75 125 20 30 40 50 60 70 80 90 ID(A) 175 T J(°C) DocID026821 Rev 2 5/15 Electrical characteristics STH140N8F7-2 Figure 8: Gate charge vs. gate-source voltage Figure 9: Capacitance variations V GS (V) C (pF) 8000 12 7000 10 C iss 6000 8 5000 6 4000 3000 4 2000 2 0 1000 0 20 40 80 60 0 0 100 Q g(nC) 10 20 30 40 50 60 C oss C rss 70 V DS(V) Figure 11: Normalized on resistance vs. temperature Figure 10: Normalized gate threshold voltage vs. temperature V GS(th) R DS(on) V GS= 10V 1.2 1.8 ID= 250µA 1.6 1 1.4 1.2 0.8 1 0.8 0.6 0.6 0.4 -75 -25 0 25 75 125 0.4 -75 175 T J(°C) -25 0 25 75 Figure 12: Source-drain diode forward characteristics V SD T J= -55°C 1.1 1 0.9 T J= 25°C 0.8 T J= 175°C 0.7 0.6 20 6/15 30 40 50 60 DocID026821 Rev 2 70 80 90 ID(A) 125 175 T J(°C) STH140N8F7-2 3 Test circuit Test circuit Figure 13: Switching times test circuit for resistive load Figure 15: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive waveform DocID026821 Rev 2 Figure 14: Gate charge test circuit Figure 16: Unclamped inductive load test circuit Figure 18: Switching time waveform 7/15 Package mechanical data 4 STH140N8F7-2 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 8/15 DocID026821 Rev 2 STH140N8F7-2 4.1 Package mechanical data H2PAK-2 mechanical data Figure 19: H²PAK-2 leads drawing 8159712_D DocID026821 Rev 2 9/15 Package mechanical data STH140N8F7-2 Table 8: H²PAK-2 leads mechanical data mm Dim. Min. 10/15 Typ. Max. A 4.30 4.80 A1 0.03 0.20 C 1.17 1.37 e 4.98 5.18 E 0.50 0.90 F 0.78 0.85 H 10.00 10.40 H1 7.40 L 15.30 L1 1.27 1.40 L2 4.93 5.23 L3 6.85 7.25 L4 1.5 1.7 M 2.6 2.9 R 0.20 0.60 V 0° DocID026821 Rev 2 - 7.80 15.80 8° STH140N8F7-2 Package mechanical data Figure 20: H²PAK-2 recommended footprint 8159712_D DocID026821 Rev 2 11/15 Packaging mechanical data 5 STH140N8F7-2 Packaging mechanical data Figure 21: Tape 12/15 DocID026821 Rev 2 STH140N8F7-2 Packaging mechanical data Figure 22: Reel Table 9: Tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID026821 Rev 2 Min. Max. 330 13.2 26.4 30.4 13/15 Revision history 6 STH140N8F7-2 Revision history Table 10: Document revision history 14/15 Date Revision Changes 25-Aug-2014 1 First release. Part numbers STF140N8F7 and STP140N8F7 previously included in the datasheet DocID023888. 10-Oct-2014 2 Updated Figure 3: "Thermal impedance" DocID026821 Rev 2 STH140N8F7-2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved DocID026821 Rev 2 15/15