STH145N8F7-2AG

STH145N8F7-2AG Automotive-grade N-channel 80 V, 3.3 mΩ typ., 90 A STripFET™ F7 Power MOSFET in a H²PAK-2 package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STH145N8F7-2AG 80 V 4 mΩ 90 A 200 W      Designed for automotive applications and AEC-Q101 qualified Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Applications Figure 1: Internal schematic diagram  Switching applications Description This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1: Device summary Order code Marking Package Packaging STH145N8F7-2AG 145N8F7 H²PAK-2 Tape and reel June 2015 DocID027933 Rev 1 This is information on a product in full production. 1/16 www.st.com Contents STH145N8F7-2AG Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 H²PAK-2 package information ......................................................... 10 5 Packing information ...................................................................... 13 6 Revision history ............................................................................ 15 2/16 DocID027933 Rev 1 STH145N8F7-2AG 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 80 V VGS Gate-source voltage ± 20 V (1) A ID Drain current (continuous) at TC = 25 ° C ID 90 Drain current (continuous) at TC = 100 ° C 90 A IDM(2) Drain current (pulsed) 360 A PTOT Total dissipation at TC = 25 ° C 200 W EAS(3) Single pulse avalanche energy 515 mJ Tj Operating junction temperature - 55 to 175 °C Tstg Storage temperature Notes: (1)Limited (2)Pulse by package width is limited by safe operating area (3)Starting Tj =25 ° C, Id = 18.5 A, Vdd = 50 V Table 3: Thermal data Symbol Rthj-pcb (1) Rthj-case Parameter Value Unit Thermal resistance junction-pcb 35 ° C/W Thermal resistance junction-case 0.75 ° C/W Notes: (1)When mounted on FR-4 board of 1inch² , 2oz Cu DocID027933 Rev 1 3/16 Electrical characteristics 2 STH145N8F7-2AG Electrical characteristics (TCASE = 25 ° C unless otherwise specified) Table 4: On/off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions VGS = 0, ID = 250 µA Min. Typ. Max. 80 Unit V VGS = 0, VDS = 80 V 1 µA VGS = 0, VDS = 80 V, TJ=125 ° C 10 µA Gate-source leakage current VDS = 0, VGS = ± 20 V ± 100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4.5 V RDS(on) Static drain-source onresistance VGS=10 V, ID = 45 A 3.3 4 mΩ Min. Typ. Max. Unit - 6340 - pF - 1195 - pF - 105 - pF - 96 - nC - 30 - nC - 26 - nC Min. Typ. Max. Unit - 26 - ns - 51 - ns - 82 - ns - 44 - ns IDSS Zero gate voltage Drain current IGSS 2.5 Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VGS = 0, VDS = 40 V, f = 1 MHz VDD = 40 V, ID = 64 A, VGS = 10 V Table 6: Switching times Symbol td(on) tr td(off) tf 4/16 Parameter Test conditions Turn-on delay time Rise time Turn-off-delay time VDD = 40 V, ID = 45 A RG=4.7 Ω, VGS = 10 V Fall time DocID027933 Rev 1 STH145N8F7-2AG Electrical characteristics Table 7: Source drain diode Symbol ISD ISDM(1) VSD (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 90 A Source-drain current (pulsed) - 360 A 1.2 V Forward on voltage VGS = 0, ISD = 90 A - ISD = 64 A, di/dt = 100 A/µ s, VDD = 60 V Tj = 150 ° C - 58 ns - 92 nC - 3.2 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1)Pulse width is limited by safe operating area (2)Pulse test: pulse duration = 300 µ s, duty cycle 1.5% DocID027933 Rev 1 5/16 Electrical characteristics 2.1 STH145N8F7-2AG Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance GIPD130920130848MT ID (A) K δ= 0.5 100 0.2 100µs Operation in this area is 10 10 Limited by max RDS(on) 0.02 0.01 10 10 1 V DS(V) -2 10 Figure 4: Output characteristics -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 tp(s) Figure 5: Transfer characteristics GIPD130920130919MT ID (A) Single pulse 10ms Sinlge pulse 0.1 0.1 0.1 0.05 1ms Tj=175°C Tc=25°C 1 -1 ID (A) V GS= 10V 300 300 7V 250 V DS= 2V 250 6V 200 200 150 150 5V 100 100 50 50 4V 0 0 2 4 6 8 0 0 V DS(V) Figure 6: Normalized V(BR)DSS vs. temperature 1 2 3 4 5 6 8 7 Figure 7: Static drain-source on resistance GIPD120920131215MT R DS(on) (mΩ) V (BR)DSS 9 V GS(V) 3.315 ID= 250µA 1.04 V GS= 10V 3.310 1.02 3.305 1 3.300 0.98 3.295 0.96 0.94 -75 6/16 3.290 -25 0 25 75 125 175 T J(°C) DocID027933 Rev 1 20 30 40 50 60 70 80 90 ID(A) STH145N8F7-2AG Electrical characteristics Figure 8: Gate charge vs. gate-source voltage Figure 9: Capacitance variations V GS (V) C (pF) 8000 12 7000 10 C iss 6000 8 5000 6 4000 3000 4 2000 2 0 1000 0 20 40 80 60 0 0 100 Q g(nC) Figure 10: Normalized gate threshold voltage vs. temperature 10 20 30 40 50 60 C oss C rss 70 V DS(V) Figure 11: Normalized on resistance vs. temperature V GS(th) R DS(on) V GS= 10V 1.2 1.8 ID= 250µA 1.6 1 1.4 1.2 0.8 1 0.8 0.6 0.6 0.4 -75 -25 0 25 75 125 0.4 -75 175 T J(°C) -25 0 25 75 125 175 T J(°C) Figure 12: Source-drain diode forward characteristics V SD T J= -55°C 1.1 1 0.9 T J= 25°C 0.8 T J= 175°C 0.7 0.6 20 30 40 50 60 DocID027933 Rev 1 70 80 90 ID(A) 7/16 Test circuits 3 STH145N8F7-2AG Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform 8/16 DocID027933 Rev 1 STH145N8F7-2AG 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID027933 Rev 1 9/16 Package information 4.1 STH145N8F7-2AG H²PAK-2 package information Figure 19: H²PAK-2 package outline 8159712_D 10/16 DocID027933 Rev 1 STH145N8F7-2AG Package information Table 8: H²PAK-2 mechanical data mm Dim. Min. Typ. Max. A 4.30 4.80 A1 0.03 0.20 C 1.17 1.37 e 4.98 5.18 E 0.50 0.90 F 0.78 0.85 H 10.00 10.40 H1 7.40 L 15.30 L1 1.27 1.40 L2 4.93 5.23 L3 6.85 7.25 L4 1.5 1.7 - 7.80 15.80 M 2.6 2.9 R 0.20 0.60 V 0° 8° DocID027933 Rev 1 11/16 Package information STH145N8F7-2AG Figure 20: H²PAK-2 recommended footprint 8159712_D 12/16 DocID027933 Rev 1 STH145N8F7-2AG 5 Packing information Packing information Figure 21: Tape outline DocID027933 Rev 1 13/16 Packing information STH145N8F7-2AG Figure 22: Reel outline T REE L DIMENS IONS 40 mm min. Acc ess hole At slot location B D C N A G measured Tape slot In core for Full radius At hub Tape start Table 9: Tape and reel mechanical data Tape Reel mm mm Dim. 14/16 Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID027933 Rev 1 Min. Max. 330 13.2 26.4 30.4 STH145N8F7-2AG 6 Revision history Revision history Table 10: Document revision history Date Revision 05-Jun-2015 1 DocID027933 Rev 1 Changes First release. 15/16 STH145N8F7-2AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 16/16 DocID027933 Rev 1