STH150N10F7-2

STH150N10F7-2 N-channel 100 V, 0.0034 Ω typ., 110 A, STripFET™ F7 Power MOSFET in a H2PAK-2 package Datasheet − production data Features Order code VDS RDS(on)max STH150N10F7-2 100 V 0.0039 Ω ID PTOT 110 A 250 W • Among the lowest RDS(on) on the market TAB • Excellent figure of merit (FoM) • Low Crss/Ciss ratio for EMI immunity 2 3 • High avalanche ruggedness 1 2 H PAK-2 Applications • Switching applications Description Figure 1. Internal schematic diagram '7$% This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. * 6 $0Y Table 1. Device summary Order code Marking Package Packaging STH150N10F7-2 150N10F7 H2PAK-2 Tape and reel September 2016 DocID025859 Rev 3 1/16 www.st.com Contents STH150N10F7-2 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 .............................................. 8 DocID025859 Rev 3 STH150N10F7-2 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate- source voltage ±20 V ID Drain current (continuous) at TC = 25 °C 110 A ID Drain current (continuous) at TC = 100 °C 110 A Drain current (pulsed) TC = 25 °C 440 A Total dissipation at TC = 25 °C 250 W Single pulse avalanche energy 495 mJ IDM (1) PTOT (2) EAS TJ Operating junction temperature range Tstg Storage temperature range °C -55 to 175 °C 1. Pulse width is limited by safe operating area 2. Starting Tj = 25 °C, ID = 30 A, VDD = 50 V Table 3. Thermal data Symbol Rthj-case Rthj-pcb 1. (1) Parameter Value Unit Thermal resistance junction-case max 0.6 °C/W Thermal resistance junction-pcb max 35 °C/W When mounted on 1 inch² FR-4 board, 2 oz Cu DocID025859 Rev 3 3/16 16 Electrical characteristics 2 STH150N10F7-2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. On /off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage IDSS Zero gate voltage drain current IGSS Gate-body leakage current Test conditions VGS = 0 V, ID = 250 µA Min. Typ. Max. 100 Unit V VGS = 0 V, VDS = 100 V 1 µA VGS = 0 V, VDS = 100 V, TC=125 °C (1) 100 µA VDS = 0 V, VGS = +20 V 100 nA 4.5 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onVGS = 10 V, ID = 55 A resistance 2.5 0.0034 0.0039 Ω 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 50 V, f = 1 MHz, VGS = 0 V VDD = 50 V, ID =110 A, VGS = 10 V (see Figure 14) Min. Typ. Max. Unit - 8115 - pF - 1510 - pF - 67 - pF - 117 - nC - 47 - nC - 26 - nC Min. Typ. Max. Unit - 33 - ns - 57 - ns - 72 - ns - 33 - ns Table 6. Switching times Symbol td(on) tr td(off) tf 4/16 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 50 V, ID = 55 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13) Fall time DocID025859 Rev 3 STH150N10F7-2 Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 110 A ISDM (1) Source-drain current (pulsed) - 440 A VSD (2) Forward on voltage - 1.2 V ISD ISD = 110 A, VGS = 0 trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 110 A, di/dt = 100 A/µs VDD = 80 V, TJ=150 °C (see Figure 15) - 70 ns - 165 nC - 4.7 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. DocID025859 Rev 3 5/16 16 Electrical characteristics 2.1 STH150N10F7-2 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM18051v1 ID (A) AM18052v1 K δ=0.5 0.2 100 th in n tio by m ra pe ited O m Li 10 is ea a r (on) S RD ax 0.1 0.05 is 100µs 10 -1 0.02 c 0.01 1ms 1 Tj=175°C Tc=25°C Single pulse 0.1 0.1 1 VDS(V) 10 Figure 4. Output characteristics VGS=10V 400 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 tp(s) Figure 5. Transfer characteristics AM18042v1 ID (A) Single pulse 10ms 8V AM18043v1 ID (A) VDS=4V 300 350 7V 300 250 200 250 200 150 6V 150 100 100 50 50 5V 0 0 4 2 6 8 Figure 6. Gate charge vs gate-source voltage AM18044v1 VGS (V) VDD=50V ID=110A 12 0 0 VDS(V) 2 4 8 6 VGS(V) Figure 7. Static drain-source on-resistance AM18053v1 RDS(on) (mΩ) 3.430 VGS=10V 3.420 10 3.410 8 3.400 6 3.390 4 3.380 2 3.370 3.360 0 0 6/16 40 80 120 Qg(nC) DocID025859 Rev 3 0 20 40 60 80 100 ID(A) STH150N10F7-2 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature AM18046v1 C (pF) AM18047v1 VGS(th) (norm) ID=250µA 1.1 Ciss 8000 1 7000 6000 0.9 5000 0.8 4000 0.7 3000 0.6 2000 0.5 1000 Coss Crss 100 VDS(V) 0 0 20 60 40 80 Figure 10. Normalized on-resistance vs temperature AM18048v1 RDS(on) 0.4 -75 -25 25 75 125 TJ(°C) Figure 11. Normalized VDS vs temperature AM18049v1 VDS (norm) (norm) ID=55A 2 1.04 1.8 1.03 1.6 1.02 1.4 1.01 1.2 1 1 0.99 0.8 0.98 0.6 0.97 0.4 -75 -25 25 75 125 TJ(°C) 0.96 -75 ID=1mA -25 25 75 125 TJ(°C) Figure 12. Source-drain diode forward characteristics AM18055v1 VSD (V) TJ=-55°C 1 0.9 TJ=25°C 0.8 0.7 TJ=175°C 0.6 0.5 0.4 0.3 0 20 40 60 80 100 ISD(A) DocID025859 Rev 3 7/16 16 Test circuits 3 STH150N10F7-2 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/16 0 DocID025859 Rev 3 10% AM01473v1 STH150N10F7-2 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID025859 Rev 3 9/16 16 Package information STH150N10F7-2 Figure 19. H²PAK-2 package outline B 10/16 DocID025859 Rev 3 STH150N10F7-2 Package information Table 8. H²PAK-2 package mechanical data mm Dim. Min. Typ. Max. A 4.30 4.70 A1 0.03 0.20 C 1.17 1.37 e 4.98 5.18 E 0.50 0.90 F 0.78 0.85 H 10.00 10.40 H1 7.40 7.80 - L 15.30 15.80 L1 1.27 1.40 L2 4.93 5.23 L3 6.85 7.25 L4 1.5 1.7 M 2.6 2.9 R 0.20 0.60 V 0° 8° DocID025859 Rev 3 11/16 16 Package information STH150N10F7-2 Figure 20. H²PAK-2 recommended footprint (dimensions are in mm) 8159712_5 12/16 DocID025859 Rev 3 STH150N10F7-2 5 Packing information Packing information Figure 21. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F K0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v2 DocID025859 Rev 3 13/16 16 Packing information STH150N10F7-2 Figure 22. Reel T REEL DIMENSIONS 40mm min. Access hole At sl ot location B D C N A Full radius G measured at hub Tape slot in core for tape start 25 mm min. width AM08851v2 Table 9. H²PAK-2 tape and reel mechanical data Tape Reel mm mm Dim. 14/16 Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID025859 Rev 3 Min. Max. 330 13.2 26.4 30.4 STH150N10F7-2 6 Revision history Revision history Table 10. Document revision history Date Revision Changes 31-Jan-2014 1 First release. The part number previously included in datasheet DocID024552. 20-Aug-2014 2 Updated title, features and description in cover page. Updated Figure 3: Thermal impedance. 22-Sep-2016 3 Updated Section 4: Package information. Minor text changes. DocID025859 Rev 3 15/16 16 STH150N10F7-2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 16/16 DocID025859 Rev 3