STK38N3LLH5
N-channel 30 V, 1.3 mΩ, 38 A, PolarPAK®
STripFET™ V Power MOSFET
Features
Type
VDSS
STK38N3LLH5
30 V
RDS(on) max RDS(on)*Qg
1.55 mΩ
70.9 nC*mΩ
■
Ultra low top and bottom junction to case
thermal resistance
■
Extremely low on-resistance RDS(on)
■
RDS(on)*Qg industry benchmark
■
High avalanche ruggedness
■
Fully encapsulated die
■
100% Matte tin finish (in compliance with the
2002/95/EC european directive)
■
PolarPAK® is a trademark of VISHAY
PolarPAK®
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Figure 1.
Application
■
Switching applications
Description
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Internal schematic diagram
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This product utilizes the 5th generation of design
rules of ST’s proprietary STripFET™ technology.
The lowest available RDS(on)*Qg, in this chip scale
package, makes this device suitable for the most
demanding DC-DC converter applications, where
high power density is to be achieved.
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Bottom View
Top View
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Table 1.
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Device summary
Order code
Marking
Package
Packaging
STK38N3LLH5
383L5
PolarPAK®
Tape and reel
May 2009
Doc ID 14462 Rev 4
1/15
www.st.com
15
Contents
STK38N3LLH5
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics
.................................... 6
3
Test circuits
.............................................. 8
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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Doc ID 14462 Rev 4
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STK38N3LLH5
1
Electrical ratings
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
30
V
± 22
V
Drain current (continuous) at TC = 25 °C
38
A
Drain current (continuous) at TC = 100 °C
23.75
A
Drain current (pulsed)
152
A
Total dissipation at TC = 25 °C
5.2
W
0.0416
W/°C
VDS
Drain-source voltage (VGS = 0)
VGS
Gate-source voltage
ID
(1)
ID
IDM
(2)
PTOT
(1)
Derating factor
EAS (3)
Single pulse avalanche energy
750
TJ
Tstg
Operating junction temperature
Storage temperature
-55 to 150
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1. When mounted on FR-4 board of 1inch2, 2 oz. Cu. and ≤ 10sec
2. Pulse width limited by package
3. Starting TJ = 25 °C, ID = 22 A, VDD = 50 V
Table 3.
Thermal data
Symbol
Rthj-amb(1)
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Parameter
mJ
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°C
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Typ.
Max.
Unit
Thermal resistance junction-amb
20
24
°C/W
Rthj-c
(2)
Thermal resistance junction-case (top drain)
0.8
1
°C/W
Rthj-c
(3)
Thermal resistance junction-case (source)
2.2
2.7
°C/W
)
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1. When mounted on FR-4 board of 1inch2, 2 oz. Cu. and ≤ 10 sec
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2. Steady state
3. Measured at source pin when the device is mounted on FR-4 board in steady state
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Electrical characteristics
2
STK38N3LLH5
Electrical characteristics
(TCASE=25 °C unless otherwise specified)
Table 4.
On/off
Symbol
Parameter
Test conditions
Drain-source breakdown
voltage
ID = 250 µA, VGS= 0
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = Max rating,
VDS = Max rating,Tc=125°C
IGSS
Gate body leakage current
(VDS = 0)
VGS = ± 22 V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250 µA
RDS(on)
Static drain-source on
resistance
VGS= 10 V, ID= 19 A
VGS= 4.5 V, ID= 19 A
V(BR)DSS
Table 5.
Parameter
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
RG
Gate input resistance
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du
30
Unit
V
1
1
10
µA
µA
±100
nA
2.5
V
)
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mΩ
mΩ
Min.
Typ.
Max.
Unit
-
4640
980
165
-
pF
pF
pF
VDD= 24 V, ID = 38 A
VGS =4.5 V
Figure 14
-
41.7
7.1
24.5
-
nC
nC
nC
f=1 MHz Gate DC Bias = 0
Test signal level = 20 mV
open drain
-
0.4
-
Ω
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VDS =25 V, f=1 MHz, VGS=0
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Max.
1.55
2.15
Test conditions
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Typ.
1.3
1.7
Dynamic
Symbol
Min.
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STK38N3LLH5
Electrical characteristics
Table 6.
Switching times
Symbol
Parameter
td(on)
tr
Turn-on delay time
Rise time
td(off)
tf
Turn-off delay time
Fall time
Table 7.
Test conditions
VDD= 15 V, ID= 19 A,
RG=4.7 Ω, VGS=10 V
Figure 13
Parameter
Test conditions
ISDM (1)
Source-drain current
Source-drain current
(pulsed)
VSD (2)
Forward on voltage
ISD= 19 A, VGS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 38 A, di/dt = 100 A/µs,
VDD=24 V, TJ=150 °C
Figure 18
trr
Qrr
IRRM
Typ.
Max.
Unit
-
11.8
19.6
-
ns
ns
-
52
22
-
ns
ns
Min.
Typ.
Max.
Unit
38
152
A
A
Source drain diode
Symbol
ISD
Min.
-
1. Pulse width limited by package
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
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1.2
43.2
44.7
2.1
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V
ns
nC
A
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Electrical characteristics
STK38N3LLH5
2.1
Electrical characteristics
Figure 2.
Safe operating area
ID
(A)
100
Figure 3.
Thermal impedance
AM03385v1
a is
are (on)
this RDS
n in ax
tio y m
era ed b
p
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Lim
10
10ms
100ms
1
Tj=150°C
Tc=25°C
0.1
1s
Sinlge
pulse
0.01
0.1
Figure 4.
ID
(A)
180
10
1
VDS(V)
Output characteristics
Figure 5.
AM03392v1
5V
VGS=10V
4V
160
100
VDS=3V
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AM03393v1
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150
80
100
60
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40
3V
20
0.1
0.2
0.3
du
0.4
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0.5
50
0
0
0.6 VDS(V)
Normalized BVDSS vs temperaure
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BVDSS
(norm)
AM03388v1
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Figure 7.
1.30
1.05
1.29
1.00
1.28
0.95
1.27
-50
0
50
100
150
TJ(°C)
1
2
3
4
5
1.26
10
Doc ID 14462 Rev 4
VGS(V)
Static drain-source on resistance
AM03386v1
RDS(on)
(mΩ)
1.10
0.90
6/15
ID
(A)
200
120
Figure 6.
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250
140
0
0
Transfer characteristics
)
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VGS=10V
15
20
25
30
35
ID(A)
STK38N3LLH5
Figure 8.
Electrical characteristics
Gate charge vs gate-source voltage Figure 9.
AM03394v1
VGS
(V)
VDD=24V
12
Capacitance variations
AM03395v1
C
(pF)
7000
ID=38A
6000
10
5000
Ciss
8
4000
6
3000
4
2000
2
Coss
1000
Crss
VDS(V)
0
0
20
0
40
0
Qg(nC)
80
60
Figure 10. Normalized gate threshold voltage
vs temperature
AM03389v1
VGS(th)
(norm)
1.2
5
0.8
20
25
30
uc
RDS(on)
(norm)
2.1
)
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AM03387v1
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1.3
0.6
15
Figure 11. Normalized on resistance vs
temperature
1.7
1.0
10
0.9
0.4
)
s
(
ct
0.2
-50
0
50
100
150
0.5
TJ(°C)
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-50
0
50
100
150
TJ(°C)
Figure 12. Source-drain diode forward
characteristics
r
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VSD
(V)
TJ=175°C
t
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0.9
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bs
AM03390v1
0.8
TJ=25°C
0.7
0.6
TJ=-50°C
0.5
0.4
10
15
20
25
30
35
ISD(A)
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Test circuits
3
STK38N3LLH5
Test circuits
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
µF
2200
RL
µF
VGS
IG=CONST
VDD
100Ω
Vi=20V=VGMAX
VD
RG
2200
µF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
)
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AM01469v1
c
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Figure 15. Test circuit for inductive load
Figure 16. Unclamped inductive load test
switching and diode recovery times
circuit
A
A
D.U.T.
FAST
DIODE
B
B
A
e
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D
G
VD
L=100µH
S
3.3
µF
B
25 Ω
1000
µF
D
G
RG
S
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VDD
t
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VDD
2200
µF
3.3
µF
VDD
ID
Vi
D.U.T.
Pw
AM01470v1
Figure 17. Unclamped inductive waveform
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AM01471v1
Figure 18. Switching time waveform
ton
V(BR)DSS
tdon
VD
toff
tr
tdoff
tf
90%
90%
IDM
10%
ID
10%
0
VDD
VDS
90%
VGS
AM01472v1
8/15
0
Doc ID 14462 Rev 4
10%
AM01473v1
STK38N3LLH5
Test circuits
Figure 19. Gate charge waveform
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Qgd
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Package mechanical data
4
STK38N3LLH5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
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STK38N3LLH5
Package mechanical data
Table 8.
PolarPAK® (option “L”) mechanical data
mm
inch
Ref.
A
Min.
Typ.
Max.
Min.
Typ.
Max.
0.75
0.80
0.85
0.030
0.031
0.033
A1
0.05
b1
0.48
0.58
0.68
0.019
0.023
0.027
b2
0.41
0.51
0.61
0.016
0.020
0.024
b3
2.19
2.29
2.39
0.086
0.090
0.094
b4
0.89
1.04
1.19
0.035
0.041
0.047
b5
0.23
0.33
0.43
0.009
0.013
0.017
c
0.20
0.25
0.30
0.008
0.010
0.012
D
6
6.15
6.30
0.236
0.242
0.248
D1
5.74
5.89
6.04
0.226
0.232
E
5.01
5.16
5.31
0.197
0.203
E1
4.75
4.90
5.05
0.187
0.193
H1
0.23
H2
0.45
H3
0.31
H4
0.45
K1
4.22
4.37
K2
1.08
1.13
K3
1.37
K4
0.24
M1
4.30
)
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3.43
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0.009
0.56
0.41
0.51
so
0.56
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M2
t
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0.002
b
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-
0.012
uc
od
0.018
)
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0.238
0.209
0.199
0.022
0.016
0.018
0.020
0.022
4.52
0.166
0.172
0.178
1.18
0.043
0.044
0.046
0.054
0.009
4.50
4.70
0.169
0.177
0.185
3.58
3.73
0.135
0.141
0.147
0.22
0.009
M4
0.05
0.002
P1
0.15
0.20
0.25
0.006
0.008
0.010
T1
3.48
3.64
4.10
0.137
0.143
0.161
T2
0.56
0.76
0.95
0.022
0.030
0.037
T3
1.20
0.047
T4
3.90
0.154
0.007
0.014
10°
12°
T5
<
0°
0.18
0.36
10°
12°
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Package mechanical data
STK38N3LLH5
Figure 20. PolarPAK® (option “L”) drawings
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STK38N3LLH5
Package mechanical data
Figure 21. Recommended PAD layout
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Revision history
5
STK38N3LLH5
Revision history
Table 9.
Document revision history
Date
Revision
Changes
19-Feb-2008
1
First release
28-Apr-2008
2
RDS(on) value has been update in Table 4
03-Sep-2008
3
VGS value has been update on Table 2 and Table 4
06-May-2009
4
Document status promoted from preliminary data to datasheet
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STK38N3LLH5
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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