STL105NS3LLH7

STL105NS3LLH7 N-channel 30 V, 0.0033 Ω typ., 27 A STripFET™ H7 Power MOSFET plus monolithic Schottky in a PowerFLAT™ 5x6 Datasheet - production data Features Order code VDS RDS(on) max ID STL105NS3LLH7 30 V 0.0039 Ω 27 A • Very low on-resistance 1 • Very low Qg 2 3 4 • Avalanche high ruggedness • Embedded Schottky diode PowerFLAT ™5x6 Applications • Switching applications Figure 1. Internal schematic diagram D(5, 6, 7, 8) 8 7 6 5 1 2 3 4 Description This device exhibits low on-state resistance and capacitance for improved conduction and switching performance. G(4) S(1, 2, 3) Top View AM15540v3 Table 1. Device summary Order code Marking Package Packaging STL105NS3LLH7 105NS3LL PowerFLATTM 5x6 Tape and reel April 2015 This is information on a product in full production. DocID024624 Rev 4 1/16 www.st.com 16 Contents STL105NS3LLH7 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuits 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 .............................................. 8 DocID024624 Rev 4 STL105NS3LLH7 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage ± 20 V Drain current (continuous) at TC = 25 °C 105 A ID (1) ID(1) Drain current (continuous) at TC = 100 °C 65 A (1)(2) Drain current (pulsed) 420 A ID (3) Drain current (continuous) at Tpcb = 25 °C 27 A ID (3) Drain current (continuous) at Tpcb = 100 °C 16 A IDM(2)(3) Drain current (pulsed) 108 A PTOT(1) Total dissipation at TC = 25 °C 62.5 W PTOT(2) Total dissipation at Tpcb = 25 °C 4 W -55 to 150 °C Value Unit IDM Tstg Tj Storage temperature Operating junction temperature 1. This value is rated according to Rthj-c 2. Pulse width limited by safe operating area. 3. This value is rated according to Rthj-pcb Table 3. Thermal data Symbol Parameter Rthj-pcb(1) Thermal resistance junction-pcb max 31.3 °C/W Rthj-case Thermal resistance junction-case max 2 °C/W 1. When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 sec DocID024624 Rev 4 3/16 Electrical characteristics 2 STL105NS3LLH7 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage ID = 1 mA, VGS = 0 V IDSS Zero gate voltage drain current VGS = 0 V VDS = 24 V 500 µA IGSS Gate-body leakage current VGS = ± 20 V, VDS = 0 V ±100 nA V(BR)DSS VGS(th) Gate threshold voltage VDS = VGS, ID = 1 mA RDS(on) Static drain-source on-resistance 30 V 1.2 V VGS = 10 V, ID = 13.5 A 0.0033 0.0039 Ω VGS = 4.5 V, ID = 13.5 A 0.0044 0.0055 Ω Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 15 V, ID = 27 A, VGS = 4.5 V (see Figure 11) Min. Typ. Max. Unit - 2110 - pF - 640 - pF - 42 - pF - 13.7 - nC - 7.5 - nC - 3.3 - nC Table 6. Switching times Symbol td(on) tr td(off) tf 4/16 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 15 V, ID = 13.5 A, RG = 4.7 Ω, VGS = 4.5 V Fall time DocID024624 Rev 4 Min. Typ. Max. Unit - 26.4 - ns - 10.4 - ns - 31.8 - ns - 12.5 - ns STL105NS3LLH7 Electrical characteristics Table 7. Source drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 27 A ISDM (1) Source-drain current (pulsed) - 108 A VSD (2) Forward on voltage 0.7 V trr ISD = 2 A, VGS = 0 V Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ID = 2 A, di/dt = 100 A/µs VDD = 20 V - 0.4 - 35.2 ns - 26.4 nC - 1.5 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID024624 Rev 4 5/16 Electrical characteristics 2.1 STL105NS3LLH7 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM17920v1 ID (A) is rea s a (on) S thi in x RD n tio y ma b era Op ited Lim 100 AM17927v1 K δ=0.5 0.5 0.2 10 -1 0.05 10 0.02 1 10ms 100ms 1s 0.1 Single pulse Tj=150°C Tpcb=25°C Single pulse 0.01 0.1 10 10 1 10 -5 10 -4 10 -3 -1 10 -2 10 10 0 10 1 tp(s) Figure 5. Transfer characteristics AM17921v1 VGS=6, 7, 8, 9, 10V 180 -3 VDS(V) Figure 4. Output characteristics ID (A) pcb 0.01 10 -2 5V 160 AM17922v1 ID (A) 140 VDS=3V 120 4V 140 120 100 100 80 80 60 60 40 40 3V 20 20 2V 0 0 1.5 3 4.5 Figure 6. Gate charge vs gate-source voltage AM17923v1 VGS (V) VDD=15V ID=27A 12 0 VDS(V) 0 1 2 3 4 6 5 7 VGS(V) Figure 7. Static drain-source on-resistance AM17924v1 RDS(on) (mΩ) VGS=10V 3.50 10 3.40 8 3.30 6 3.20 4 3.10 2 0 0 6/16 10 20 30 3.00 Qg(nC) DocID024624 Rev 4 0 5 10 15 20 25 ID(A) STL105NS3LLH7 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized on-resistance vs temperature AM17925v1 C (pF) AM17926v1 RDS(on) (norm) ID=13.5A 1.6 2500 Ciss 2000 1.4 1500 1.2 1000 1 Coss 500 0 0 10 20 Crss VDS(V) 0.8 0.6 -75 -50 -25 0 DocID024624 Rev 4 25 50 75 100 125 TJ(°C) 7/16 Test circuits 3 STL105NS3LLH7 Test circuits Figure 10. Switching times test circuit for resistive load Figure 11. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 12. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 13. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 14. Unclamped inductive waveform Figure 15. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/16 0 DocID024624 Rev 4 10% AM01473v1 STL105NS3LLH7 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID024624 Rev 4 9/16 Package information STL105NS3LLH7 Figure 16. PowerFLAT™ 5x6 type F outline 8 7 6 5 1 2 3 4 8472137_A 10/16 DocID024624 Rev 4 STL105NS3LLH7 Package information Table 8. PowerFLAT™ 5x6 type F package mechanical data mm Dim. Min. Typ. Max. A 0.90 0.95 1.00 b 0.35 0.40 0.45 c 0.21 0.25 0.34 D 5.10 D1 4.80 4.90 5.00 D2 3.91 4.01 4.11 e 1.17 1.27 1.37 E 5.90 6.00 6.10 E1 5.70 5.75 5.80 E2 3.34 3.44 3.54 H 0.51 0.61 0.71 K 1.10 L 0.51 0.61 0.71 L1 0.06 0.13 0.20 L2 0.10 P 1.00 1.10 1.20 Θ 8° 10° 12° DocID024624 Rev 4 11/16 Package information STL105NS3LLH7 Figure 17. PowerFLAT™ 5x6 type F recommended footprint(a) 8472137_A_fp a. All dimensions are in mm. 12/16 DocID024624 Rev 4 STL105NS3LLH7 Packing information Figure 18. PowerFLAT™ 5x6 tape(b) P0 4.0±0.1 (II) P2 2.0±0.1 (I) T (0.30 ±0.05) E1 1.75±0.1 Y 0. 20 Do Ø1.55±0.05 W(12.00±0.3) F(5.50±0.1)(III) C L R EF D1 Ø1.5 MIN. Bo (5.30±0.1) 5 Packing information REF .R0 .50 Y P1(8.00±0.1) Ao(6.30±0.1) Ko (1.20±0.1) SECTION Y-Y (I) Measured from centerline of sprocket hole to centerline of pocket. Base and bulk quantity 3000 pcs (II) Cumulative tolerance of 10 sprocket holes is ± 0.20 . (III) Measured from centerline of sprocket hole to centerline of pocket. 8234350_Tape_rev_C Figure 19. PowerFLAT™ 5x6 package orientation in carrier tape. Pin 1 identification b. All dimensions are in millimeters. DocID024624 Rev 4 13/16 Packing information STL105NS3LLH7 Figure 20. PowerFLAT™ 5x6 reel R0.60 W3 11.9/15.4 PART NO. 1.90 2.50 R25.00 ØN 178(±2.0) ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES W2 18.4 (max) A 330 (+0/-4.0) 4.00 2.50 77 ESD LOGO W1 12.4 (+2/-0) 06 PS ØA 128 2.20 R1.10 Ø21.2 All dimensions are in millimeters 13.00 CORE DETAIL 8234350_Reel_rev_C 14/16 DocID024624 Rev 4 STL105NS3LLH7 6 Revision history Revision history Table 9. Document revision history Date Revision Changes 07-May-2013 1 First release. 11-Jun-2013 2 – Changed: Description – Minor text changes 22-Nov-2013 3 – – – – – – 13-Apr-2015 4 – Document status promoted from preliminary to production data. – Minor text changes. Modified: ID (at TC = 100 °C) and ID (at Tpcb = 100 °C) in Table 2 Modified: PTOT and TJ values in Table 2 Modified: RDS(on) values in Table 4 Modified: the entire typical values in Table 5, 6 and 7 Added:Section 2.1: Electrical characteristics (curves) Minor text changes DocID024624 Rev 4 15/16 STL105NS3LLH7 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 16/16 DocID024624 Rev 4