STL12N65M5

STL12N65M5 N-channel 650 V, 0.475 Ω typ., 8.5 A MDmesh™ V Power MOSFET in a PowerFLAT™ 5x6 HV package Datasheet − production data Features Order code VDSS RDS(on) max ID STL12N65M5 710 V 0.530 Ω 8.5 A • Outstanding RDS(on)*area • Extremely large avalanche performance 1 2 3 • Gate charge minimized 4 PowerFLAT TM • Very low intrinsic capacitance 5x6 HV • 100% avalanche tested Applications Figure 1. Internal schematic diagram • Switching applications Description ' This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. * 6 $0Y Table 1. Device summary Order code Marking Package Packaging STL12N65M5 12N65M5 PowerFLAT™ HV Tape and reel July 2013 This is information on a product in full production. DocID17450 Rev 4 1/17 www.st.com 17 Contents STL12N65M5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 .............................................. 9 DocID17450 Rev 4 STL12N65M5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 650 V VGS Gate-source voltage ± 25 V Drain current (continuous) at TC = 25 °C 8.5 A Drain current (continuous) at TC = 100 °C 4 A Drain current (pulsed) 34 A Total dissipation at TC = 25 °C 48 W IAR Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) 1.9 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 130 mJ Peak diode recovery voltage slope 15 V/ns ID (1) ID (1) IDM (1),(2) PTOT(1) dv/dt (3) Tstg Storage temperature °C - 55 to 150 Tj Max. operating junction temperature °C 1. Limited by maximum junction temperature 2. Pulse width limited by safe operating area. 3. ISD ≤ 8.5 A, di/dt ≤ 400 A/μs, VPeak ≤ V(BR)DSS, VDD = 400 V. Table 3. Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max 2.6 °C/W Rthj-pcb(1) Thermal resistance junction-pcb max 59 °C/W 1. When mounted on 1inch² FR-4 board, 2 oz Cu. DocID17450 Rev 4 3/17 Electrical characteristics 2 STL12N65M5 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. On /off states Symbol V(BR)DSS IDSS IGSS Parameter Drain-source breakdown voltage (VGS = 0) Test conditions ID = 1 mA Min. Typ. Unit 650 V VDS = 650 V Zero gate voltage drain current (VGS = 0) VDS = 650 V, TC=125 °C Gate-body leakage current (VDS = 0) Max. 1 μA 100 μA ± 100 nA 4 5 V 0.475 0.530 Ω Min. Typ. Max. Unit - 644 - pF - 18 - pF - 2.5 - pF - 55 - pF - 17 - pF f = 1 MHz open drain - 5 - Ω VDD = 520 V, ID = 4.5 A, VGS = 10 V (see Figure 16) - 17 - nC - 4.6 - nC - 8.5 - nC VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 μA RDS(on) Static drain-source onVGS = 10 V, ID = 4.25 A resistance 3 Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Equivalent capacitance time related Co(er)(2) Equivalent capacitance energy related Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 VDS = 0 to 520 V, VGS = 0 RG Intrinsic gate resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge 1. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. Coss eq. energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/17 DocID17450 Rev 4 STL12N65M5 Electrical characteristics Table 6. Switching times Symbol td (v) Parameter Voltage delay time tr(v) Voltage rise time tf(i) Current fall time tc(off) Test conditions VDD = 400 V, ID = 6 A, RG = 4.7 Ω, VGS = 10 V (see Figure 17), (see Figure 20) Crossing time Min. Typ. Max Unit - 23 - ns - 10 - ns - 13.5 - ns - 13 - ns Min. Typ. Table 7. Source drain diode Symbol ISD (1) ISDM (1),(2) VSD (3) trr Parameter Test conditions Max. Unit Source-drain current - 8.5 A Source-drain current (pulsed) - 34 A - 1.5 V Forward on voltage ISD = 8.5 A, VGS = 0 Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 8.5 A, di/dt = 100 A/μs VDD = 60 V (see Figure 17) ISD = 8.5 A, di/dt = 100 A/μs VDD = 60 V, Tj = 150 °C (see Figure 17) - 232 ns - 2 μC - 17.5 A - 328 ns - 2.8 μC - 17 A 1. Limited by maximum junction temperature 2. Pulse width limited by safe operating area 3. Pulsed: pulse duration = 300 μs, duty cycle 1.5% DocID17450 Rev 4 5/17 Electrical characteristics STL12N65M5 Electrical characteristics (curves) 2.1 Figure 2. Safe operating area Figure 3. Thermal impedance AM15896v1 ID (A) ZthPowerFlat_5x6_19 K δ=0.5 0.2 10 is ea ar on) 10 µs is S( th x RD a n io y m at b er ted p O imi L in 1 0.1 10 -1 0.05 0.02 0.01 100 µs 1ms 10ms 10 -2 Single pulse 0.1 Tj=150°C Tc=25°C Single pulse 0.01 0.1 10 1 10 -3 10-6 VDS(V) 100 Figure 4. Output characteristics 10-4 10-3 10 -2 10 -1 10 tp(s) Figure 5. Transfer characteristics AM15897v1 ID (A) 16 10-5 VGS=9, 10V 8V 14 AM15898v1 ID (A) 16 VDS=25V 14 12 12 7V 10 10 8 8 6 6 4 4 2 2 6V 0 0 0 5 10 20 15 VDS(V) 25 Figure 6. Static drain-source on-resistance AM15899v1 RDS(on) (Ω) 0.575 VGS=10 V 3 4 5 7 8 9 VDS(V) Figure 7. Gate charge vs gate-source voltage VGS (V) AM15900v1 VDS ID=4.5A VDD=520V VDS 12 0.55 6 (V) 500 10 400 0.525 8 0.5 300 6 0.475 0.45 4 0.425 2 0.4 0 6/17 1 2 3 4 5 6 7 8 ID(A) DocID17450 Rev 4 200 100 0 0 5 10 15 20 0 Qg(nC) STL12N65M5 Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy AM15903v1 C (pF) 1000 AM15901v1 Eoss (μJ) 3.5 3 Ciss 2.5 2 100 1.5 Coss 10 1 0.5 Crss 1 0.1 100 10 1 0 0 VDS(V) Figure 10. Normalized gate threshold voltage vs temperature AM05459v1 VGS(th) (norm) 1.10 ID = 250 μA VDS = VGS 100 200 300 400 500 600 VDS(V) Figure 11. Normalized on-resistance vs temperature AM05460v1 RDS(on) (norm) 2.1 1.9 1.00 VGS= 10V ID= 4.25 A 1.7 1.5 1.3 0.90 1.1 0.80 0.9 0.7 0.70 -50 -25 0 25 50 Figure 12. Source-drain diode forward characteristics AM05461v1 VSD (V) 0.5 -50 -25 TJ(°C) 75 100 0 25 50 75 100 TJ(°C) Figure 13. Normalized VDS vs temperature $0Y 9'6 QRUP TJ=-50°C  1.2 ,'Ć ĆP$  1.0  0.8  TJ=25°C  0.6 TJ=150°C  0.4  0.2 0  0 10 20 30 40 50 ISD(A)    DocID17450 Rev 4      7-ƒ& 7/17 Electrical characteristics STL12N65M5 Figure 14. Switching losses vs gate resistance (1) AM15902v1 E (µJ) VDD=400V VGS=10V ID=6A 100 Eon 80 60 40 Eoff 20 0 0 10 20 30 40 RG(Ω) 1. Eon including reverse recovery of a SiC diode 8/17 DocID17450 Rev 4 STL12N65M5 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 17. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 18. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 19. Unclamped inductive waveform V(BR)DSS Figure 20. Switching time waveform Concept waveform for Inductive Load Turn-off Id VD 90%Vds 90%Id Tdelay-off -off IDM Vgs 90%Vgs on ID Vgs(I(t)) )) VDD VDD 10%Id 10%Vds Vds Trise AM01472v1 DocID17450 Rev 4 Tfall Tcross --over AM05540v2 9/17 Package mechanical data 4 STL12N65M5 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/17 DocID17450 Rev 4 STL12N65M5 Package mechanical data Table 8. PowerFLAT™ 5x6 HV mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 0.50 D 5.00 5.20 5.40 E 5.95 6.15 6.35 D2 4.30 4.40 4.50 E2 3.10 3.20 3.30 e 1.27 L 0.50 0.55 0.60 K 1.90 2.00 2.10 DocID17450 Rev 4 11/17 Package mechanical data STL12N65M5 Figure 21. PowerFLAT™ 5x6 HV drawing 8368143_Rev_B 12/17 DocID17450 Rev 4 STL12N65M5 Package mechanical data Figure 22. PowerFLAT™ 5x6 HV recommended footprint (dimensions are in mm) 8368143_Rev_B_footprint DocID17450 Rev 4 13/17 Packaging mechanical data 5 STL12N65M5 Packaging mechanical data Figure 23. PowerFLAT™ 5x6 tape(a) P0 4.0±0.1 (II) P2 2.0±0.1 (I) T (0.30 ±0.05) E1 1.75±0.1 Y 0. 20 Do Ø1.55±0.05 W(12.00±0.3) F(5.50±0.1)(III) R Bo (5.30±0.1) C L EF D1 Ø1.5 MIN. REF .R0 .50 Y P1(8.00±0.1) Ao(6.30±0.1) Ko (1.20±0.1) SECTION Y-Y (I) Measured from centerline of sprocket hole to centerline of pocket. Base and bulk quantity 3000 pcs (II) Cumulative tolerance of 10 sprocket holes is ± 0.20 . (III) Measured from centerline of sprocket hole to centerline of pocket. 8234350_Tape_rev_C Figure 24. PowerFLAT™ 5x6 package orientation in carrier tape. Pin 1 identification a. All dimensions are in millimeters. 14/17 DocID17450 Rev 4 STL12N65M5 Packaging mechanical data Figure 25. PowerFLAT™ 5x6 reel R0.60 W3 11.9/15.4 PART NO. 1.90 2.50 R25.00 ØN 178(±2.0) ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES W2 18.4 (max) A 330 (+0/-4.0) 4.00 2.50 77 ESD LOGO W1 12.4 (+2/-0) 06 PS ØA 128 2.20 R1.10 Ø21.2 All dimensions are in millimeters 13.00 CORE DETAIL 8234350_Reel_rev_C DocID17450 Rev 4 15/17 Revision history 6 STL12N65M5 Revision history Table 9. Document revision history Date Revision 30-Apr-2010 1 First release 2 Document status promoted from preliminary data to datasheet: – Added Section 2.1: Electrical characteristics (curves) – Added Section 5: Packaging mechanical data Minor text changes 3 – – – – – 4 – Minor text changes – Modified: Table 6: Switching times – Updated: Section 4: Package mechanical data 22-Nov-2011 08-Jul-2013 17-Jul-2013 16/17 Changes Changed: package Modified: ID (at TC=100 °C), PTOT value Deleted: ID at Tamb=25 °C and 100 °C Modified: note 1 and 3 in Table 2, RG in Table 5, ISD in Table 7 Changed: figures in Section 2.1: Electrical characteristics (curves) DocID17450 Rev 4 STL12N65M5 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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