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STL16N65M5

STL16N65M5

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    PowerFlat™HV-4

  • 描述:

    MOSFET N-CH 650V HV POWERFLAT

  • 数据手册
  • 价格&库存
STL16N65M5 数据手册
STL16N65M5 N-channel 650 V, 0.270 Ω, 12 A PowerFLAT™ 8x8 HV MDmesh™ V Power MOSFET Features Order code VDSS @ TJmax RDS(on) max ID STL16N65M5 710 V < 0.299 Ω 12 A (1) 3 3 3 "OTTOMVIEW ' $ 1. The value is rated according to Rthj-case ■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance 0OWER&,!4˜X(6 Applications ■ Switching applications Description Figure 1. This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. Internal schematic diagram $ ' 3 !-V Table 1. Device summary Order code Marking Package Packaging STL16N65M5 16N65M5 PowerFLAT™ 8x8 HV Tape and reel November 2011 Doc ID 17448 Rev 5 1/15 www.st.com 15 Contents STL16N65M5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 .............................................. 9 Doc ID 17448 Rev 5 STL16N65M5 1 Electrical ratings Electrical ratings Table 2. Symbol Absolute maximum ratings Parameter Value Unit VDS Drain-source voltage (VGS = 0) 650 V VGS Gate-source voltage ± 25 V Drain current (continuous) at TC = 25 °C 12 A Drain current (continuous) at TC = 100 °C 7.4 A ID (1) ID (1) IDM (1),(2) Drain current (pulsed) 48 A ID(3) Drain current (continuous) at Tamb = 25 °C 2 A ID(3) Drain current (continuous) at Tamb = 100 °C 1.3 A 8 A Total dissipation at Tamb = 25 °C 3 W Total dissipation at TC = 25 °C 90 W IAR Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) 4 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 200 mJ Peak diode recovery voltage slope 15 V/ns - 55 to 150 °C 150 °C Value Unit 1.38 °C/W 45 °C/W IDM(2),(3) Drain current (pulsed) PTOT (3) PTOT(1) dv/dt (4) Tstg Tj Storage temperature Max. operating junction temperature 1. The value is rated according to Rthj-case 2. Pulse width limited by safe operating area 3. When mounted on FR-4 board of inch², 2oz Cu 4. ISD ≤ 12 A, di/dt ≤ 400 A/µs, VPeak < V(BR)DSS, VDD = 400 V Table 3. Symbol Rthj-case Thermal data Parameter Thermal resistance junction-case max Rthj-amb(1) Thermal resistance junction-amb max 1. When mounted on 1inch² FR-4 board, 2 oz Cu Doc ID 17448 Rev 5 3/15 Electrical characteristics 2 STL16N65M5 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. Symbol V(BR)DSS On /off states Parameter Test conditions Drain-source breakdown voltage (VGS = 0) ID = 1 mA Min. Typ. Max. Unit 650 V IDSS VDS = 650 V Zero gate voltage drain current (VGS = 0) VDS = 650 V, TC=125 °C 1 100 µA µA IGSS Gate-body leakage current (VDS = 0) 100 nA 4 5 V 0.270 0.299 Ω Min. Typ. Max. Unit - 1250 30 3 - pF pF pF - 100 - pF - 30 - pF VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on resistance Table 5. Symbol Ciss Coss Crss 3 VGS = 10 V, ID = 6 A Dynamic Parameter Input capacitance Output capacitance Reverse transfer capacitance Co(tr)(1) Equivalent capacitance time related Co(er)(2) Equivalent capacitance energy related Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 VDS = 0 to 520 V, VGS = 0 RG Intrinsic gate resistance f = 1 MHz open drain - 2 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 520 V, ID = 6 A, VGS = 10 V (see Figure 16) - 31 8 12 - nC nC nC 1. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. Coss eq. energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/15 Doc ID 17448 Rev 5 STL16N65M5 Electrical characteristics Table 6. Symbol td (v) tr (v) tf (i) tc(off) Table 7. Switching times Parameter Test conditions Voltage delay time Voltage rise time Current fall time Crossing time VDD = 400 V, ID = 8 A, RG = 4.7 Ω, VGS = 10 V (see Figure 17), (see Figure 20) Parameter ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage IRRM trr Qrr IRRM Typ. - 25 7 6 8 Min. Typ. Max Unit - ns ns ns ns Source drain diode Symbol trr Qrr Min. Test conditions Max. Unit - 12 48 A A ISD = 12 A, VGS = 0 - 1.5 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 12 A, di/dt = 100 A/µs VDD = 100 V (see Figure 17) - 300 3.5 23 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 12 A, di/dt = 100 A/µs VDD = 100 V, Tj = 150 °C (see Figure 17) - 350 4 24 ns µC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Doc ID 17448 Rev 5 5/15 Electrical characteristics STL16N65M5 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM10357v1 ID (A) Zth PowerFLAT 8x8 HV K δ=0.5 10 O Li per m at ite io d ni by n m this ax a R rea is 0.2 D S( on ) 10µs 1 0.1 100µs -1 10 0.05 1ms 0.02 0.01 10ms 0.1 Tj=150°C Tc=25°C Single pulse -2 0.01 0.1 Figure 4. ID (A) Single pulse 10 1 100 10 -5 10 VDS(V) Output characteristics Figure 5. AM03178v1 VGS=10V -4 -2 -3 10 10 10 tp (s) Transfer characteristics AM03179v1 ID (A) VDS=10V 7.5V 20 20 7V 15 15 6.5V 10 10 6V 5 5 5.5V 0 0 Figure 6. 2 6 4 8 10 12 14 16 18 0 VDS(V) Normalized BVDSS vs temperature AM03187v1 BVDSS (norm) ID=1mA 3 Figure 7. 4 5 6 7 8 9 VGS(V) Static drain-source on resistance AM10358v1 RDS(on) (Ω) VGS=10V 1.07 0.29 1.05 0.28 1.03 0.27 1.01 0.99 0.26 0.97 0.25 0.95 0.93 -50 -25 6/15 0.24 0 25 50 75 100 TJ(°C) Doc ID 17448 Rev 5 0 2 4 6 8 10 12 ID(A) STL16N65M5 Figure 8. Electrical characteristics Output capacitance stored energy AM03312v1 Eoss (µJ) 7 Figure 9. Capacitance variations AM03183v1 C (pF) 10000 6 5 Ciss 1000 4 100 3 Coss 2 10 Crss 1 0 0 100 200 300 400 500 600 1 0.1 VDS(V) 1 10 100 VDS(V) Figure 10. Gate charge vs gate-source voltage Figure 11. Normalized on resistance vs temperature AM03182v1 VGS (V) (norm) VDD=520V VGS=10V ID=6A 12 VDS AM03185v1 RDS(on) VGS=10V ID=6.5V 2.1 500 1.9 10 400 8 1.7 1.5 300 6 200 4 1.3 1.1 0.9 100 2 0 0 5 10 15 20 25 30 35 Qg(nC) Figure 12. Normalized gate threshold voltage vs temperature AM03184v1 VGS(th) (norm) ID=250µA 1.10 0.7 0.5 -50 0 50 TJ(°C) 100 Figure 13. Source-drain diode forward characteristics AM03186v1 VSD (V) 1.0 TJ=-25°C 0.9 1.00 0.8 0.90 TJ=25°C 0.7 TJ=150°C 0.6 0.80 0.5 0.70 -50 0.4 0 50 100 TJ(°C) Doc ID 17448 Rev 5 0 5 10 ISD(A) 7/15 Electrical characteristics STL16N65M5 Figure 14. Switching losses vs gate resistance (1) AM10359v1 E (μJ) ID=18A L=50µH VDD=400V 100 Eon 80 60 Eoff 40 20 0 0 10 20 30 40 RG(Ω) 1. Eon including reverse recovery of a SiC diode 8/15 Doc ID 17448 Rev 5 STL16N65M5 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 19. Unclamped inductive waveform V(BR)DSS AM01471v1 Figure 20. Switching time waveform Concept waveform for Inductive Load Turn-off Id VD 90%Vds 90%Id Tdelay-off -off IDM Vgs 90%Vgs on ID Vgs(I(t)) )) VDD VDD 10%Id 10%Vds Vds Trise AM01472v1 Doc ID 17448 Rev 5 Tfall Tcross --over AM05540v1 9/15 Package mechanical data 4 STL16N65M5 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10/15 Doc ID 17448 Rev 5 STL16N65M5 Package mechanical data Table 8. PowerFLAT™ 8x8 HV mechanical data mm Dim. Min. Typ. Max. A 0.80 0.90 1.00 A1 0.00 0.02 0.05 b 0.95 1.00 1.05 D 8.00 E 8.00 D2 7.05 7.20 7.30 E2 4.15 4.30 4.40 e L 2.00 0.40 0.50 aaa 0.10 bbb 0.10 ccc 0.10 Doc ID 17448 Rev 5 0.60 11/15 Package mechanical data STL16N65M5 Figure 21. PowerFLAT™ 8x8 HV drawing mechanical data BOTTOM VIEW b CA B L bbb 0.40 E2 PIN#1 ID D2 C A ccc C A1 0.20±0.008 SIDE VIEW SEATING PLANE 0.08 C D A B E INDEX AREA aaa C TOP VIEW aaa C 8222871_Rev_B 12/15 Doc ID 17448 Rev 5 STL16N65M5 Package mechanical data Figure 22. PowerFLAT™ 8x8 HV recommended footprint 0.60 7.70 4.40 7.30 2.00 1.05 Footprint Doc ID 17448 Rev 5 13/15 Revision history 5 STL16N65M5 Revision history Table 9. 14/15 Document revision history Date Revision Changes 30-Apr-2010 1 First release 08-Jun-2010 2 VGS value has been changed in Table 4 10-Feb-2011 3 Modified RDS(on) value 28-Jul-2011 4 Document status promoted from preliminary data to datasheet Added Section 2.1: Electrical characteristics (curves) Minor text changes 03-Nov-2011 5 Section 4: Package mechanical data has been modified. Doc ID 17448 Rev 5 STL16N65M5 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 17448 Rev 5 15/15
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