STL17N3LLH6

STL17N3LLH6 N-channel 30 V, 0.0038 Ω 17 A PowerFLAT™(3.3x3.3) , STripFET™ VI DeepGATE™ Power MOSFET Features Order code STL17N3LLH6 VDSS 30 V RDS(on) max. 0.0045 Ω ID 17 A (1) 1. The value is rated according Rthj-pcb ■ ■ ■ ■ ■ RDS(on) * Qg industry benchmark Extremely low on-resistance RDS(on) High avalanche ruggedness Low gate drive power losses Very low switching gate charge Figure 1. Pin-out configuration 1 2 3 4 S S S G PowerFLAT™ (3.3 x 3.3) Application Switching applications Description This product utilizes the 6th generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in a standard package, that makes it suitable for the most demanding DC-DC converter applications, where high power density has to be achieved. D 8 D 7 D 6 D 5 BOTTOM VIEW Table 1. Device summary Marking 17N3L Package PowerFLAT™ (3.3 x 3.3) Packaging Tape and reel Order code STL17N3LLH6 November 2010 Doc ID 15535 Rev 3 1/13 www.st.com 13 Contents STL17N3LLH6 Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 4 5 Test circuits .............................................. 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 Doc ID 15535 Rev 3 STL17N3LLH6 Electrical ratings 1 Electrical ratings Table 2. Symbol VDS VGS ID (1) Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25 °C Drain current (continuous) at TC = 100 °C Drain current (pulsed) Total dissipation at TC = 25 °C Total dissipation at TC = 25 °C Derating factor Value 30 ± 20 17 11 68 50 2 0.03 -55 to 150 Unit V V A A A W W W/°C °C ID (1) IDM (2) (3) (1) PTOT PTOT TJ Tstg Operating junction temperature Storage temperature 1. The value is rated according Rthj-pcb 2. Pulse width limited by safe operating area 3. The value is rated according Rthj-c Table 3. Symbol Rthj-case Rthj-pcb (1) Thermal resistance Parameter Thermal resistance junction-case (drain) (steady state) Thermal resistance junction-pcb Thermal resistance junction-pcb Value 2.5 42.8 63.5 Unit °C/W °C/W °C/W Rthj-pcb(2) 2. Steady state 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec Doc ID 15535 Rev 3 3/13 Electrical characteristics STL17N3LLH6 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250 µA, VGS = 0 VDS = Max rating, VDS = Max rating @125 °C VGS = ±20 V VDS = VGS, ID = 250 µA VGS = 10 V, ID = 8.5 A VGS = 4.5 V, ID = 8.5 A 1 0.0038 0.0057 0.0045 0.0073 Min. 30 1 10 ±100 Typ. Max. Unit V µA µA nA V Ω Ω Table 5. Symbol Ciss Coss Crss Qg Qgs Qgd RG Dynamic Parameter Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Gate input resistance Test conditions Min. Typ. 1690 290 176 17 8 6 1.7 Max. Unit pF pF pF nC nC nC Ω VDS = 25 V, f=1 MHz, VGS=0 VDD = 15 V, ID = 17 A VGS = 4.5 V (see Figure 14) f=1 MHz Gate DC Bias = 0 Test signal level = 20 mV open drain - - - - - - Table 6. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD= 15V, ID = 8.5A, RG = 4.7Ω, VGS = 10V (see Figure 13) Min. Typ. 9.5 30 37 12 Max. Unit ns ns ns ns - - 4/13 Doc ID 15535 Rev 3 STL17N3LLH6 Electrical characteristics Table 7. Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 17 A, VGS = 0 ISD = 17 A, di/dt = 100 A/µs, VDD= 25 V Test conditions Min. 24 16.8 1.4 Typ. Max. 17 68 1.1 Unit A A V ns nC A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration=300µs, duty cycle 1.5% Doc ID 15535 Rev 3 5/13 Electrical characteristics STL17N3LLH6 2.1 Figure 2. ID (A) 100 Electrical characteristics (curves) Safe operating area AM08217v1 Figure 3. K δ=0.5 0.2 Thermal impedance Zth_powerflat_3.3x3.3 is rea s a S(on) thi in x RD a on rati y m pe ed b O it Lim Tj=150°C Tc=25°C Single pulse 10 10ms -1 0.1 0.05 0.02 10 1 100ms 1s 0.1 Single pulse 10 -2 0.01 0.01 0.1 1 10 VDS(V) 10 -3 10 -3 10 -2 10 -1 10 0 10 1 10 2 tp (s) Figure 4. ID (A) Output characteristics AM08218v1 Figure 5. ID (A) 200 5V 150 Transfer characteristics AM08219v1 VGS=10V 250 200 150 6V 4V 100 100 50 50 3V 0 0 1 2 3 4 5 VDS(V) 0 0 1 2 3 4 5 VGS(V) Figure 6. BVDSS (norm) Normalized BVDSS vs temperature AM08220v1 Figure 7. RDS(on) (Ω) 4.8 Static drain-source on resistance AM08221v1 1.06 1.04 1.02 1.00 0.98 0.96 0.94 0.92 -50 -25 0 25 50 75 100 125 TJ(°C) ID=1mA VGS=10V 4.6 4.4 4.2 4.0 3.8 0 5 10 15 20 25 30 35 ID(A) 6/13 Doc ID 15535 Rev 3 STL17N3LLH6 Figure 8. VGS (V) 12 10 2000 8 1500 6 1000 4 2 0 0 10 20 30 40 50 Qg(nC) 500 0 0 Crss 10 Coss VDD=15V ID=17A Electrical characteristics Capacitance variations AM08223v1 Gate charge vs gate-source voltage Figure 9. AM08222v1 C (pF) 2500 Ciss 20 VDS(V) Figure 10. Normalized gate threshold voltage vs temperature VGS(th) (norm) 1.2 1.0 0.8 0.6 0.4 0.2 -50 -25 AM08224v1 Figure 11. Normalized on resistance vs temperature RDS(on) (norm) AM08225v1 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 TJ(°C) 0 25 50 75 100 TJ(°C) Figure 12. Source-drain diode forward characteristics VSD (V) 1.0 0.9 0.8 TJ=25°C 0.7 0.6 TJ=150°C 0.5 0.4 0 10 20 30 40 50 60 70 ISD(A) AM08226v1 TJ=-55°C Doc ID 15535 Rev 3 7/13 Test circuits STL17N3LLH6 3 Test circuits Figure 14. Gate charge test circuit VDD 12V 2200 Figure 13. Switching times test circuit for resistive load 47kΩ 100nF 1kΩ RL VGS VD RG PW D.U.T. μF 3.3 μF VDD Vi=20V=VGMAX 2200 μF IG=CONST 2.7kΩ 47kΩ PW 1kΩ 100Ω D.U.T. VG AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit A D G S B 25 Ω D.U.T. A FAST DIODE B A L=100μH B D G 3.3 μF 1000 μF L VD 2200 μF 3.3 μF VDD VDD ID RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform V(BR)DSS VD Figure 18. Switching time waveform ton tdon tr toff tdoff tf 90% IDM 90% 10% ID VDD VDD 0 10% VDS 90% VGS AM01472v1 0 10% AM01473v1 8/13 Doc ID 15535 Rev 3 STL17N3LLH6 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Table 8. Package dimensions mm. Dim. Min. A A1 b D D2 e E E2 L 1.76 0.30 2.50 0.25 0.80 Typ 0.90 0.02 0.30 3.30 2.65 0.65 3.30 1.91 0.40 2.01 0.50 2.75 Max. 1.00 0.05 0.35 Doc ID 15535 Rev 3 9/13 Package mechanical data Figure 19. Package drawing STL17N3LLH6 10/13 Doc ID 15535 Rev 3 STL17N3LLH6 Figure 20. Recommended footprint (dimensions in mm) Package mechanical data AM03834v1 Doc ID 15535 Rev 3 11/13 Revision history STL17N3LLH6 5 Revision history Table 9. Date 24-Mar-2009 06-Jul-2010 10-Nov-2010 Document revision history Revision 1 2 3 First release. Updated Table 4: On/off states. Document status promoted from preliminary data to datasheet. Changes 12/13 Doc ID 15535 Rev 3 STL17N3LLH6 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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