STL22N65M5

STL22N65M5 Datasheet N-channel 650 V, 180 mΩ typ., 15 A, MDmesh M5 Power MOSFET in a PowerFLAT 8x8 HV package Features 5 4 3 2 1 PowerFLAT 8x8 HV Drain(5) Type A Gate(1) Driver source(2) Order code VDS @ TJmax RDS(on) max. ID STL22N65M5 710 V 210 mΩ 15 A • Extremely low RDS(on) • • • Low gate charge and input capacitance Excellent switching performance 100% avalanche tested Applications Power source(3, 4) • Switching applications D(5) Description G(1) Type C S(2,3,4) NG1DS2PS34D5_DBL This device is an N-channel Power MOSFET based on the MDmesh M5 innovative vertical process technology combined with the well-known PowerMESH horizontal layout. The resulting product offers extremely low on-resistance, making it particularly suitable for applications requiring high power and superior efficiency. Product status link STL22N65M5 Product summary Order code STL22N65M5 Marking 22N65M5 Package PowerFLAT 8x8 HV Packing Tape and reel DS9209 - Rev 4 - February 2021 For further information contact your local STMicroelectronics sales office. www.st.com STL22N65M5 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at TC = 25 °C 15 Drain current (continuous) at TC = 100 °C 9.5 IDM(1) Drain current (pulsed) 60 A PTOT Total power dissipation at TC = 25 °C 110 W Peak diode recovery voltage slope 15 V/ns -55 to 150 °C Value Unit VGS ID dv/dt(2) Tstg Tj Parameter Storage temperature range Operating junction temperature range A 1. Pulse width is limited by safe operating area. 2. ISD ≤ 15 A, di/dt ≤ 400 A/μs, VDS(peak) < V(BR)DSS, VDD = 400 V Table 2. Thermal data Symbol Parameter RthJA Thermal resistance, junction-to-case 1.14 °C/W RthJB(1) Thermal resistance, junction-to-board 45 °C/W Value Unit 4 A 270 mJ 1. When mounted on an 1-inch² FR-4, 2oz Cu board Table 3. Avalanche characteristics Symbol (1) Parameter IAR Avalanche current, repetitive or not repetitive EAS(2) Single pulse avalanche energy 1. Pulse width limited by Tjmax 2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V DS9209 - Rev 4 page 2/17 STL22N65M5 Electrical characteristics 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 4. Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 650 Unit V VGS = 0 V, VDS = 650 V 1 IDSS Zero gate voltage drain current VGS = 0 V, VDS = 650 V, Tcase = 125 °C(1) 100 IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 8.5 A 180 210 mΩ Min. Typ. Max. Unit - 1434 - - 38 - - 3.7 - - 35 - - 118 - 3 µA 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(er)(1) Equivalent output capacitance energy related Co(tr)(2) Equivalent output capacitance time related Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V VDS = 0 to 520 V, VGS = 0 V pF RG Intrinsic gate resistance f = 1 MHz open drain - 3.5 - Qg Total gate charge VDD = 520 V, ID = 9 A, - 36 - Qgs Gate-source charge VGS = 0 to 10 V - 7.5 - Gate-drain charge (see Figure 15. Test circuit for gate charge behavior) - 18 - Qgd pF Ω nC 1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Table 6. Switching times Symbol Test conditions Min. Typ. Max. td(v) Voltage delay time VDD = 400 V, ID = 12 A, - 43 - tr(v) Voltage rise time RG = 4.7 Ω, VGS = 10 V - 7.5 - tf(i) Current fall time (see Figure 16. Test circuit for inductive load switching and diode recovery times and Figure 19. Switching time waveform) - 7.5 - - 11.5 - tc(off) DS9209 - Rev 4 Parameter Crossing time Unit ns page 3/17 STL22N65M5 Electrical characteristics Table 7. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 15 A ISDM Source-drain current (pulsed) - 60 A VSD(2) Forward on voltage VGS = 0 V, ISD = 15 A - 1.5 V trr Reverse recovery time ISD = 15 A, di/dt = 100 A/µs, - 272 ns Qrr Reverse recovery charge VDD = 100 V - 3.4 µC IRRM Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 25 A Reverse recovery time ISD = 15 A, di/dt = 100 A/µs, - 336 ns Reverse recovery charge VDD = 100 V, Tj = 150 °C - 4.3 µC Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 25.6 A (1) trr Qrr IRRM 1. Pulse width is limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DS9209 - Rev 4 page 4/17 STL22N65M5 Electrical characteristics curves 2.1 Electrical characteristics curves Figure 1. Safe operating area Figure 2. Thermal impedance AM15594v1 ID (A) K PowerFLAT8x8HVzth ) δ =0.2 DS (o n Op Lim e ra ite tio n d by in th m is ax ar R e a is δ =0.5 10 1 10 -1 δ =0.05 100µs 1ms S ingle puls e 10 1 δ =0.01 Ƭ 10ms 10 -2 10 -5 VDS (V) 100 10 -4 10 -3 10 -2 t p (s) Figure 4. Transfer characteristics AM15587v1 VGS=9, 10 V 35 AM15588v1 ID (A) 40 VDS= 25 V 35 VGS=8 V 30 30 25 25 VGS=7 V 20 20 15 15 10 10 5 0 tp Single pulse Figure 3. Output characterisics ID (A) 40 Z th =K*R thj-c δ=t p / Ƭ δ =0.02 Tj=150°C Tc=25°C 0.1 0.1 δ =0.1 10µs VGS=6 V 5 0 20 15 10 5 25 VDS(V) Figure 5. Gate charge vs gate-source voltage AM15589v1 VGS (V) VDS VDS (V) 500 VDD=520V 12 0 ID=9A 10 3 5 4 7 6 8 9 VGS(V) Figure 6. Static drain-source on-resistance AM15595v1 R DS (on) (mΩ) 200 400 190 300 180 200 170 100 160 VGS =10V 8 6 4 2 0 DS9209 - Rev 4 0 10 20 30 40 0 Qg (nC) 150 0 2 4 6 8 10 12 14 D page 5/17 STL22N65M5 Electrical characteristics curves Figure 7. Capacitance variations Figure 8. Output capacitance stored energy AM15591v1 C (pF) AM15592v1 Eoss (µJ) 7 10000 6 Ciss 1000 5 4 100 3 Coss 2 10 1 Crss 1 0.1 1 10 100 Figure 9. Normalized gate threshold voltage vs temperature AM05459v1 VGS(th) (norm) 1.10 0 0 VDS(V) VDS = VGS ID = 250 µA 200 100 300 400 500 600 VDS(V) Figure 10. Normalized on-resistance vs temperature AM05460v1 R DS (on) (norm) 2.1 VGS = 10V ID= 8.5 A 1.9 1.7 1.00 1.5 1.3 0.90 1.1 0.9 0.80 0.7 0.70 -50 -25 0 25 50 75 100 TJ(°C) Figure 11. Normalized breakdown voltage vs temperature AM10399v1 VDS (norm) 1.08 0.5 -50 -25 25 0 50 75 100 TJ (°C) Figure 12. Drain-source diode forward characteristics AM05461v1 VS D (V) TJ =-50°C 1.2 ID = 1mA 1.06 1.0 1.04 8 1.02 TJ =25°C 1.00 TJ =150°C 0.98 0.96 0.94 0.92 -50 -25 DS9209 - Rev 4 0 25 50 75 100 TJ (°C) 0 10 20 3 50 IS D(A) page 6/17 STL22N65M5 Electrical characteristics curves Figure 13. Switching energy vs gate resistance AM15593v1 E (µJ) 250 VDD=400V VGS=10V ID=12A Eon 200 150 Eoff 100 50 0 0 DS9209 - Rev 4 10 20 30 40 RG(W) page 7/17 STL22N65M5 Test circuits 3 Test circuits Figure 15. Test circuit for gate charge behavior Figure 14. Test circuit for resistive load switching times VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A VD 100 µH fast diode B B B 3.3 µF D G + Figure 17. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform ID V(BR)DSS VDS 90%ID 90%VDS VD IDM VGS 90%VGS ID VDD VDD 10%VDS 10%ID tr VDS td(V) AM01472v1 DS9209 - Rev 4 tf ID tc(off) AM05540v2 page 8/17 STL22N65M5 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 PowerFLAT 8x8 HV type A package information Figure 20. PowerFLAT 8x8 HV type A package outline 8222871_Rev_4 DS9209 - Rev 4 page 9/17 STL22N65M5 PowerFLAT 8x8 HV type A package information Table 8. PowerFLAT 8x8 HV type A mechanical data Ref. Dimensions (in mm) Min. Typ. Max. A 0.75 0.85 0.95 A1 0.00 A3 0.10 0.20 0.30 b 0.90 1.00 1.10 D 7.90 8.00 8.10 E 7.90 8.00 8.10 D2 7.10 7.20 7.30 E1 2.65 2.75 2.85 E2 4.25 4.35 4.45 e L DS9209 - Rev 4 0.05 2.00 BSC 0.40 0.50 0.60 page 10/17 STL22N65M5 PowerFLAT 8x8 HV type C package information 4.2 PowerFLAT 8x8 HV type C package information A3 Figure 21. PowerFLAT 8x8 HV type C package outline 8222871_Rev4_typeC DS9209 - Rev 4 page 11/17 STL22N65M5 PowerFLAT 8x8 HV type C package information Table 9. PowerFLAT 8x8 HV type C mechanical data Ref. Dimensions (in mm) Min. Typ. Max. A 0.80 0.90 1.00 A1 0.00 0.02 0.05 A3 0.10 0.20 0.30 b 0.95 1.00 1.05 D D2 8.00 7.05 E E2 7.30 8.00 4.15 e L 7.20 4.30 4.40 2.00 0.40 0.50 0.60 Figure 22. PowerFLAT 8x8 HV footprint 8222871_REV_4_footprint Note: DS9209 - Rev 4 All dimensions are in millimeters. page 12/17 STL22N65M5 PowerFLAT 8x8 HV packing information 4.3 PowerFLAT 8x8 HV packing information Figure 23. PowerFLAT 8x8 HV tape P0 (4.0±0.1) P2 (2.0±0.1) D0 ( 1.55±0.05) T (0.30±0.05) B0 (8.30±0.1) D1 ( 1.5 Min) P1 (12.00±0.1) W (16.00±0.3) F (7.50±0.1) E (1.75±0.1) A0 (8.30±0.1) K0 (1.10±0.1) Note: Base and Bulk qu antity 3000 pcs 8229819_Tape_revA Note: All dimensions are in millimeters. Figure 24. PowerFLAT 8x8 HV package orientation in carrier tape Pin 1 identification ST DS9209 - Rev 4 ST ST ST page 13/17 STL22N65M5 PowerFLAT 8x8 HV packing information Figure 25. PowerFLAT 8x8 HV reel 8229819_Reel_revA Note: DS9209 - Rev 4 All dimensions are in millimeters. page 14/17 STL22N65M5 Revision history Table 10. Document revision history Date Version 06-Aug-2012 1 Changes First release. – Document status promoted from preliminary data to production data – Modified: Figure 1, IDM, IAR, dv/dt values on Table 2, note 4, 01-Feb-2013 2 RDS(on) value on Table 4, tipical values on Table 5, 6 and 7 and ISDM max value on Table 7 – Inserted: Section 2.1: Electrical characteristics (curves) – Minor text changes Modified title, description and internal schematic diagram in cover page. 21-Oct-2020 3 Updated Section 1 Electrical ratings and Section 2 Electrical characteristics. Added Section 4.2 PowerFLAT 8x8 HV type C package information. Minor text changes. 16-Feb-2021 DS9209 - Rev 4 4 Modified Figure 24. PowerFLAT 8x8 HV package orientation in carrier tape. Minor text changes. page 15/17 STL22N65M5 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 PowerFLAT 8x8 HV type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 PowerFLAT 8x8 HV type C package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 PowerFLAT 8x8 HV packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 DS9209 - Rev 4 page 16/17 STL22N65M5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DS9209 - Rev 4 page 17/17