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STL30P3LLH6

STL30P3LLH6

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SMD8

  • 描述:

    MOSFET P-CH 30V 30A POWERFLAT

  • 数据手册
  • 价格&库存
STL30P3LLH6 数据手册
STL30P3LLH6 Datasheet P-channel 30 V, 24 mΩ typ., 9 A STripFET F6 DeepGATE Power MOSFET in a PowerFLAT 5x6 package Features • • • • PowerFLAT 5x6 D(5, 6, 7, 8) Order code VDS RDS(on) max. ID PTOT STL30P3LLH6 30 V 30 mΩ 9A 4.8 W Very low on-resistance Very low gate charge High avalanche ruggedness Low gate drive power loss Applications • Switching applications Description G(4) This device is a P-channel Power MOSFET developed using the STripFET F6 technology, with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. S(1, 2, 3) AM01475v4 Product status link STL30P3LLH6 Product summary Order code STL30P3LLH6 Marking 30P3L Package PowerFLAT 5x6 Packing Tape and reel DS9258 - Rev 5 - February 2020 For further information contact your local STMicroelectronics sales office. www.st.com STL30P3LLH6 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage ±20 V Drain current (continuous) at TC = 25 °C 30 A Drain current (continuous) at TC = 100 °C 18.75 A Drain current (continuous) at Tpcb = 25 °C 9 A Drain current (continuous) at Tpcb = 100 °C 6.4 A IDM(2)(3) Drain current (pulsed) 36 A PTOT(1) Total power dissipation at TC = 25 °C 75 W PTOT(2) Total power dissipation at Tpcb = 25 °C ID(1) ID(2) 4.8 W factor(2) 0.03 W/°C Storage temperature range -55 to 175 °C 175 °C Derating Tstg TJ Operating junction temperature range 1. This value is rated according to Rthj-c. 2. This value is rated according to Rthj-pcb. 3. Pulse width is limited by safe operating area. Table 2. Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter Value Unit Thermal resistance junction-case max 2.00 °C/W Thermal resistance junction-pcb, single operation 31.3 °C/W 1. When mounted on an FR-4 board of 1 inch², 2oz Cu, steady state. Note: DS9258 - Rev 5 For the P-channel Power MOSFETs the actual polarity of the voltages and the current must be reversed. page 2/17 STL30P3LLH6 Electrical characteristics 2 Electrical characteristics TC = 25 °C unless otherwise specified Table 3. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 250 μA Min. Typ. Max. 30 Unit V VGS = 0 V, VDS = 30 V 1 µA VGS = 0 V, VDS = 30 V, TC = 125 °C 10 µA ±100 nA IDSS Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance 1 V VGS = 10 V, ID = 4.5 A 24 30 mΩ VGS = 4.5 V, ID = 4.5 A 32 40 mΩ Min. Typ. Max. Unit - 1450 - pF - 178 - pF - 120 - pF - 12 - nC - 4.4 - nC - 5 - nC Min. Typ. Max. Unit - 15 - ns Table 4. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VGS = 0 V, VDS = 25 V, f = 1 MHz VDD = 24 V, ID = 9 A, VGS = 4.5 V (see Figure 13. Gate charge test circuit) Table 5. Switching times Symbol td(on) tr td(off) tf Note: DS9258 - Rev 5 Parameter Turn-on delay time Test conditions VDD = 24 V, ID = 4.5 A, Rise time RG = 4.7 Ω, VGS = 10 V - 15 - ns Turn-off delay time (see Figure 12. Switching times test circuit for resistive load) - 24 - ns - 21 - ns Fall time For the P-channel Power MOSFETs the actual polarity of the voltages and the current must be reversed. page 3/17 STL30P3LLH6 Electrical characteristics Table 6. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 9 A ISDM(1) Source-drain current (pulsed) - 36 A VSD(2) Forward on voltage VGS = 0 V, ISD = 4.5 A - 1.1 V trr Reverse recovery time ISD = 4.5 A, di/dt = 100 A/µs, - 15 ns Qrr Reverse recovery charge VDD = 16 V, TJ = 150 °C - 6.5 nC Reverse recovery current (see Figure 14. Test circuit for inductive load switching and diode recovery times) - 0.9 A IRRM 1. Pulse width is limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. Note: DS9258 - Rev 5 For the P-channel Power MOSFETs the actual polarity of the voltages and the current must be reversed. page 4/17 STL30P3LLH6 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 2. Thermal impedance Figure 1. Safe operating area AM17940v1 ID (A) K AM17941v1 δ=0.5 0.2 10 is DS(o th in ax R io n m at b y r e d Op it e Lim 1 0.05 10ms 0.02 100ms 1s 0.1 Tj=175°C Tc=25°C Single pulse 0.01 0.1 0.1 10 -1 is ea ar n) 1 Single pulse VDS(V) 10 10 -3 10 -5 Figure 3. Output characteristics AM17931v1 ID (A) VGS=6, 7, 8, 9, 10V 5V 40 35 10 -4 10 -3 10 0 10 -2 10 -1 10 1 t p (s) Figure 4. Transfer characteristics AM17932v1 ID (A) VDS=2V 35 4V 30 30 25 25 20 20 15 15 3V 10 10 5 5 0 case 0.01 10 -2 2 1 0 3 2V VDS(V) Figure 5. Gate charge vs gate-source voltage VGS (V) AM17933v1 ID=9A 12 0 1 0 2 4 3 6 5 7 VGS(V) Figure 6. Static drain-source on-resistance AM17942v1 RDS(on) (m Ω) VGS=10V 24.5 10 8 24.0 6 4 23.5 2 0 DS9258 - Rev 5 0 4 8 12 16 20 24 28 Q g (nC) 23.0 0 2 4 6 8 ID(A) page 5/17 STL30P3LLH6 Electrical characteristics (curves) Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations AM17935v1 C (pF) VGS(th) AM17936v1 (norm) ID=250µA 1600 1.2 1400 Ciss 1200 1.01 1000 800 0.8 600 400 0.6 200 0 Coss Crss 0 5 10 15 20 0.4 -75 -50 -25 0 25 VDS(V) AM17943v1 AM17938v1 VDS (norm) (norm) 1.6 TJ(°C) Figure 10. Normalized VDS vs temperature Figure 9. Normalized on-resistance vs temperature R DS (on) 25 50 75 100 125 150 ID=4.5A ID=1mA 1.08 1.06 1.4 1.04 1.2 1.02 1.01 1.001 0.8 0.98 0.6 0.4 -75 -50 -25 0 0.96 0.94 -75 -50 -25 0 25 50 75 100 125 150 TJ (°C) 25 50 75 100 125 150 TJ(°C) Figure 11. Source-drain diode forward characteristics AM17944v1 VS D (V) TJ =-55°C 1.01 TJ =25°C 0.9 0.8 TJ =175°C 0.7 0.6 0.5 DS9258 - Rev 5 0 2 4 6 8 IS D(A) page 6/17 STL30P3LLH6 Test circuits 3 Test circuits Figure 12. Switching times test circuit for resistive load Figure 13. Gate charge test circuit Figure 14. Test circuit for inductive load switching and diode recovery times DS9258 - Rev 5 page 7/17 STL30P3LLH6 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 PowerFLAT 5x6 type R package information Figure 15. PowerFLAT 5x6 type R package outline A0ER_8231817_Rev20 DS9258 - Rev 5 page 8/17 STL30P3LLH6 PowerFLAT 5x6 type R package information Table 7. PowerFLAT 5x6 type R mechanical data Dim. mm Min. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 C 5.80 6.00 6.20 D 5.00 5.20 5.40 D2 4.15 D3 4.05 4.20 4.35 D4 4.80 5.00 5.20 D5 0.25 0.40 0.55 D6 0.15 0.30 0.45 e DS9258 - Rev 5 Typ. 0.50 4.45 1.27 E 5.95 6.15 E2 3.50 3.70 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 E6 0.20 0.325 0.45 E7 0.75 0.90 1.05 K 1.275 1.575 L 0.60 0.80 L1 0.05 θ 0° 0.15 6.35 0.25 12° page 9/17 STL30P3LLH6 PowerFLAT 5x6 type R SUBCON package information 4.2 PowerFLAT 5x6 type R SUBCON package information Figure 16. PowerFLAT 5x6 type R SUBCON package outline 8472137_SUBCON_998G_REV4 8472137_SUBCON_998G_Type_R_REV4 DS9258 - Rev 5 page 10/17 STL30P3LLH6 PowerFLAT 5x6 type R SUBCON package information Table 8. PowerFLAT 5x6 type R SUBCON package mechanical data Dim. A mm Min. Typ. Max. 0.90 0.95 1.00 A1 b 0.02 0.35 b1 c 0.40 0.30 0.21 0.25 D 0.34 5.10 D1 4.80 4.90 5.00 D2 3.91 4.01 4.11 e 1.17 1.27 1.37 E 5.90 6.00 6.10 E1 5.70 5.75 5.80 E2 3.34 3.44 3.54 E4 0.15 0.25 0.35 E5 0.06 0.16 0.26 H 0.51 0.61 0.71 K 1.10 L 0.51 0.61 0.71 L1 0.06 0.13 0.20 L2 DS9258 - Rev 5 0.45 0.10 P 1.00 1.10 1.20 θ 8° 10° 12° page 11/17 STL30P3LLH6 PowerFLAT 5x6 type R SUBCON package information Figure 17. PowerFLAT 5x6 recommended footprint (dimensions are in mm) 8231817_FOOTPRINT_simp_Rev_20 DS9258 - Rev 5 page 12/17 STL30P3LLH6 PowerFLAT 5x6 packing information 4.3 PowerFLAT 5x6 packing information Figure 18. PowerFLAT 5x6 tape (dimensions are in mm) (I) Measured from centreline of sprocket hole to centreline of pocket. (II) Cumulative tolerance of 10 sprocket holes is ±0.20. Base and bulk quantity 3000 pcs All dimensions are in millimeters (III) Measured from centreline of sprocket hole to centreline of pocket 8234350_Tape_rev_C Figure 19. PowerFLAT 5x6 package orientation in carrier tape Pin 1 identification DS9258 - Rev 5 page 13/17 STL30P3LLH6 PowerFLAT 5x6 packing information Figure 20. PowerFLAT 5x6 reel DS9258 - Rev 5 page 14/17 STL30P3LLH6 Revision history Table 9. Document revision history Date Revision 20-Mar-2013 1 Changes First release – Modified: title – Modified: ID, PTOT values and Figure 1 in cover page – Modified: VGS, ID (at Tpcb = 125 °C and Tpcb = 100 °C), IDM, PTOT (at TC = 25 °C and Tpcb = 25 °C) and Tstg in Table 2 – Modified: Rthj-pcb value in Table 3 28-Nov-2013 2 – Modified: IGSS (VGS - test condition) value and ID (for RDS(on)) in Table 4 – Modified: Qg value in Table 5 – Modified: ID value in Table 6 – Modified: ISD and ISDM in Table 7 – Added: Section 2.1: Electrical characteristics (curves) – Minor text changes – Modified: TJ value in Table 2 08-Jan-2014 3 – Modified: Figure 6 – Updated: Section 4: Package mechanical data – Minor text changes DS9258 - Rev 5 03-Feb-2020 4 18-Feb-2020 5 Updated Section 4 Package information. Minor text changes. Updated Internal schematic in cover page. page 15/17 STL30P3LLH6 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 PowerFLAT 5x6 type R package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 PowerFLAT 5x6 type R SUBCON package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 PowerFLAT 5x6 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 DS9258 - Rev 5 page 16/17 STL30P3LLH6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS9258 - Rev 5 page 17/17
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