STL31N65M5

STL31N65M5 N-channel 650 V, 0.135 Ω typ., 15 A MDmesh™ V Power MOSFET in a PowerFLAT™ 8x8 HV package Datasheet - production data Features 3 3 3 Order code VDS RDS(on) max ID STL31N65M5 710 V 0.162 Ω 15 A(1) "OTTOMVIEW ' 1. The value is rated according to Rthj-case and limited by package. $ • Worldwide best RDS(on) * area • Higher VDSS rating and high dv/dt capability 0OWER&,!4˜X(6 • Excellent switching performance Applications Figure 1. Internal schematic diagram • Switching applications Description $ This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. ' 3 !-V Table 1. Device summary Order code Marking Packages Packaging STL31N65M5 31N65M5 PowerFLAT™ 8x8 HV Tape and reel October 2013 This is information on a product in full production. DocID025459 Rev 1 1/17 www.st.com Contents STL31N65M5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 .............................................. 9 DocID025459 Rev 1 STL31N65M5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 650 V VGS Gate-source voltage ± 25 V Drain current (continuous) at TC = 25 °C 15 A ID (1) ID (1) Drain current (continuous) at TC = 100 °C 12 A (1),(2) Drain current (pulsed) 60 A ID (3) Drain current (continuous) at Tamb = 25 °C 2.8 A ID (3) Drain current (continuous) at Tamb = 100 °C 1.8 A Total dissipation at Tamb = 25 °C 2.8 W Total dissipation at TC = 25 °C 125 W IDM PTOT (3) PTOT (1) IAR Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) 5 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 410 mJ Peak diode recovery voltage slope 15 V/ns - 55 to 150 °C 150 °C Value Unit Thermal resistance junction-case max 1 °C/W Thermal resistance junction-ambient max 45 °C/W dv/dt (4) Tstg Tj Storage temperature Max. operating junction temperature 1. The value is rated according to Rthj-case and limited by package. 2. Pulse width limited by safe operating area. 3. When mounted on FR-4 board of inch², 2oz Cu. 4. ISD ≤ 15 A, di/dt ≤ 400 A/µs, VDD = 400 V, VDS(peak) < V(BR)DSS. Table 3. Thermal data Symbol Rthj-case Rthj-amb(1) Parameter 1. When mounted on FR-4 board of inch², 2oz Cu. DocID025459 Rev 1 3/17 17 Electrical characteristics 2 STL31N65M5 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. On /off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions ID = 1 mA, VGS = 0 IDSS VDS = 650 V Zero gate voltage drain current (VGS = 0) VDS = 650 V, TC=125 °C IGSS Gate-body leakage current (VDS = 0) Min. Typ. Max. Unit 650 V 1 µA 100 µA ±100 nA 4 5 V 0.135 0.162 Ω Min. Typ. Max. Unit - 1865 - pF - 45 - pF - 4 - pF - 43 - pF - 146 - pF f = 1 MHz open drain - 2.8 - Ω VDD = 520 V, ID = 11 A, VGS = 10 V (see Figure 16) - 45 - nC - 11.5 - nC - 20 - nC VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onVGS = 10 V, ID = 11 A resistance 3 Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(er)(1) Equivalent output capacitance energy related Co(tr)(2) Equivalent output capacitance time related RG Intrinsic gate resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 VGS = 0, VDS = 0 to 80% V(BR)DSS 1. Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 2. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 4/17 DocID025459 Rev 1 STL31N65M5 Electrical characteristics Table 6. Switching times Symbol td (v) Parameter Voltage delay time tr (v) Voltage rise time tf (i) Current fall time tc(off) Test conditions VDD = 400 V, ID = 14 A, RG = 4.7 Ω, VGS = 10 V (see Figure 20) Crossing time Min. Typ. Max. Unit - 46 - ns - 8 - ns - 8.5 - ns - 11 - ns Min. Typ. Table 7. Source drain diode Symbol ISD (1) ISDM (1),(2) VSD (3) trr Parameter Test conditions Max. Unit Source-drain current - 15 A Source-drain current (pulsed) - 60 A - 1.5 V Forward on voltage ISD = 15 A, VGS = 0 Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 15 A, di/dt= 100 A/µs VDD = 100 V (see Figure 17) ISD = 15 A, di/dt= 100 A/µs VDD = 100 V, Tj = 150 °C (see Figure 17) - 290 ns - 4 µC - 27 A - 340 ns - 5 µC - 29 A 1. The value is rated according to Rthj-case and limited by package. 2. Pulse width limited by safe operating area 3. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID025459 Rev 1 5/17 17 Electrical characteristics 2.1 STL31N65M5 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM16150v1 ID (A) Zth PowerFLAT 8x8 HV K ai s δ=0.5 DS (o n) 0.2 Op Lim erat ite ion d b in y m this ax a r R e 10 10µs 0.1 -1 100µs 10 0.05 1 0.01 1ms Tj=150°C Tc=25°C Single pulse Single pulse 10ms -2 0.1 0.1 Figure 4. pcb 0.02 10 1 10 -5 10 VDS(V) 100 Output characteristics Figure 5. AM16151v1 ID (A) VGS=9, 10V -4 -2 -3 10 tp (s) 10 10 Transfer characteristics AM16152v1 ID (A) VDS=25V 8V 40 40 35 35 7V 30 30 25 25 20 20 15 15 10 10 6V 5 0 0 Figure 6. 5 10 15 20 25 5 0 3 VDS(V) Gate charge vs gate-source voltage Figure 7. VGS (V) AM16153v1 VDS VDD=520V ID=11A VDS 12 10 5 4 7 6 8 9 VGS(V) Static drain-source on-resistance (V) RDS(on) (Ω) 500 0.155 400 0.145 300 0.135 200 0.125 100 0.115 0 Qg(nC) 0.105 AM16154v1 VDS=25V 8 6 4 2 0 0 6/17 10 20 30 40 50 DocID025459 Rev 1 0 2 4 6 8 10 12 14 ID(A) STL31N65M5 Figure 8. Electrical characteristics Capacitance variations Figure 9. Output capacitance stored energy AM16155v1 C (pF) AM16159v1 Eoss (µJ) 8 10000 7 6 Ciss 1000 5 4 100 3 Coss 2 10 Crss 1 0.1 1 10 100 0 VDS(V) Figure 10. Normalized gate threshold voltage vs. temperature AM05459v1 VGS(th) (norm) 1.10 1 VDS = VGS ID = 250 µA 0 400 200 600 VDS(V) Figure 11. Normalized on-resistance vs. temperature AM05460v1 RDS(on) (norm) 2.1 VGS = 10 V ID = 11 A 1.9 1.00 1.7 1.5 1.3 0.90 1.1 0.80 0.9 0.7 0.70 -50 -25 0 25 50 75 100 TJ(°C) Figure 12. Drain-source diode forward characteristics 0 25 50 75 100 TJ(°C) Figure 13. Normalized VDS vs. temperature AM05461v1 VSD (V) 0.5 -50 -25 AM10399v1 VDS (norm) TJ=-50°C 1.08 1.2 ID = 1mA 1.06 1.0 1.04 0.8 1.02 TJ=25°C 1.00 0.6 TJ=150°C 0.98 0.4 0.96 0.2 0 0.94 0 10 20 30 40 50 ISD(A) 0.92 -50 -25 DocID025459 Rev 1 0 25 50 75 100 TJ(°C) 7/17 17 Electrical characteristics STL31N65M5 Figure 14. Switching losses vs. gate resistance (1) AM16156v1 E (µJ) ID=14A VGS=10V VDD=400V 300 Eon 250 200 150 Eoff 100 50 0 0 10 20 30 40 RG(Ω) 1. Eon including reverse recovery of a SiC diode 8/17 DocID025459 Rev 1 STL31N65M5 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test switching and diode recovery times circuit A A L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 19. Unclamped inductive waveform V(BR)DSS AM01471v1 Figure 20. Switching time waveform Concept waveform for Inductive Load Turn-off Id VD 90%Vds 90%Id Tdelay-off -off IDM Vgs 90%Vgs on ID Vgs(I(t)) )) VDD VDD 10%Id 10%Vds Vds Trise AM01472v1 DocID025459 Rev 1 Tfall Tcross --over AM05540v2 9/17 17 Package mechanical data 4 STL31N65M5 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/17 DocID025459 Rev 1 STL31N65M5 Package mechanical data Table 8. PowerFLAT™ 8x8 HV mechanical data mm Dim. Min. Typ. Max. A 0.80 0.90 1.00 A1 0.00 0.02 0.05 b 0.95 1.00 1.05 D 8.00 E 8.00 D2 7.05 7.20 7.30 E2 4.15 4.30 4.40 e L 2.00 0.40 DocID025459 Rev 1 0.50 0.60 11/17 17 Package mechanical data STL31N65M5 Figure 21. PowerFLAT™ 8x8 HV drawing mechanical data 8222871_REV_C 12/17 DocID025459 Rev 1 STL31N65M5 Package mechanical data Figure 22. PowerFLAT™ 8x8 HV recommended footprint (dimensions in mm.) 8222871_REV_C_footprint DocID025459 Rev 1 13/17 17 Packaging mechanical data 5 STL31N65M5 Packaging mechanical data Figure 23. PowerFLAT™ 8x8 HV tape P2 (2.0±0.1) T (0.30±0.05) P0 (4.0±0.1) D0 ( 1.55±0.05) D1 ( 1.5 Min) P1 (12.00±0.1) W (16.00±0.3) F (7.50±0.1) B0 (8.30±0.1) E (1.75±0.1) A0 (8.30±0.1) K0 (1.10±0.1) Note: Base and Bulk quantity 3000 pcs 8229819_Tape_revA Figure 24. PowerFLAT™ 8x8 HV package orientation in carrier tape. 14/17 DocID025459 Rev 1 STL31N65M5 Packaging mechanical data Figure 25. PowerFLAT™ 8x8 HV reel 8229819_Reel_revA DocID025459 Rev 1 15/17 17 Revision history 6 STL31N65M5 Revision history Table 9. Document revision history 16/17 Date Revision 31-Oct-2013 1 Changes First release. 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