STL34NF06

STL34NF06 N-CHANNEL 60V - 0.024Ω - 34A PowerFLAT™ LOW GATE CHARGE STripFET™II MOSFET PRELIMINARY DATA TYPE STL34NF06 VDSS 60 V RDS(on) < 0.028Ω ID 34 A TYPICAL RDS(on) = 0.024Ω IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique “STripFET™” technology. The resulting transistor shows extremely low onresistance and minimal gate charge. The new PowerFLAT™ package allow a significant reduction in board space without compramising performance. PowerFLAT™(5x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS DC-DC CONVERTERS BATTERY MANAGEMENT IN NOMADIC EQUIPMENT ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID IDM ( ) PTOT EAS (1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C (*) Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature Value 60 60 ± 20 34 20 136 70 0.56 250 –55 to 150 (1) Starting Tj = 25°C, ID = 17A, VDD = 42V Unit V V V A A A W W/°C mJ °C (•)Pulse width limited by safe operating area (*) Current Limited by Wire Bonding is 20A November 2002 1/6 STL34NF06 THERMAL DATA Rthj-case Rthj-pcb (#) Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max 1.8 31.2 °C/W °C/W (*) When mounted on 1inch² FR4 Board, 2oz of Cu, t ≤ 10 sec. ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ± 20V Min. 60 1 10 ±100 Typ. Max. Unit V µA µA nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250µA VGS = 10V, ID = 17A Min. 2 0.024 0.028 Typ. Max. Unit V Ω DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 30 V , ID = 17 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. TBD 920 225 80 Max. Unit S pF pF pF 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2/6 STL34NF06 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 30V, ID = 17 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 48V, ID = 34 A, VGS = 10V Min. Typ. 11 50 32 6.5 14.4 43 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-Off-Delay Time Fall Time Test Conditions VDD = 30V, ID = 17A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) Min. Typ. 27 11 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD (3) ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 34 A, VGS = 0 ISD = 34 A, di/dt = 100A/µs, VDD = 10V, Tj = 150°C (see test circuit, Figure 5) 63 151 4.8 Test Conditions Min. Typ. Max. 34 136 1.2 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Current Limited by Wire Bonding is 20A 3/6 STL34NF06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STL34NF06 PowerFLAT™(5x5) MECHANICAL DATA mm. MIN. A A1 b c D E E2 e 3.10 0.43 0.33 TYP 0.90 0.02 0.51 0.41 5.00 5.00 3.18 1.27 3.25 0.122 MAX. 1.00 0.05 0.58 0.48 0.017 0.013 MIN. inch TYP. 0.035 0.001 0.020 0.016 0.197 0.197 0.125 0.050 0.128 MAX. 0.039 0.002 0.023 0.019 DIM. 5/6 STL34NF06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 6/6