STL35NF3LL

N-CHANNEL 30V - 0.0055Ω - 35A PowerFLAT™ LOW GATE CHARGE STripFET™ MOSFET TYPE STL35NF3LL s s s STL35NF3LL TARGET DATA VDSS 30 V RDS(on) < 0.007 Ω ID 35 A TYPICAL RDS(on) = 0.0055Ω IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique “STripFET™” technology. The resulting transistor shows extremely low onresistance and minimal gate charge. The new PowerFLAT™ package allows a significant reduction in board space without compromising performance. PowerFLAT™(6x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s DC-DC CONVERTERS s BATTERY MANAGEMENT IN NOMADIC EQUIPMENT ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID(#) IDM (q) PTOT dv/dt(1) EAS (2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature Value 30 30 ± 15 35 22 140 80 0.64 TBD TBD –55 to 150 (1)ISD