STL36N60M6

STL36N60M6 Datasheet N-channel 600 V, 91 mΩ typ., 25 A MDmesh™ M6 Power MOSFET in a PowerFLAT™ 8x8 HV package Features 5 4 3 2 1 PowerFLAT™ 8x8 HV Drain(5) Order code VDS RDS(on) max. ID STL36N60M6 600 V 110 mΩ 25 A • • Reduced switching losses Lower RDS(on) x area vs previous generation • • • • Low gate input resistance 100% avalanche tested Zener-protected Excellent switching performance thanks to the extra driving source pin Applications • • • Gate(1) Driver source (2) Power source (3, 4) NG1DS2PS34D5Z Product status link STL36N60M6 Switching applications LLC converters Boost PFC converters Description The new MDmesh™ M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent RDS(on) per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency. Product summary Order code STL36N60M6 Marking 36N60M6 Package PowerFLAT™ 8x8 HV Packing Tape and reel DS11134 - Rev 4 - September 2018 For further information contact your local STMicroelectronics sales office. www.st.com STL36N60M6 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V ID Drain current (continuous) at TC = 25 °C 25 A ID Drain current (continuous) at TC = 100 °C 15.6 A IDM (1) Drain current (pulsed) 100 A PTOT Total dissipation at TC = 25 °C 160 W dv/dt(2) Peak diode recovery voltage slope 15 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 V/ns Tstg Storage temperature range -55 to 150 °C Value Unit Thermal resistance junction-case 0.78 °C/W Thermal resistance junction-pcb 45 °C/W Value Unit 5 A 750 mJ VGS Tj Parameter Operating junction temperature range 1. Pulse width limited by safe operating area. 2. ISD ≤ 25 A, di/dt ≤ 400 A/µs; VDS(peak) < V(BR)DSS, VDD = 400 V. 3. VDS ≤ 480 V Table 2. Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter 1. When mounted on FR-4 board of inch², 2oz Cu. Table 3. Avalanche characteristics Symbol DS11134 - Rev 4 Parameter IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR; VDD = 50 V) page 2/15 STL36N60M6 Electrical characteristics 2 Electrical characteristics TC = 25 °C unless otherwise specified Table 4. On/off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions Min. VGS = 0 V, ID = 1 mA Typ. 600 Zero gate voltage Drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 12.5 A VGS = 0 V, VDS = 600 V, TC = 125 °C Unit V VGS = 0 V, VDS = 600 V IDSS Max. 1 µA 100 µA ±5 µA 4 4.75 V 91 110 mΩ Min. Typ. Max. Unit - 1960 - pF - 93 - pF - 6 - pF (1) 3.25 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Test conditions VDS= 100 V, f = 1 MHz, VGS = 0 V Reverse transfer capacitance (1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 332 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 1.6 - Ω Qg Total gate charge - 44.3 - nC Qgs Gate-source charge - 10.1 - nC Qgd Gate-drain charge - 25 - nC Coss eq. VDD = 480 V, ID = 30 A, VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 6. Switching times Symbol td(on) tr td(off) tf DS11134 - Rev 4 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time Fall time VDD = 300 V, ID = 15 A RG = 4.7 Ω, VGS = 10 V (see Figure 13. Switching times test circuit for resistive load and Figure 18. Switching time waveform) Min. Typ. Max. Unit - 15.2 - ns - 5.3 - ns - 50.2 - ns - 7.3 - ns page 3/15 STL36N60M6 Electrical characteristics Table 7. Source-drain diode Symbol ISD ISDM(1) VSD (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 25 A Source-drain current (pulsed) - 100 A - 1.6 V Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current VGS = 0 V, ISD = 25 A ISD = 30 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 15. Test circuit for inductive load switching and diode recovery times) ISD = 30 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 340 ns - 5.3 µC - 31 A - 430 ns - 7.7 µC - 36 A 1. Pulse width is limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DS11134 - Rev 4 page 4/15 STL36N60M6 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance ID (A) Operation in this area is limited by R DS(on) GIPG200920180941SOA Zth PowerFLAT 8x8 HV K δ=0.5 10 2 0.2 tp =1 µs 0.1 tp =10 µs 10 1 10 10 -1 10 -1 10 0 tp =1 ms tp =10 ms VDS (V) 10 2 Single pulse tp -2 10 -5 10 Figure 3. Output characteristics VGS = 9, 10V 100 VGS = 8V 40 40 VGS = 6V 2 4 6 8 20 VGS = 5V 10 12 14 16 VDS (V) Figure 5. Gate charge vs gate-source voltage VGS (V) GADG030220171159QVG VDS (V) VDD = 480 V ID = 30 A 12 DS11134 - Rev 4 0 3 500 95 8 400 93 6 300 91 4 200 89 2 100 87 0 Q g (nC) 85 0 10 20 30 40 50 5 6 RDS(on) (mΩ) 97 VDS 4 7 8 9 VGS (V) Figure 6. Static drain-source on-resistance 600 0 0 VDS = 18V 60 VGS = 7V 20 tp (s) 10 10 GADG220320170910TCH 80 60 10 10 Ƭ -2 -3 ID (A) 80 0 0 -4 Figure 4. Transfer characteristics GADG220320170910OCH 100 Zth= K*R thJ-c δ= t p/Ƭ 0.01 10 1 ID (A) 0.05 0.02 tp =100 µs TJ≤150 °C TC=25 °C VGS=10 V single pulse 0 -1 10 GIPG200920180942RID VGS = 10 V 4 8 12 16 20 24 ID (A) page 5/15 STL36N60M6 Electrical characteristics (curves) Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations C (pF) GADG220320170921CVR VGS(th) (norm.) 104 GIPG300920151316VTH ID = 250 µA 1.1 CISS 103 1.0 0.9 102 COSS f= 1MHz 0.8 101 CRSS 0.7 100 10-1 100 101 VDS (V) 102 Figure 9. Normalized on-resistance vs temperature RDS(on) (norm.) GIPG300920151317RON VGS = 10 V 0.6 -75 25 75 125 TJ (°C) Figure 10. Normalized V(BR)DSS vs temperature V(BR)DSS (norm.) GIPG300920151318BDV ID = 1 mA 1.08 2.2 1.04 1.8 1.00 1.4 1.0 0.96 0.6 0.92 0.2 -75 -25 -25 25 75 125 TJ (°C) Figure 11. Output capacitance stored energy EOSS (µJ) GADG010220171214EOS 0.88 -75 -25 25 125 TJ (°C) Figure 12. Source-drain diode forward characteristics VSD (V) GIPG200920180943SDF 1.1 16 75 TJ = -50 ℃ 1.0 12 0.9 TJ = 25 ℃ 0.8 8 0.7 4 0 0 DS11134 - Rev 4 TJ = 150 ℃ 0.6 100 200 300 400 500 600 VDS (V) 0.5 0 4 8 12 16 20 24 ISD (A) page 6/15 STL36N60M6 Test circuits 3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Test circuit for gate charge behavior VDD 12V 47kΩ 1kΩ 100nF + VD VGS 3.3 µF 2200 RL µF IG=CONST VDD + RG 100Ω Vi ≤ VGS D.U.T. 2200 µF D.U.T. VG 2.7kΩ PW 47kΩ GND1 (driver signal) GND2 (power) 1kΩ PW GND1 AM15855v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A D.U.T. FAST DIODE S A L L=100µH D 25Ω VD 3.3 µF B B B AM15856v1 Figure 16. Unclamped inductive load test circuit D G GND2 + 1000 µF 2200 µF 3.3 µF + VDD VDD ID G S RG D.U.T. Vi Pw GND2 GND1 D.U.T. GND1 GND2 AM15858v1 AM15857v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton td(on) V(BR)DSS toff td(off) tr tf VD 90% 90% IDM VDD 10% 0 ID VDD VGS AM01472v1 0 VDS 10% 90% 10% AM01473v1 DS11134 - Rev 4 page 7/15 STL36N60M6 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS11134 - Rev 4 page 8/15 STL36N60M6 PowerFLAT™ 8x8 HV package information 4.1 PowerFLAT™ 8x8 HV package information Figure 19. PowerFLAT™ 8x8 HV package outline 8222871_Rev_4 DS11134 - Rev 4 page 9/15 STL36N60M6 PowerFLAT™ 8x8 HV package information Table 8. PowerFLAT™ 8x8 HV mechanical data Ref. Dimensions (in mm) Min. Typ. Max. A 0.75 0.85 0.95 A1 0.00 A3 0.10 0.20 0.30 b 0.90 1.00 1.10 D 7.90 8.00 8.10 E 7.90 8.00 8.10 D2 7.10 7.20 7.30 E1 2.65 2.75 2.85 E2 4.25 4.35 4.45 e L 0.05 2.00 BSC 0.40 0.50 0.60 Figure 20. PowerFLAT™ 8x8 HV footprint 8222871_REV_4_footprint Note: DS11134 - Rev 4 All dimensions are in millimeters. page 10/15 STL36N60M6 PowerFLAT™ 8x8 HV packing information 4.2 PowerFLAT™ 8x8 HV packing information Figure 21. PowerFLAT™ 8x8 HV tape P2 (2.0±0.1) T (0.30±0.05) P0 (4.0±0.1) D0 ( 1.55±0.05) D1 ( 1.5 Min) P1 (12.00±0.1) W (16.00±0.3) F (7.50±0.1) B0 (8.30±0.1) E (1.75±0.1) A0 (8.30±0.1) K0 (1.10±0.1) Note: Base and Bulk qu antity 3000 pcs 8229819_Tape_revA Note: All dimensions are in millimeters. Figure 22. PowerFLAT™ 8x8 HV package orientation in carrier tape DS11134 - Rev 4 page 11/15 STL36N60M6 PowerFLAT™ 8x8 HV packing information Figure 23. PowerFLAT™ 8x8 HV reel 8229819_Reel_revA Note: DS11134 - Rev 4 All dimensions are in millimeters. page 12/15 STL36N60M6 Revision history Table 9. Document revision history Date Revision Changes 03-Jul-2015 1 First release. 09-Jul-2015 2 Updated Figure 1: "Internal schematic diagram" in cover page. Text and formatting changes throughout document. Datasheet promoted from preliminary data to production data. On cover page: - updated title description and package silhouette 07-Aug-2015 3 In section Electrical ratings: - updated table Avalanche characteristics In section Electrical characteristics: - updated tables On/off states, Dynamic, Switching times and Source drain diode Added section Electrical characteristics (curves) Modified features table on cover page. 20-Sep-2018 4 Modified Table 4. On/off states, Table 5. Dynamic, Table 6. Switching times and Table 7. Source-drain diode. Modified Section 2.1 Electrical characteristics (curves). Minor text changes. DS11134 - Rev 4 page 13/15 STL36N60M6 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 PowerFLAT™ 8x8 HV package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 PowerFLAT™ 8x8 HV packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 DS11134 - Rev 4 page 14/15 STL36N60M6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS11134 - Rev 4 page 15/15