STL40C30H3LL

STL40C30H3LL N-channel 30 V, 0.019 Ω typ., 10 A, P-channel 30 V, 0.024 Ω typ.,8 A STripFET™ VI Power MOSFET in a PowerFLAT 5x6 d. i. package Datasheet - production data Features Order code Channel VDS 30 V P 1 0.03 Ω @ 10 V 8A • RDS(on) * Qg industry benchmark 2 3 ID 0.021 Ω @ 10 V 10 A N STL40C30H3LL RDS(on) max 4 • Extremely low on-resistance RDS(on) • High avalanche ruggedness • Low gate drive power losses PowerFLAT™5x6 double island Applications Figure 1. Internal schematic diagram • Switching applications Description This device is a complementary N-channel and Pchannel Power MOSFET developed using STripFET™ V (P-channel) and STripFET™ VI DeepGATE™ (N-channel) technologies. The resulting device exhibits low on-state resistance and an FOM among the lowest in its voltage class. AM00623v2 Table 1. Device summary Order code Marking Packages Packaging STL40C30H3LL 40C30H3L PowerFLAT 5x6 double island Tape and reel Note: For the P-channel MOSFET actual polarity of voltages and current has to be reversed April 2014 This is information on a product in full production. DocID023874 Rev 5 1/19 www.st.com Contents STL40C30H3LL Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) for N-channel ................ 6 2.2 Electrical characteristics (curves) for P-channel ................. 8 3 Test circuits for N-channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 Test circuits for P-channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 DocID023874 Rev 5 STL40C30H3LL 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter Unit N-channel P-channel VDS Drain-source voltage (vgs = 0) 30 V VGS Gate- source voltage ±20 V ID(1) Drain current (continuous) at TC = 25°C single operating 40 30 A ID (1) Drain current (continuous) at TC = 100°C single operating 25 18.75 A ID(2) Drain current (continuous) at Tpcb = 25°C single operating 10 8 A ID(2) Drain current (continuous) at Tpcb = 100°C single operating 6.5 5 A IDM (2)(3) Drain current (pulsed) 40 32 A PTOT(1) Total dissipation at TC = 25°C 60 W PTOT(2) Total dissipation at Tpcb = 25°C 4 W -55 to 150 °C 150 °C Value Unit Thermal resistance junction-case 2.08 °C/W Thermal resistance junction-pcb single operation 32.00 °C/W Tstg Tj Storage temperature Operating junction temperature 1. The value is rated according to Rthj-c 2. This value is rated according to Rthj-pcb 3. Pulse width is limited by safe operating area Table 3. Thermal data Symbol Rthj-c Rthj-pcb(1) Parameter 1. When mounted on 1 inch² FR-4 board, 2 oz. Cu., t ≤ 10 sec Note: For the P-channel MOSFET actual polarity of voltages and current has to be reversed DocID023874 Rev 5 3/19 19 Electrical characteristics 2 STL40C30H3LL Electrical characteristics Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Channel Min. Typ. Max. Unit N Drain-source breakdown voltage ID = 250 μA, VGS = 0 30 V P N VDS = 30 V IDSS 1 μA 10 μA ±100 nA P Zero gate voltage drain current (VGS = 0) N VDS=30 V, TC=125 °C P IGSS N Gate-body leakage current (VDS = 0) VGS = ±20 V Gate threshold voltage VDS = VGS, ID = 250 μA P N VGS(th) 1 V P N 0.019 0.021 Ω P 0.024 0.03 Ω N 0.023 0.028 Ω P 0.038 0.05 Ω Typ. Max. Unit VGS = 10 V, ID = 4 A RDS(on) Static drain-source on-resistance VGS = 4.5 V, ID = 4 A Table 5. Dynamic Symbol Ciss Coss Crss Qg Qgs Qgd Note: 4/19 Parameter Test conditions Channel Min. N - 475 - pF P - 1450 - pF N - 97 - pF P - 178 - pF N - 19 - pF P - 120 - pF N - 4.6 - nC P - 12 - nC N - 1.7 - nC P - 4.4 - nC N - 1.9 - nC P - 5 - nC Input capacitance Output capacitance VDS = 24 V, f = 1 MHz, VGS = 0 Reverse transfer capacitance Total gate charge Gate-source charge VDD=24 V ID=8 A VGS= 4.5 V (see Figure 25) Gate-drain charge For the P-channel MOSFET actual polarity of voltages and current has to be reversed DocID023874 Rev 5 STL40C30H3LL Electrical characteristics Table 6. Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Channel Min. Typ. Max. Unit N - 4 - ns P - 15 - ns N - 22 - ns P - 15 - ns N - 13 - ns P - 24 - ns N - 2.8 - ns P - 21 - ns Typ. Max. Unit Turn-on delay time Rise time Turn-off delay time VDD = 24 V, ID = 4 A RG=4.7 Ω, VGS = 10 V Figure 24 Fall time Table 7. Source drain diode Symbol ISD ISDM (1) Parameter Qrr IRRM Channel Min. N - 10 A P - 8 A N - 40 A P - 32 A N 1.1 V P - N - 16.2 ns P - 15 ns N - 8.1 nC P - 6.5 nC N - 1 A P - 0.9 A Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage trr Test conditions ISD = 8A, VGS = 0 Reverse recovery time Reverse recovery charge ISD = 8 A, di/dt = 100 A/μs VDD=16 V, Tj =150 °C Figure 26 Reverse recovery current 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 μs, duty cycle 1.5% Note: For the P-channel MOSFET actual polarity of voltages and current has to be reversed DocID023874 Rev 5 5/19 19 Electrical characteristics 2.1 STL40C30H3LL Electrical characteristics (curves) for N-channel Figure 2. Safe operating area Figure 3. Thermal impedance AM03899v1 ID (A) Tj=150°C Tc=25°C s ai are n) his DS(o t R n n i ax tio m era d by p O ite Lim 100 10 Sinlge pulse 100ms 1 10ms 1s 0.1 0.01 0.1 10 1 VDS(V) Figure 4. Output characteristics 70 Figure 5. Transfer characteristics AM03900v1 ID (A) VGS=10V AM03901v1 ID (A) VDS=5V 70 6V 60 60 5V 50 50 40 40 4V 30 30 20 20 3V 10 0 0 10 1 2 3 4 Figure 6. Normalized V(BR)DSS vs temperature AM03902v1 V(BR)DSS (norm) 0 0 VDS(V) 2 4 8 6 VGS(V) Figure 7. Static drain-source on-resistance AM03903v1 RDS(on) (mΩ) ID=4A VGS=10V 35 1.10 30 1.05 25 1.00 20 15 0.95 10 0.90 0.85 -55 -30 -5 6/19 5 20 45 70 95 120 TJ(°C) DocID023874 Rev 5 0 0 5 10 15 20 25 ID(A) STL40C30H3LL Electrical characteristics Figure 8. Gate charge vs gate-source voltage AM03904v1 VGS (V) VDD=15V 12 Figure 9. Capacitance variations C (pF) AM03905v1 810 ID=8A TJ=25°C f=1MHz 710 10 610 8 510 6 410 Ciss 310 4 210 2 Crss 110 0 4 2 0 Qg(nC) 6 Figure 10. Normalized gate threshold voltage vs temperature AM03906v1 VGS(th) (norm) 1.1 10 0 Coss 10 20 VDS(V) Figure 11. Normalized on-resistance vs temperature AM03907v1 RDS(on) (norm) 1.8 1.6 1.0 1.4 0.9 1.2 0.8 1.0 0.7 0.6 0.8 0.5 0.6 0.4 -55 -30 -5 20 45 70 95 120 145 TJ(°C) 0.4 -55 -30 -5 20 45 70 95 120 TJ(°C) Figure 12. Source-drain diode forward characteristics AM03908v1 VSD (V) TJ=-55°C 1.1 1.0 0.9 0.8 TJ=175°C TJ=25°C 0.7 0.6 0.5 0.4 0 5 10 15 20 25 ISD(A) DocID023874 Rev 5 7/19 19 Electrical characteristics 2.2 STL40C30H3LL Electrical characteristics (curves) for P-channel Figure 13. Safe operating area Figure 14. Thermal impedance AM17940v1 ID (A) AM17941v1 K δ=0.5 0.2 10 his DS( n t ax R ni tio by m a er d Op ite Lim o 1 0.1 10 -1 is ea ar n) 0.05 10ms 0.02 100ms 1s case 0.01 10 -2 0.1 Tj=150°C Tc=25°C Single pulse 0.01 0.1 1 Single pulse 10 -3 10 -5 VDS(V) 10 Figure 15. Output characteristics 10 -4 10 -3 10 -2 10 -1 10 0 10 1 tp(s) Figure 16. Transfer characteristics AM17931v1 VGS=6, 7, 8, 9, 10V 5V 40 35 AM17932v1 ID (A) ID (A) VDS=2V 35 4V 30 30 25 25 20 20 15 15 3V 10 10 5 5 0 2 1 0 3 2V VDS(V) Figure 17. Gate charge vs gate-source voltage AM17933v1 VGS (V) 0 0 1 2 5 6 7 VGS(V) Figure 18. Static drain-source on-resistance AM17942v1 RDS(on) (mΩ) VGS=10V ID=8A 12 4 3 24.5 10 8 24.0 6 4 23.5 2 23.0 0 0 8/19 4 8 12 16 20 24 28 Qg(nC) DocID023874 Rev 5 0 2 4 6 8 ID(A) STL40C30H3LL Electrical characteristics Figure 19. Capacitance variations Figure 20. Normalized gate threshold voltage vs temperature AM17935v1 C (pF) AM17936v1 VGS(th) (norm) ID=250µA 1600 1.2 1400 Ciss 1 1200 1000 800 0.8 600 0.6 400 200 Coss Crss 0 0 5 10 15 25 VDS(V) 20 Figure 21. Normalized on-resistance vs temperature AM17943v1 RDS(on) 0.4 -75 -50 -25 0 25 50 75 100 125 150 TJ(°C) Figure 22. Normalized V(BR)DSS vs temperature AM17938v1 V(BR)DSS (norm) (norm) ID=4A 1.6 1.08 ID=1mA 1.06 1.4 1.04 1.2 1.02 1 1 0.8 0.98 0.6 0.96 0.4 -75 -50 -25 0 25 50 75 100 125 150 TJ(°C) 0.94 -75 -50 -25 0 25 50 75 100 125 150 TJ(°C) Figure 23. Source-drain diode forward characteristics AM17944v1 VSD (V) TJ=-55°C 1 TJ=25°C 0.9 0.8 TJ=175°C 0.7 0.6 0.5 0 2 4 6 ISD(A) DocID023874 Rev 5 9/19 19 Test circuits for N-channel 3 STL40C30H3LL Test circuits for N-channel Figure 24. Switching times test circuit for resistive load Figure 25. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 26. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 27. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 28. Unclamped inductive waveform Figure 29. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 10/19 0 DocID023874 Rev 5 10% AM01473v1 STL40C30H3LL 4 Test circuits for P-channel Test circuits for P-channel Figure 30. Switching times test circuit for resistive load Figure 31. Gate charge test circuit AM11255v1 AM11256v1 Figure 32. Test circuit for diode recovery behavior AM11257v1 DocID023874 Rev 5 11/19 19 Package mechanical data 5 STL40C30H3LL Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 12/19 DocID023874 Rev 5 STL40C30H3LL Package mechanical data Figure 33. PowerFLAT™ 5x6 - double island type R-B drawing Bottom view 5 8 Pin 1 identification 1 4 Side view Pin 1 identification 4 1 Top view . 8 5 8256945_Rev.G_Type_R-B DocID023874 Rev 5 13/19 19 Package mechanical data STL40C30H3LL Table 8. PowerFLAT™ 5x6 - double island type R-B mechanical data Dimensions (mm) Ref. Min. Typ. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 0.50 D 5.00 5.20 5.40 E 5.95 6.15 6.35 D2 1.68 1.88 E2 3.50 3.70 D3 1.68 1.88 E3 3.50 3.70 E4 0.55 0.75 e 14/19 Max. 1.27 L 0.60 0.80 K 1.275 1.575 DocID023874 Rev 5 STL40C30H3LL Package mechanical data Figure 34. PowerFLAT™ 5x6 - double island type R-B drawing recommended footprint (dimensions are in mm) Footprint DocID023874 Rev 5 15/19 19 Packaging mechanical data 6 STL40C30H3LL Packaging mechanical data Figure 35. PowerFLAT™ 5x6 tape(a) P0 4.0±0.1 (II) P2 2.0±0.1 (I) T (0.30 ±0.05) E1 1.75±0.1 Y 0. 20 Do Ø1.55±0.05 W(12.00±0.3) F(5.50±0.1)(III) R Bo (5.30±0.1) C L EF D1 Ø1.5 MIN. REF .R0 .50 Y P1(8.00±0.1) Ao(6.30±0.1) Ko (1.20±0.1) SECTION Y-Y (I) Measured from centerline of sprocket hole to centerline of pocket. Base and bulk quantity 3000 pcs (II) Cumulative tolerance of 10 sprocket holes is ± 0.20 . (III) Measured from centerline of sprocket hole to centerline of pocket. 8234350_Tape_rev_C Figure 36. PowerFLAT™ 5x6 package orientation in carrier tape. Pin 1 identification a. All dimensions are in millimeters. 16/19 DocID023874 Rev 5 STL40C30H3LL Packaging mechanical data Figure 37. PowerFLAT™ 5x6 reel R0.60 W3 11.9/15.4 PART NO. 1.90 2.50 R25.00 ØN 178(±2.0) ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES W2 18.4 (max) A 330 (+0/-4.0) 4.00 2.50 77 ESD LOGO W1 12.4 (+2/-0) 06 PS ØA 128 2.20 R1.10 Ø21.2 All dimensions are in millimeters 13.00 CORE DETAIL 8234350_Reel_rev_C DocID023874 Rev 5 17/19 19 Revision history 7 STL40C30H3LL Revision history Table 9. Revision history Date Revision 31-Oct-2012 1 First revision. 09-Nov-2012 2 – Modified: RDS(on) values for N-channel – Changed: Section 5 on page 12 3 – Modified: RDS(on) only for P-channel on the title, Features table and Table 4 – Modified: typical values on Table 5, 28, 29, VSD max value on Table 29 (only for P-channel) – Updated: Section 5: Package mechanical data and Section 6: Packaging mechanical data 28-Nov-2013 4 – – – – – – 03-Apr-2014 5 – Added: Section 2.1: Electrical characteristics (curves) for Nchannel – Minor text changes 13-Feb-2013 18/19 Changes Modified: VGS (for P-channel) value in Table 2 Modified: IGSS (test conditions values) Modified: Qg typical values Modified: Figure 24, 25, 26, 27, 28, 29, 30 and 31 Updated: Section 5: Package mechanical data Minor text changes DocID023874 Rev 5 STL40C30H3LL Please Read Carefully: Information in this document is provided solely in connection with ST products. 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