STL40DN3LLH5

STL40DN3LLH5 Dual N-channel 30 V, 0.016 Ω, 11 A PowerFLAT™ (5x6) double island, STripFET™ V Power MOSFET Preliminary data Features Type VDSS RDSo(n) ID STL40DN3LLH5 30 V < 0.018 Ω 11 A (1) 1. The value is rated according Rthj-pcb ■ RDS(on) * Qg industry benchmark ■ Extremely low on-resistance RDS(on) ■ Very low switching gate charge ■ High avalanche ruggedness ■ Low gate drive power losses PowerFLAT™ (5x6) Double island Application Switching applications Figure 1. Internal schematic diagram Description This product utilizes the 5th generation of design rules of ST’s proprietary STripFET™ technology. The lowest available RDS(on)*Qg, in this chip scale package, makes this device suitable for the most demanding DC-DC converter applications, where high power density is to be achieved. Table 1. Device summary Order code Marking Package Packaging STL40DN3LLH5 40DN3LLH5 PowerFLAT™(5x6) Double island Tape and reel January 2011 Doc ID 18416 Rev 1 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/11 www.st.com 11 Contents STL40DN3LLH5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2/11 .............................................. 6 Doc ID 18416 Rev 1 STL40DN3LLH5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit 30 V ± 22 V Drain current (continuous) at TC = 25 °C 40 A VDS Drain-source voltage (VGS = 0) VGS Gate-source voltage ID (1) ID (1) Drain current (continuous) at TC = 100 °C 26 A ID (2) Drain current (continuous) at TC = 25 °C 11 A ID (2) Drain current (continuous) at TC=100°C 7 A (3) Drain current (pulsed) 44 A PTOT (1) Total dissipation at TC = 25°C 60 W (2) Total dissipation at TC = 25°C 4 W 0.03 W/°C -55 to 150 °C IDM PTOT Derating factor TJ Operating junction temperature Storage temperature Tstg 1. The value is rated according Rthj-c 2. The value is rated according Rthj-pcb 3. Pulse width limited by safe operating area Table 3. Thermal resistance Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case (drain) (steady state) 2.08 °C/W 32 °C/W Rthj-pcb (1) Thermal resistance junction-ambient 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec Doc ID 18416 Rev 1 3/11 Electrical characteristics 2 STL40DN3LLH5 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 4. Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 250 µA, VGS= 0 Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = ± 22 V VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA RDS(on) Static drain-source on resistance VGS= 10 V, ID= 5.5 A Symbol Ciss Coss Crss Qg Qgs Qgd Min. Typ. Max. 30 VDS = Max rating @125 °C 1 VGS= 4.5 V, ID= 5.5 A Unit V VDS = Max rating, IDSS Table 5. 4/11 On/off states 1 10 µA µA ±100 nA 1.5 V 0.016 0.02 0.018 0.025 Ω Ω Dynamic Parameter Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions Min. Typ. Max. Unit VDS =25 V, f=1 MHz, VGS=0 - 475 97 19 - pF pF pF - 4.5 1.7 1.9 - nC nC nC VDD=15 V, ID = 11 A VGS =4.5 V (see Figure 3) Doc ID 18416 Rev 1 STL40DN3LLH5 Electrical characteristics Table 6. Symbol td(on) tr td(off) tf Table 7. Symbol ISD Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. Unit - 4 22 13 2.8 - ns ns ns ns Min. Typ. Max. Unit VDD=15 V, ID= 11 A, RG=4.7 Ω, VGS=10 V (see Figure 2) Source drain diode Parameter Test conditions Source-drain current - 11 A ISDM(1) Source-drain current (pulsed) - 44 A VSD(2) Forward on voltage ISD = 11 A, VGS=0 - 1.1 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 11 A, trr Qrr IRRM di/dt = 100 A/µs, VDD=25 V, Tj=150 °C - 16.2 1 8.1 ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% Doc ID 18416 Rev 1 5/11 Test circuits STL40DN3LLH5 3 Test circuits Figure 2. Switching times test circuit for resistive load Figure 3. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 4. AM01469v1 Test circuit for inductive load Figure 5. switching and diode recovery times A A D.U.T. FAST DIODE B B Unclamped inductive load test circuit L A D G VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 6. Unclamped inductive waveform AM01471v1 Figure 7. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 6/11 0 Doc ID 18416 Rev 1 10% AM01473v1 STL40DN3LLH5 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Doc ID 18416 Rev 1 7/11 Package mechanical data Table 8. STL40DN3LLH5 PowerFLAT™ (5x6) double island mechanical data mm Dim. Min. Typ. Max. 0.80 0.83 0.90 A1 0.02 0.05 A3 0.20 A b 0.35 0.40 D 5.00 D1 4.75 D2 4.11 4.21 E 6.00 E1 5.75 4.31 E2 3.51 3.61 3.71 E3 2.32 2.42 2.52 e 8/11 0.47 1.27 L 0.70 0.80 0.90 L1 0.48 0.58 0.68 Doc ID 18416 Rev 1 STL40DN3LLH5 Figure 8. Package mechanical data PowerFLAT™ (5x6) double island drawing Doc ID 18416 Rev 1 9/11 Revision history 5 STL40DN3LLH5 Revision history Table 9. 10/11 Document revision history Date Revision 24-Jan-2011 1 Changes First release Doc ID 18416 Rev 1 STL40DN3LLH5 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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