STL45N60DM6

STL45N60DM6 Datasheet N-channel 600 V, 0.094 Ω typ., 25 A, MDmesh DM6 Power MOSFET in a PowerFLAT 8x8 HV package Features 5 4 3 2 1 PowerFLAT 8x8 HV Drain(5) Order code VDS RDS(on) max. ID STL45N60DM6 600 V 0.110 Ω 25 A • • Fast-recovery body diode Lower RDS(on) per area vs previous generation • • • • Low gate charge, input capacitance and resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications Gate(1) • Driver source (2) Power source (3, 4) NG1DS2PS34D5Z Switching applications Description This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fastrecovery diode series. Compared with the previous MDmesh fast generation, DM6 combines very low recovery charge (Qrr), recovery time (trr) and excellent improvement in RDS(on) per area with one of the most effective switching behaviors available in the market for the most demanding high-efficiency bridge topologies and ZVS phase-shift converters. Product status link STL45N60DM6 Product summary Order code STL45N60DM6 Marking 45N60DM6 Package PowerFLAT™ 8x8 HV Packing Tape and reel DS11670 - Rev 5 - July 2020 For further information contact your local STMicroelectronics sales office. www.st.com STL45N60DM6 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at TC = 25 °C 25 A Drain current (continuous) at TC = 100 °C 16 A Drain current (pulsed) 95 A Total power dissipation at TC = 25 °C 160 W dv/dt(2) Peak diode recovery voltage slope 100 V/ns (2) VGS ID IDM (1) PTOT Parameter Peak diode recovery current slope 1000 A/µs dv/dt(3) MOSFET dv/dt ruggedness 100 V/ns Tstg Storage temperature range -55 to 150 °C Value Unit di/dt Tj Operating junction temperature range 1. Pulse width is limited by safe operating area. 2. ISD ≤ 25 A, VDS(peak) < V(BR)DSS, VDD = 400 V 3. VDS ≤ 480 V Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 0.78 °C/W Rthj-pcb(1) Thermal resistance junction-pcb 45 °C/W Value Unit 1. When mounted on FR-4 board of 1 inch², 2oz Cu. Table 3. Avalanche characteristics Symbol DS11670 - Rev 5 Parameter IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 6 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 630 mJ page 2/14 STL45N60DM6 Electrical characteristics 2 Electrical characteristics TC = 25 °C unless otherwise specified Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. 600 Zero gate voltage drain current 1 µA 100 µA ±5 µA 4 4.75 V 0.094 0.110 Ω Min. Typ. Max. Unit - 1920 - pF - 120 - pF - 2 - pF VGS = 0 V, VDS = 600 V, TC = 125 °C(1) IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 12.5 A Unit V VGS = 0 V, VDS = 600 V IDSS Max. 3.25 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance (1) Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 310 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 1.5 - Ω Qg Total gate charge VDD = 480 V, ID = 30 A, - 44 - nC Qgs Gate-source charge VGS = 0 to 10 V - 10 - nC Qgd Gate-drain charge (see Figure 14. Gate charge test circuit) - 25 - nC Coss eq. 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS11670 - Rev 5 Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time VDD = 300 V, ID = 15 A, - 15 - ns Rise time RG = 4.7 Ω, VGS = 10 V - 5.3 - ns Turn-off delay time (see Figure 13. Switching times test circuit for resistive load and Figure 18. Switching time waveform) - 50 - ns - 7.3 - ns Fall time page 3/14 STL45N60DM6 Electrical characteristics Table 7. Source drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 25 A ISDM(1) Source-drain current (pulsed) - 95 A VSD(2) Forward on voltage VGS = 0 V, ISD = 25 A - 1.5 V trr Reverse recovery time ISD = 30 A, di/dt = 100 A/µs, - 105 ns Qrr Reverse recovery charge VDD = 100 V - 0.48 µC Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 9.3 A trr Reverse recovery time ISD = 30 A, di/dt = 100 A/µs, - 210 ns Qrr Reverse recovery charge VDD = 100 V, Tj = 150 °C - 1.95 µC Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 18.6 A IRRM IRRM 1. Pulse width is limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %. DS11670 - Rev 5 page 4/14 STL45N60DM6 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 2. Thermal impedance Figure 1. Safe operating area ID (A) 102 GADG101220180929SOA K Zth PowerFLAT 8x8 HV δ = 0.5 δ = 0.2 Operation in this area is limited by RDS(on) tp=1 µs 101 δ = 0.1 10 -1 δ = 0.05 tp =10 µs δ = 0.02 100 10-2 10-3 10-1 100 δ = 0.01 tp =100 µs TJ ≤ 150 °C, TC = 25 °C, single pulse 10-1 10 -2 tp =1 ms 101 tp =10 ms VDS (V) 102 10 -3 10 -6 Figure 3. Output characteristics ID (A) 10 -3 10 -2 tp (s) GADG200720171438TCH VDS = 18 V 80 VGS = 8 V 60 VGS = 7 V 40 40 VGS = 6 V 20 20 VGS = 5 V 0 0 4 8 12 16 VDS (V) Figure 5. Gate charge vs gate-source voltage VGS (V) GADG200720171438QVG VDS (V) VDD = 480 V ID = 30 A 12 DS11670 - Rev 5 10 -4 ID (A) GADG200720171438OCH 60 0 4 500 0.106 8 400 0.100 6 300 0.094 4 200 0.088 2 100 0.082 0 Qg (nC) 0.076 0 8 16 24 32 40 48 6 7 RDS(on) (Ω) 0.112 VDS 5 8 VGS (V) Figure 6. Static drain-source on-resistance 600 0 0 10 -5 Figure 4. Transfer characteristics VGS = 9, 10 V 80 10 Single pulse GADG220120190924RID VGS = 10 V 5 10 15 20 25 ID (A) page 5/14 STL45N60DM6 Electrical characteristics (curves) Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations C (pF) GADG250720171026CVR VGS(th) (norm.) 10 4 GADG200720171435VTH ID = 250 µA 1.1 CISS 10 3 1 0.9 10 2 COSS f = 1 MHz 10 1 10 10 -1 CRSS 0 10 0 10 1 VDS (V) 10 2 Figure 9. Normalized on-resistance vs temperature RDS(on) (norm.) GADG200720171435RON VGS = 10 V 2.5 0.8 0.7 0.6 -75 V(BR)DSS (norm.) 1.5 1 1 0.96 0.5 0.92 25 75 125 Tj ( °C) Figure 11. Source-drain diode forward characteristics VSD (V) GADG220120190926SDF 1.05 75 125 Tj ( °C) GADG200720171436BDV 1.08 1.04 -25 25 Figure 10. Normalized V(BR)DSS vs temperature 2 0 -75 -25 0.88 -75 ID = 1 mA -25 25 75 125 Tj ( °C) Figure 12. Output capacitance stored energy EOSS (µJ) GADG200720171522CSE 20 TJ = -50 °C 0.95 16 TJ = 25 °C 0.85 12 TJ = 150 °C 0.75 8 0.65 0.55 0 DS11670 - Rev 5 4 5 10 15 20 25 ISD (A) 0 0 100 200 300 400 500 600 VDS (V) page 6/14 STL45N60DM6 Test circuits 3 Test circuits Figure 14. Gate charge test circuit Figure 13. Switching times test circuit for resistive load VDD 12 V RL + VD VGS µF VDD IG= CONST VGS RG 1 kΩ 100 nF 3.3 µF 2200 47 kΩ + pulse width D.U.T. 2200 μF PW D.U.T. 100 Ω 2.7 kΩ VG 47 kΩ GND1 (driver signal) GND2 (power) 1 kΩ GND1 AM15855v1 GND2 AM01469v2 Figure 15. Test circuit for inductive load switching and diode recovery times A A D.U.T. FAST DIODE Figure 16. Unclamped inductive load test circuit A L D G S L=100µH B B D 25Ω VD 3.3 µF B + 1000 µF 2200 µF 3.3 µF + VDD VDD ID G S RG D.U.T. Vi D.U.T. Pw GND2 GND1 GND1 GND2 AM15858v1 AM15857v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS11670 - Rev 5 page 7/14 STL45N60DM6 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 PowerFLAT 8x8 HV package information Figure 19. PowerFLAT 8x8 HV package outline 8222871_Rev_4 DS11670 - Rev 5 page 8/14 STL45N60DM6 PowerFLAT 8x8 HV package information Table 8. PowerFLAT 8x8 HV mechanical data Ref. Dimensions (in mm) Min. Typ. Max. A 0.75 0.85 0.95 A1 0.00 A3 0.10 0.20 0.30 b 0.90 1.00 1.10 D 7.90 8.00 8.10 E 7.90 8.00 8.10 D2 7.10 7.20 7.30 E1 2.65 2.75 2.85 E2 4.25 4.35 4.45 e L 0.05 2.00 BSC 0.40 0.50 0.60 Figure 20. PowerFLAT 8x8 HV footprint 8222871_REV_4_footprint Note: DS11670 - Rev 5 All dimensions are in millimeters. page 9/14 STL45N60DM6 PowerFLAT 8x8 HV packing information 4.2 PowerFLAT 8x8 HV packing information Figure 21. PowerFLAT 8x8 HV tape P2 (2.0±0.1) T (0.30±0.05) P0 (4.0±0.1) D0 ( 1.55±0.05) D1 ( 1.5 Min) P1 (12.00±0.1) W (16.00±0.3) F (7.50±0.1) B0 (8.30±0.1) E (1.75±0.1) A0 (8.30±0.1) K0 (1.10±0.1) Note: Base and Bulk qu antity 3000 pcs 8229819_Tape_revA Note: All dimensions are in millimeters. Figure 22. PowerFLAT 8x8 HV package orientation in carrier tape ST ST ST ST DS11670 - Rev 5 page 10/14 STL45N60DM6 PowerFLAT 8x8 HV packing information Figure 23. PowerFLAT 8x8 HV reel 8229819_Reel_revA Note: DS11670 - Rev 5 All dimensions are in millimeters. page 11/14 STL45N60DM6 Revision history Table 9. Document revision history Date Revision 27-May-2016 1 Changes First release. Modified title and features in cover page. 02-Aug-2017 2 Updated Section 1: "Electrical ratings" and Section 2: "Electrical characteristics". Added Section 2.1: "Electrical characteristics (curves)". Minor text changes. Removed maturity status indication from cover page. 03-Jul-2018 3 Updated features on cover page. Minor text changes. Updated Table 1. Absolute maximum ratings, Table 4. On/off states and Table 7. Source drain diode. 28-Jan-2019 4 Updated Figure 1. Safe operating area, Figure 6. Static drain-source onresistance and Figure 11. Source-drain diode forward characteristics. Minor text changes. 21-Jul-2020 DS11670 - Rev 5 5 Updated Table 1. Absolute maximum ratings and Figure 22. PowerFLAT 8x8 HV package orientation in carrier tape. page 12/14 STL45N60DM6 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 PowerFLAT 8x8 HV package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 PowerFLAT 8x8 HV packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 DS11670 - Rev 5 page 13/14 STL45N60DM6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS11670 - Rev 5 page 14/14