STL4P3LLH6

STL4P3LLH6 P-channel 30 V, 0.048 Ω typ., 4 A STripFET™ H6 DeepGATE™ Power MOSFET in PowerFLAT™ 2x2 package Datasheet - preliminary data Features 1 2 3 4 3 RDS(on) max. ID STL4P3LLH6 30 V 0.056 Ω at 10 V 4A • Very low gate charge 5 2 VDSS • Very low on-resistance RDS(on) 6 1 Order code • High avalanche ruggedness • Low gate drive power loss PowerFLAT™ 2x2 Applications • Switching application Figure 1. Internal schematic diagram 2(D) 1(D) D 6(D) Description 3(G) This device is a P-channel Power MOSFET developed using the STripFET™ H6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. S 5(D) 4(S) AM11269v1 Table 1. Device summary Note: Order code Marking Package Packaging STL4P3LLH6 4K3L PowerFLAT™ 2x2 Tape and reel For the P-channel MOSFET the actual polarity of the voltages and the current must be reversed. December 2014 DocID024616 Rev 2 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/13 www.st.com 13 Contents STL4P3LLH6 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 ............................................... 8 DocID024616 Rev 2 STL4P3LLH6 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage ± 20 V ID Drain current (continuous) at Tamb = 25 °C 4 A ID Drain current (continuous) at Tamb = 100 °C 2.75 A Drain current (pulsed) 16 A PTOT Total dissipation at Tamb = 25 °C 2.4 W TJ Operating junction temperature 150 °C Tstg Storage temperature -55 to 150 °C Value Unit 52 °C/W IDM (1) 1. Pulse width limited by safe operating area Table 3. Thermal resistance Symbol Rthj-amb (1) Parameter Thermal resistance junction-amb 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec Note: For the P-channel MOSFET the actual polarity of the voltages and the current must be reversed. DocID024616 Rev 2 3/13 Electrical characteristics 2 STL4P3LLH6 Electrical characteristics (TCASE = 25 °C unless otherwise specified). Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 250 µA Min Typ Max 30 Unit V VGS = 0 V, VDS = 30 V 1 VGS = 0 V, VDS = 30 V, TJ = 125 °C 10 100 nA 2.5 V IDSS Zero gate voltage drain current IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA Static drain-source on-resistance VGS = 10 V, ID = 2 A 0.048 0.056 RDS(on) VGS = 4.5 V, ID = 2 A 0.075 0.09 Min Typ Max - 639 - - 79 - - 52 - - 6 - - 1.9 - - 2.1 - µA 1 Ω Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f=1 MHz, VGS = 0 V VDD = 15 V, ID = 4 A, VGS = 4.5 V Unit pF nC Table 6. Switching times Symbol td(on) tr td(off) tf 4/13 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD= 15 V, ID = 4 A, RG = 4.7 Ω, VGS = 10 V Fall time DocID024616 Rev 2 Min Typ Max - 5.4 - - 5 - - 19.2 - - 3.4 - Unit ns STL4P3LLH6 Electrical characteristics Table 7. Source drain diode Symbol VSD(1) Parameter Test conditions Min Typ Max Unit Forward on voltage ISD = 4 A, VGS = 0 - - 1.1 V trr Reverse recovery time - 11.2 - ns Qrr Reverse recovery charge - 3.5 - nC IRRM Reverse recovery current ISD = 4 A, di/dt = 100 A/µs, VDD= 16 V, TJ = 150 °C - 0.6 - A 1. Pulsed: pulse duration=300µs, duty cycle 1.5% Note: For the P-channel MOSFET the actual polarity of the voltages and the current must be reversed. DocID024616 Rev 2 5/13 Electrical characteristics 2.1 STL4P3LLH6 Electrical characteristics (curves) Figure 2. Safe operating area ,'$ Figure 3. Thermal impedance *,3*$/6 *,3*$/6 . į  —V Q  ' 6 R 2 LV SH OL UD P W LWH LRQ G LQ E\ W P KLV D[ D 5 UH D į   į  į  PV PV  į  =WK N5WKMDPE į WSϨ  į  6,1*/(38/6( 7M ƒ& 7DPE ƒ& 6LQJOHSXOVH      9'69 Figure 4. Output characteristics ,' $       9*6 9   9*6 9  9*6 9     9'69 Figure 6. Gate charge vs gate-source voltage 9*6 9       9*69 Figure 7. Static drain-source on-resistance 5'6RQ Pȍ *,3*)65   WSV  9*6 9   9'6 9 9*6 9   *,3*)65   Ϩ Figure 5. Transfer characteristics ,' $ *,3*)65 9*6 9 WS *,3*)65 9*6 9  9'' 9 ,' $          6/13    4JQ&   DocID024616 Rev 2      ,'$ STL4P3LLH6 Electrical characteristics Figure 8. Normalized V(BR)DSS vs temperature 9%5'66 *,3*07 QRUP ,' —$  Figure 9. Capacitance variations *,3')65 & S)   &LVV                 7-ƒ& Figure 10. Normalized gate threshold voltage vs. temperature 9*6WK *,3*07 QRUP   ,' —$ Figure 11. Normalized on-resistance vs. temperature *,3*07 5'6RQ 9*6 9     QRUP  &RVV &UVV 9'69                  7-ƒ&        7-ƒ& Figure 12. Source-drain diode forward characteristics *,3')65 96' 9 7M ƒ&  7M ƒ&   7M ƒ&         ,6'$ DocID024616 Rev 2 7/13 Test circuits 3 STL4P3LLH6 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit / 5/ 9'  —)  —) 9'' * 3: '87 ,** $0Y Figure 15. Test circuit for inductive load switching and diode recovery times $ ' * 6 026 ',2'( $ $ / —) )$67 ',2'( % % % 5*6  —) ' * 5*  —) 9'' '87 6 $0Y 8/13 '87 6 5* 9*6 9'' ' DocID024616 Rev 2 $0Y STL4P3LLH6 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 8. PowerFLAT™ 2 x 2 mechanical data mm. Dim. Min. Typ. Max. A 0.70 0.75 0.80 A1 0.00 0.02 0.05 A3 0.20 b 0.25 0.30 0.35 D 1.90 2.00 2.10 E 1.90 2.00 2.10 D2 0.90 1.00 1.10 E2 0.80 0.90 1.00 e 0.55 0.65 0.75 K 0.15 0.25 0.35 K1 0.20 0.30 0.40 K2 0.25 0.35 0.45 L 0.20 0.25 0.30 L1 0.65 0.75 0.85 DocID024616 Rev 2 9/13 Package mechanical data STL4P3LLH6 Figure 16. Drawing dimension PowerFLAT™ 2 x 2 8368575_REV_C 10/13 DocID024616 Rev 2 STL4P3LLH6 5 Packaging mechanical data Packaging mechanical data Figure 17. PowerFLAT™ 2 x 2 footprint (dimensions in mm) Footprint DocID024616 Rev 2 11/13 Revision history 6 STL4P3LLH6 Revision history Table 9. Document revision history Date Revision 09-May-2013 1 Initial release. 2 Text edits throughout document On cover page: – changed title description – updated features and description In Table 4, changed RDS(on) values In Table 5, changed values and test conditions In Table 6, changed values and test conditions In Table 7, changed values and test conditions Added Section 2.1: Electrical characteristics (curves) Updated Section 3: Test circuits Updated Section 4: Package mechanical data 09-Dec-2014 12/13 Changes DocID024616 Rev 2 STL4P3LLH6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved DocID024616 Rev 2 13/13