STL56N3LLH5

STL56N3LLH5 Datasheet N-channel 30 V, 7.6 mΩ typ., 56 A STripFET H5 Power MOSFET in a PowerFLAT 5x6 package Features PowerFLAT 5x6 D(5, 6, 7, 8) 8 7 5 6 Order code VDS RDS(on) max. ID STL56N3LLH5 30 V 9 mΩ 56 A • Low on-resistance RDS(on) • • High avalanche ruggedness Low gate drive power loss Applications • Switching applications Description G(4) 1 2 3 4 This device is an N-channel Power MOSFET developed using STMicroelectronics’ STripFET H5 technology. The device has been optimized to achieve very low onstate resistance, contributing to a FoM that is among the best in its class. Top View S(1, 2, 3) AM15540v2 Product status link STL56N3LLH5 Product summary Order code STL56N3LLH5 Marking 56N3LLH5 Package PowerFLAT 5x6 Packing Tape and reel DS7089 - Rev 7 - May 2021 For further information contact your local STMicroelectronics sales office. www.st.com STL56N3LLH5 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage +22 / -20 V Drain current (continuous) at TC = 25 °C 56 A Drain current (continuous) at TC= 100 °C 37 A Drain current (continuous) at Tpcb = 25 °C 15 A Drain current (continuous) at Tpcb= 100 °C 10 A IDM (1)(3) Drain current (pulsed) 224 A IDM(2)(3) Drain current (pulsed) 60 A PTOT(1) Total power dissipation at TC = 25 °C 62.5 W PTOT(2) Total power dissipation at Tpcb = 25 °C 4 W EAS(4) Single pulse avalanche energy 150 mJ ID(1) ID(2) Tstg TJ Storage temperature range Operating junction temperature range - 55 to 150 °C °C 1. This value is rated according to Rthj-c. 2. This value is rated according to Rthj-pcb. 3. Pulse width is limited by safe operating area. 4. Starting TJ = 25 °C, ID = 56 A, VDD = 50 V. Table 2. Thermal data Symbol Parameter Value Rthj-case Thermal resistance junction-case 2 Rthj-pcb(1) Thermal resistance junction-pcb 31.3 Unit °C/W 1. When mounted on a 1-inch² FR-4 board, 2oz Cu, t < 10 s. DS7089 - Rev 7 page 2/17 STL56N3LLH5 Electrical characteristics 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 3. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 250 µA Min. Typ. Max. 30 Unit V VGS = 0 V, VDS = 30 V 1 µA VGS = 0 V, VDS = 30 V, TC = 125 °C 10 µA ±100 nA 2.5 V IDSS Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = +22 / -20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance 1 VGS = 10 V, ID = 7.5 A 7.6 9 VGS = 4.5 V, ID = 7.5 A 9.9 11.2 Min. Typ. Max. - 950 pF - 193 pF - 27 pF - 6.5 - 3.3 nC - 2.4 nC - 1.7 2.5 Ω Min. Typ. Max. Unit mΩ Table 4. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Rg Gate input resistance Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 15 V, ID = 15 A, VGS = 4.5 V (see Figure 13. Test circuit for gate charge behavior) f = 1 MHz, gate DC Bias = 0 V, test signal level = 20 mV, ID = 0 A 10 Unit nC Table 5. Switching times Symbol td(on) tr td(off) tf DS7089 - Rev 7 Parameter Test conditions Turn-on delay time VDD = 15 V, ID = 7.5 A, - 10.8 - ns Rise time RG = 4.7 Ω, VGS = 10 V - 15.6 - ns Turn-off-delay time (see Figure 12. Test circuit for resistive load switching times and Figure 17. Switching time waveform) - 14.2 - ns - 6 - ns Fall time page 3/17 STL56N3LLH5 Electrical characteristics Table 6. Source-drain diode Symbol ISD ISDM (1) VSD(2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 56 A Source-drain current (pulsed) - 224 A 1.1 V Forward on voltage VGS = 0 V, ISD = 15 A - trr Reverse recovery time ISD = 15 A, di/dt = 100 A/µs, - 20 36 ns Qrr Reverse recovery charge VDD = 25 V, TJ = 150 °C - 10 18 nC IRRM Reverse recovery current (see Figure 14. Test circuit for inductive load switching and diode recovery times) - 1 A 1. Pulse width limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DS7089 - Rev 7 page 4/17 STL56N3LLH5 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance AM010329v1 ID (A) GIPG230720141152SA K δ=0.5 1µs s ai a re ) is S(on D th in a x R n t io y m e ra d b Op it e Lim 100 0.2 10µs 0.1 100µs 10 0.05 10-1 0.02 0.01 Single pulse 1 Tj=150°C Tc=25°C Single pulse 0.1 10 1 0.1 VDS(V) 10-2 10-5 Figure 3. Output characteristics ID (A) 140 AM10331v1 ID (A) 6V 120 VDS =3V 140 120 5V 100 100 80 80 4V 60 60 40 40 20 20 0 tp(s) 10-3 Figure 4. Transfer characteristics AM10330v1 VGS =10V 10-4 3V 0 1 2 3 4 VDS (V) Figure 5. Gate charge vs gate-source voltage VGS (V) AM10332v1 0 2 0 VDD=15V ID=15A 8 6 VGS (V) Figure 6. Static drain-source on-resistance AM10335v1 R DS (on) (mΩ) 6 4 VGS =10V 13 5 11 4 9 3 7 2 5 1 0 DS7089 - Rev 7 0 2 4 6 8 Q g (nC) 3 4 6 8 10 12 14 ID(A) page 5/17 STL56N3LLH5 Electrical characteristics (curves) Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations AM10333v1 C (pF) AM10336v1 VGS (th) (norm) ID=250µA 1200 1.2 Cis s 900 1.0 600 0.8 300 0 0 0.6 Cos s 5 15 10 25 20 Crs s VDS (V) 0.4 -75 AM10337v1 (norm) 1.04 1.2 1.00 0.8 0.96 75 TJ (°C) AM10334v1 ID=1mA 1.6 25 125 (norm) 1.08 -25 75 V(BR)DSS ID=7.5A VGS =10V 1.6 0.4 -75 25 Figure 10. Normalized V(BR)DSS vs temperature Figure 9. Normalized on-resistance vs temperature R DS (on) -25 0.92 -75 TJ (°C) 125 -25 25 75 125 TJ(°C) Figure 11. Source-drain diode forward characteristics AM10338v1 VS D (V) TJ =-55°C 0.9 TJ =25°C 0.8 0.7 TJ =150°C 0.6 0.5 DS7089 - Rev 7 4 6 8 10 12 14 IS D(A) page 6/17 STL56N3LLH5 Test circuits 3 Test circuits Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A VD 100 µH fast diode B B B 3.3 µF D G + Figure 15. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Switching time waveform Figure 16. Unclamped inductive waveform ton V(BR)DSS td(on) toff td(off) tr tf VD 90% 90% IDM VDD 10% 0 ID VDD VGS AM01472v1 0 VDS 10% 90% 10% AM01473v1 DS7089 - Rev 7 page 7/17 STL56N3LLH5 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 PowerFLAT 5x6 type R package information Figure 18. PowerFLAT 5x6 type R package outline A0ER_8231817_Rev20 DS7089 - Rev 7 page 8/17 STL56N3LLH5 PowerFLAT 5x6 type R package information Table 7. PowerFLAT 5x6 type R mechanical data Dim. mm Min. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 C 5.80 6.00 6.20 D 5.00 5.20 5.40 D2 4.15 D3 4.05 4.20 4.35 D4 4.80 5.00 5.20 D5 0.25 0.40 0.55 D6 0.15 0.30 0.45 e DS7089 - Rev 7 Typ. 0.50 4.45 1.27 E 5.95 6.15 E2 3.50 3.70 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 E6 0.20 0.325 0.45 E7 0.75 0.90 1.05 K 1.275 1.575 L 0.60 0.80 L1 0.05 θ 0° 0.15 6.35 0.25 12° page 9/17 STL56N3LLH5 PowerFLAT 5x6 type R SUBCON package information 4.2 PowerFLAT 5x6 type R SUBCON package information Figure 19. PowerFLAT 5x6 type R SUBCON package outline 8472137_SUBCON_998G_REV4 8472137_SUBCON_998G_Type_R_REV4 DS7089 - Rev 7 page 10/17 STL56N3LLH5 PowerFLAT 5x6 type R SUBCON package information Table 8. PowerFLAT 5x6 type R SUBCON package mechanical data Dim. A mm Min. Typ. Max. 0.90 0.95 1.00 A1 b 0.02 0.35 b1 c 0.40 0.21 0.25 D 0.34 5.10 D1 4.80 4.90 5.00 D2 3.91 4.01 4.11 e 1.17 1.27 1.37 E 5.90 6.00 6.10 E1 5.70 5.75 5.80 E2 3.34 3.44 3.54 E4 0.15 0.25 0.35 E5 0.06 0.16 0.26 H 0.51 0.61 0.71 K 1.10 L 0.51 0.61 0.71 L1 0.06 0.13 0.20 L2 DS7089 - Rev 7 0.45 0.30 0.10 P 1.00 1.10 1.20 θ 8° 10° 12° page 11/17 STL56N3LLH5 PowerFLAT 5x6 type R SUBCON package information Figure 20. PowerFLAT 5x6 recommended footprint (dimensions are in mm) 8231817_FOOTPRINT_simp_Rev_20 DS7089 - Rev 7 page 12/17 STL56N3LLH5 PowerFLAT 5x6 packing information 4.3 PowerFLAT 5x6 packing information Figure 21. PowerFLAT 5x6 tape (dimensions are in mm) (I) Measured from centreline of sprocket hole to centreline of pocket. (II) Cumulative tolerance of 10 sprocket holes is ±0.20. Base and bulk quantity 3000 pcs All dimensions are in millimeters (III) Measured from centreline of sprocket hole to centreline of pocket 8234350_Tape_rev_C Figure 22. PowerFLAT 5x6 package orientation in carrier tape Pin 1 identification DS7089 - Rev 7 page 13/17 STL56N3LLH5 PowerFLAT 5x6 packing information Figure 23. PowerFLAT 5x6 reel DS7089 - Rev 7 page 14/17 STL56N3LLH5 Revision history Table 9. Document revision history Date Revision Changes 24-Jan-2011 1 First release. 01-Jul-2011 2 Document status promoted from preliminary data to datasheet. Added EAS value in Table 2: Absolute maximum ratings. 27-Apr-2012 3 Updated Table 3: Thermal resistance, Table 4: On/off states, Table 5: Dynamic and Table 7: Source drain diode. Minor text changes. 13-Feb-2013 4 – Added: Section 5: Packaging mechanical data. – Updated Section 4: Package mechanical data. – Modified: title, features and description in cover page – Modified: ISD and ISDM max values in Table 7 25-Jul-2014 5 – Updated: Figure 2 and 3 – Updated: Figure 13, 14, 15 and 16 – Updated: Section 4: Package mechanical data – Minor text changes DS7089 - Rev 7 19-Feb-2020 6 20-May-2021 7 Updated Section 4 Package information.. Minor text changes. Updated marking in cover page. page 15/17 STL56N3LLH5 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 PowerFLAT 5x6 type R package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 PowerFLAT 5x6 type R SUBCON package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 PowerFLAT 5x6 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 DS7089 - Rev 7 page 16/17 STL56N3LLH5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DS7089 - Rev 7 page 17/17