STL58N3LLH5

STL58N3LLH5 Automotive-grade N-channel 30 V, 0.0076 Ω typ., 56 A STripFET™ H5 Power MOSFET in a PowerFLAT™ 5x6 package Datasheet — production data Features VDS RDS(on) max ID STL58N3LLH5 30 V 0.009 Ω 56 A • Designed for automotive applications and AEC-Q101 qualified 1 2 Order code 3 • Low on-resistance 4 • High avalanche ruggedness PowerFLAT™ 5x6 • Low gate drive power loss • Wettable flank package Figure 1. Internal schematic diagram Applications • Switching applications ' Description This device is an N-channel Power MOSFET developed using STMicroelectronics’ STripFET™ H5 technology. The device has been optimized to achieve very low on-state resistance, contributing to a FoM that is among the best in its class. * 6 $0Y Table 1. Device summary Order code Marking Package Packaging STL58N3LLH5 58N3LH5 PowerFLAT™ 5x6 Tape and reel December 2014 This is information on a product in full production. DocID026773 Rev 2 1/16 www.st.com Contents STL58N3LLH5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 .............................................. 8 DocID026773 Rev 2 STL58N3LLH5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage +22 / -20 V ID(1) Drain current (continuous) at TC = 25 °C 64 A ID (1) Drain current (continuous) at TC = 100 °C 45 A ID(2) Drain current (continuous) at Tpcb = 25 °C 16 A (2) ID Drain current (continuous) at Tpcb =100°C 11.5 A IDM(1)(3) Drain current (pulsed) 224 A IDM(2)(3) Drain current (pulsed) 75 A PTOT (1) Total dissipation at TC = 25°C 62.5 W PTOT (2) Total dissipation at Tpcb = 25°C 4.8 W EAS Single pulse avalanche energy 150 mJ TJ Operating junction temperature -55 to 175 °C Tstg Storage temperature Value Unit (4) 1. The value is rated according to Rthj-c 2. The value is rated according to Rthj-pcb 3. Pulse width limited by safe operating area 4. Starting Tj = 25 °C, ID = 56 A, VDD = 50 V Table 3. Thermal resistance Symbol Parameter Rthj-case Thermal resistance junction-case 2 °C/W Rthj-pcb (1) Thermal resistance junction-pcb 31.3 °C/W 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec DocID026773 Rev 2 3/16 16 Electrical characteristics 2 STL58N3LLH5 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 250 µA Min. Typ. Max. 30 Unit V VGS = 0 V, VDS = 30 V, 1 µA VGS = 0 V VDS = 30 V, TC = 125 °C 10 µA ±100 nA 2.5 V IDSS Zero gate voltage drain current IGSS Gate body leakage current VDS = 0 V, VGS = +22 / ˗20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA Static drain-source on- resistance VGS = 10 V, ID = 7.5 A 0.0076 0.009 Ω RDS(on) VGS = 4.5 V, ID = 7.5 A 0.0099 0.0112 Ω 1 Table 5. Dynamic Symbol Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Rg 4/16 Parameter Gate input resistance Test conditions VDS =2 5 V, f = 1 MHz, VGS = 0 V Min. Typ. Max. - 950 pF - 193 pF - 27 pF VDD = 15 V, ID = 15 A, VGS = 4.5 V (see Figure 14) - 6.5 - 3.3 nC - 2.4 nC f = 1 MHz, gate DC Bias = 0, test signal level = 20 mV, ID = 0 A - 1.7 DocID026773 Rev 2 10 Unit 2.5 nC Ω STL58N3LLH5 Electrical characteristics Table 6. Switching times Symbol td(on) tr Parameter Test conditions Turn-on delay time VDD = 15 V, ID = 7.5 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13) Rise time td(off) tf Turn-off delay time Fall time Min. Typ. Max. Unit - 10.8 - ns - 15.6 - ns - 14.2 - ns - 6 - ns Typ. Max Unit Table 7. Source drain diode Symbol ISD ISDM (1) VSD(2) Parameter Test conditions Min Source-drain current - 56 A Source-drain current (pulsed) - 224 A 1.1 V Forward on voltage ISD = 15 A, VGS = 0 V - trr Reverse recovery time - 20 36 ns Qrr Reverse recovery charge - 10 18 nC IRRM Reverse recovery current ISD = 15 A, di/dt = 100 A/µs, VDD = 25 V, TJ = 150 °C - 1 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration= 300 µs, duty cycle 1.5% DocID026773 Rev 2 5/16 16 Electrical characteristics 2.1 STL58N3LLH5 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance $0Y ,' $  *,3*6$ . į  —V LV HD Q DU LV '6R LQ D[5  LRQ \P DW HU GE 2S LWH /LP  —V WK  —V       6LQJOHSXOVH  7M ƒ& 7F ƒ& 6LQJOHSXOVH        9'69 Figure 4. Output characteristics ID (A) 140   WSV Figure 5. Transfer characteristics AM10330v1 VGS=10V 6V 120 AM10331v1 ID (A) VDS=3V 140 120 5V 100 100 80 80 4V 60 60 40 40 20 20 3V 0 0 1 2 3 4 Figure 6. Normalized V(BR)DSS vs temperature AM10334v1 V(BR)DSS 0 0 VDS(V) (norm) 2 4 8 6 VGS(V) Figure 7. Static drain-source on-resistance AM10335v1 RDS(on) (mΩ) VGS=10V ID=1mA 13 1.08 11 1.04 9 1.00 7 0.96 0.92 -75 6/16 5 -25 25 75 125 TJ(°C) DocID026773 Rev 2 3 4 6 8 10 12 14 ID(A) STL58N3LLH5 Electrical characteristics Figure 8. Gate charge vs gate-source voltage AM10332v1 VGS (V) VDD=15V ID=15A 6 Figure 9. Capacitance variations AM10333v1 C (pF) 1200 5 Ciss 900 4 3 600 2 300 1 Coss 0 0 4 2 8 6 0 0 Qg(nC) Figure 10. Normalized gate threshold voltage vs temperature AM10336v1 VGS(th) 5 1.2  1.0  0.8  0.6  25 -25 75 125 TJ(°C) 25 Crss VDS(V) $0Y 5'6RQ ,' $ 9*6 9 ID=250µA 0.4 -75 20 Figure 11. Normalized on-resistance vs temperature QRUP (norm) 15 10       7-ƒ& Figure 12. Source-drain diode forward characteristics AM10338v1 VSD (V) TJ=-55°C 0.9 TJ=25°C 0.8 0.7 TJ=150°C 0.6 0.5 4 6 8 10 12 14 ISD(A) DocID026773 Rev 2 7/16 16 Test circuits 3 STL58N3LLH5 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit 9'' 9 μF VDD VD VGS RG Nȍ Q) 3.3 μF 2200 RL Nȍ 9L 9 9*0$;  P) D.U.T. ,* &2167 ȍ '87 Nȍ 9* PW Nȍ Nȍ 3: $0Y AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B S VD L=100μH 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 9%5'66 WRQ 9' WGRQ WRII WU WGRII   ,'0  9'' $0Y 8/16   ,' 9'' WI 9*6  DocID026773 Rev 2  9'6  $0Y STL58N3LLH5 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID026773 Rev 2 9/16 16 Package mechanical data STL58N3LLH5 Figure 19. PowerFLAT™ 5x6 WF type S-R drawing %277209,(:  3LQ LGHQWLILFDWLRQ (  ' . ( (  ( 'HWDLO$ 6FDOH   H /  E $ $ $ 6,'(9,(: 'HWDLO$ '   [/  ( 3LQ LGHQWLILFDWLRQ   7239,(: B65B:)B5HYB- 10/16 DocID026773 Rev 2 STL58N3LLH5 Package mechanical data Table 8. PowerFLAT™ 5x6 WF type S-R mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 D 5.00 5.20 5.40 E 6.20 6.40 6.60 D2 4.11 4.31 E2 3.50 3.70 e L 0.50 1.27 0.70 L1 0.90 0.275 K 1.275 1.575 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 DocID026773 Rev 2 11/16 16 Package mechanical data STL58N3LLH5 Figure 20. PowerFLAT™ 5x6 WF type S-R drawing recommended footprint (a) B65B:)B)22735,17B5HYB- a. All dimensions are in mm. 12/16 DocID026773 Rev 2 STL58N3LLH5 Packaging mechanical data Figure 21. PowerFLAT™ 5x6 type R-WF tape(b) Do P2 2.0 0.05(I) +0.1 1.50 0.0 Po 4.0 0.1(II) E1 1.75 0.1 F(5.50±0.0.05)(III) Y D1 1.50MIN R0.30 MAX W(12.00±0.1) T 0.30 0.05 Bo (5.35±0.05) 5 Packaging mechanical data Y Ko (1.20±0.1) P1(8.00±0.1) Ao(6.70±0.1) SECTION Y-Y (I) (II) (III) Measured from centreline of sprocket hole to centreline of pocket. Cumulative tolerance of 10 sprocket holes is ± 0.20 . Measured from centreline of sprocket hole to centreline of pocket. Base and bulk quantity 3000 pcs 8234350_TapeWF_rev_C Figure 22. PowerFLAT™ 5x6 package orientation in carrier tape Pin 1 identification b. All dimensions are in millimeters. DocID026773 Rev 2 13/16 16 Packaging mechanical data STL58N3LLH5 Figure 23. PowerFLAT™ 5x6 reel R0.60 W3 11.9/15.4 PART NO. 1.90 2.50 R25.00 ØN 178(±2.0) ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES W2 18.4 (max) A 330 (+0/-4.0) 4.00 2.50 77 ESD LOGO W1 12.4 (+2/-0) 06 PS ØA 128 2.20 R1.10 Ø21.2 All dimensions are in millimeters 13.00 CORE DETAIL 8234350_Reel_rev_C 14/16 DocID026773 Rev 2 STL58N3LLH5 6 Revision history Revision history Table 9. Document revision history Date Revision 04-Aug-2014 1 First release. 2 Text edits throughout document. On cover page: Updated title, features and description Updated Table 2: Absolute maximum ratings Updated Figure 19: PowerFLAT™ 5x6 WF type S-R drawing 15-Dec-2014 Changes DocID026773 Rev 2 15/16 16 STL58N3LLH5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved 16/16 DocID026773 Rev 2