STL7N6LF3
Automotive-grade N-channel 60 V, 35 mΩ typ., 6.5 A
STripFET™ F3 Power MOSFET in a PowerFLAT™ 5x6 package
Datasheet - production data
Features
Order code
VDS
RDS(on) max.
ID
STL7N6LF3
60 V
43 mΩ
6.5 A
AEC-Q101 qualified
Logic level VGS(th)
175 °C maximum junction temperature
100% avalanche rated
Wettable flank package
Applications
Figure 1: Internal schematic diagram
Switching applications
Description
This device is an N-channel Power MOSFET
developed using STripFET™ F3 technology. It is
designed to minimize on-resistance and gate
charge to provide superior switching
performance.
Table 1: Device summary
Order code
Marking
Package
Packing
STL7N6LF3
7N6LF3
PowerFLAT™ 5x6
Tape and reel
February 2017
DocID027038 Rev 4
This is information on a product in full production.
1/15
www.st.com
Contents
STL7N6LF3
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 8
4
Package information ....................................................................... 9
5
2/15
4.1
PowerFLAT 5x6 WF type R package information ............................. 9
4.2
Packing information ......................................................................... 12
Revision history ............................................................................ 14
DocID027038 Rev 4
STL7N6LF3
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
60
V
VGS
Gate-source voltage
±20
V
ID(1)
Drain current (continuous) at TC = 25 °C
20
A
ID(1)
Drain current (continuous) at Tc = 100 °C
16
A
ID(2)
Drain current (continuous) at Tpcb = 25 °C
6.5
A
ID(2)
Drain current (continuous) at Tpcb = 100 °C
4.6
A
Drain current (pulsed)
26
A
IDM(3),(2)
PTOT
(1)
Total dissipation at TC = 25 °C
52
W
PTOT(2)
Total dissipation at Tpcb = 25°C
4.3
W
IAV
Not-repetitive avalanche current
6.5
A
EAS(4)
Single pulse avalanche energy
190
mJ
-55 to 175
°C
Tj
Operating junction temperature range
Tstg
Storage temperature range
Notes:
(1)
This value is rated according to Rthj-case
(2)
This value is rated according to Rthj-pcb
(3)
Pulse width limited by safe operating area.
(4)
Starting TJ= 25 °C, ID= 8 A, VDD= 25 V.
Table 3: Thermal resitance
Symbol
Parameter
Rthj-case
Rthj-pcb
(1)
Value
Unit
Thermal resistance junction-case
2.9
°C/W
Thermal resistance junction-pcb
35
°C/W
Notes:
(1)When
mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s
DocID027038 Rev 4
3/15
Electrical characteristics
2
STL7N6LF3
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 4: On/Off states
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Drain-source breakdown
voltage
VGS = 0 V, ID = 250 μA
IDSS
Zero gate voltage
drain current
VGS = 0 V, VDS = 60 V
1
µA
IGSS
Gate-body leakage
current
VDS = 0 V, VGS = ±20 V
±100
nA
VGS(th)
Gate threshold voltage
VDS = VGS , ID = 250 μA
2.5
V
RDS(on)
Static drain-source
on-resistance
VGS = 10 V, ID = 3 A
35
43
mΩ
VGS = 5 V, ID = 3 A
48
60
mΩ
Min.
Typ.
Max.
Unit
-
432
-
-
93
-
-
10.5
-
-
8.7
-
-
1.9
-
-
1.9
-
-
6.3
-
Ω
Test conditions
Min.
Typ.
Max.
Unit
VDD = 30 V, ID = 3 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 12: "Test circuit
for resistive load switching
times" and Figure 17:
"Switching time waveform")
-
6.7
-
-
10.4
-
-
32.4
-
-
5.4
-
V(BR)DSS
60
V
1
Table 5: Dynamic
Symbol
Ciss
Test conditions
Parameter
Input capacitance
VDS = 25 V, f = 1 MHz,
VGS = 0 V
Coss
Output capacitance
Crss
Reverse transfer capacitance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
VDD = 30 V, ID = 6.5 A,
VGS = 0 to 10 V
(see Figure 13: "Test circuit
for gate charge behavior")
RG
Intrinsic gate resistance
f =1 MHz, ID=0 A
pF
nC
Table 6: Switching times
Symbol
td(on)
tr
td(off)
tf
4/15
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
DocID027038 Rev 4
ns
STL7N6LF3
Electrical characteristics
Table 7: Source-drain diode
Symbol
ISD
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Source-drain current
-
6.5
A
ISDM(1)
Source-drain current (pulsed)
-
26
A
VSD(2)
Forward on voltage
IDS = 6.5 A, VGS = 0 V
-
1.3
V
trr
Reverse recovery time
-
24
ns
Qrr
Reverse recovery charge
-
23.3
nC
IRRM
Reverse recovery current
ISD = 6.5 A, di/dt = 100 A/µs
VDD = 48 V, Tj = 150 °C
(see Figure 14: "Test circuit
for inductive load switching
and diode recovery times")
-
1.9
A
Notes:
(1)Pulse
width limited by safe operating area
(2)Pulsed:
pulse duration = 300 μs, duty cycle 1.5 %
DocID027038 Rev 4
5/15
Electrical characteristics
2.1
STL7N6LF3
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
d
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Normalized V(BR)DSS vs temperature
Figure 7: Static drain-source on-resistance
(mΩ)
6/15
DocID027038 Rev 4
STL7N6LF3
Electrical characteristics
Figure 8: Gate charge vs gate-source voltage
Figure 9: Capacitance variation
Figure 10: Normalized gate threshold voltage vs
temperature
Figure 11: Normalized on-resistance vs
temperature
DocID027038 Rev 4
7/15
Test circuits
3
8/15
STL7N6LF3
Test circuits
Figure 12: Test circuit for resistive load
switching times
Figure 13: Test circuit for gate charge
behavior
Figure 14: Test circuit for inductive load
switching and diode recovery times
Figure 15: Unclamped inductive load test
circuit
Figure 16: Unclamped inductive waveform
Figure 17: Switching time waveform
DocID027038 Rev 4
STL7N6LF3
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1
PowerFLAT 5x6 WF type R package information
Figure 18: PowerFLAT™ 5x6 WF type R package outline
A0Y5_8231817_R_WF_Rev_14
DocID027038 Rev 4
9/15
Package information
STL7N6LF3
Table 8: PowerFLAT™ 5x6 WF type R mechanical data
mm
Dim.
Min.
Max.
A
0.80
1.00
A1
0.02
0.05
A2
0.25
b
0.30
C
5.80
6.00
6.10
0.50
5.20
5.40
D
5.00
D2
4.15
D3
4.05
4.20
4.35
D4
4.80
5.00
5.10
D5
0.25
0.4
0.55
D6
0.15
0.3
0.45
e
10/15
Typ.
4.45
1.27
E
6.20
E2
3.50
3.70
E3
2.35
2.55
E4
0.40
0.60
E5
0.08
0.28
E6
0.20
0.325
0.45
E7
0.85
1.00
1.15
E9
4.00
4.20
4.40
E10
3.55
3.70
3.85
K
1.275
L
0.725
0.825
0.925
L1
0.175
0.275
0.375
ϴ
0°
DocID027038 Rev 4
6.40
6.60
1.575
12°
STL7N6LF3
Package information
Figure 19: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)
8231817_FOOTPRINT_rev14
DocID027038 Rev 4
11/15
Package information
4.2
STL7N6LF3
Packing information
Figure 20: PowerFLAT™ 5x6 WF tape (dimensions are in mm)
Figure 21: PowerFLAT™ 5x6 package orientation in carrier tape
12/15
DocID027038 Rev 4
STL7N6LF3
Package information
Figure 22: PowerFLAT™ 5x6 reel (dimensions are in mm)
DocID027038 Rev 4
13/15
Revision history
5
STL7N6LF3
Revision history
Table 9: Document revision history
14/15
Date
Revision
Changes
14-Oct-2014
1
First release.
10-Feb-2015
2
Updated Table 4: On/off states, Table 5: Dynamic, Table 6: Switching
times, Table 7: Source drain diode and Section 4: Package mechanical
data.
26-May-2015
3
Updated title and features.
Document status from preliminary to production data.
13-Feb-2017
4
Modified features on cover page.
Modified Table 2: "Absolute maximum ratings" and Table 5: "Dynamic".
Minor text changes.
DocID027038 Rev 4
STL7N6LF3
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2017 STMicroelectronics – All rights reserved
DocID027038 Rev 4
15/15
很抱歉,暂时无法提供与“STL7N6LF3”相匹配的价格&库存,您可以联系我们找货
免费人工找货- 国内价格 香港价格
- 3000+5.306633000+0.64000
- 6000+5.053946000+0.60952
- 9000+4.820689000+0.58139