STL80NF3LL

STL80NF3LL N-CHANNEL 30V - 0.0045Ω - 80A PowerFLAT™ ( 6X5 ) STripFET™ II MOSFET PRODUCT PREVIEW Table 1: General Features TYPE STL80NF3LL ■ ■ ■ ■ ■ ■ Figure 1: Package RDS(on) < 0.0055 Ω ID 20 A (2) VDSS 30 V TYPICAL RDS(on) = 0.0045 Ω @ 10V IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE (1mm MAX) VERY LOW THERMAL RESISTANCE CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED PowerFLAT™( 6x5 ) DESCRIPTION The STL80NF3LL utilizes the second generation of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. Such features make it the best choice in high efficiency DC-DC converters for Telecom and Computer industries. The Chipscaled PowerFLAT™ package allows a significant board space saving, still boosting the performance. Figure 2: Internal Schematic Diagram APPLICATIONS HIGH-EFFICIENCY DC-DC CONVERTERS ■ SYNCHRONOUS RECTIFICATION ■ TOP VIEW Table 2: Order Codes Part Number STL80NF3LL Marking L80NF3LL Package PowerFLAT™ (6x5) Packaging TAPE & REEL Rev. 3 June 2005 This is a preliminary information on a new product now in development. Details are subjet to change without notice 1/9 STL80NF3LL Table 3: Absolute Maximum ratings Symbol VDS VGS ID (1) ID (1) IDM (3) ID (2) PTOT (2) PTOT (1) Tstg Tj Parameter Drain-source Voltage (VGS= 0) Gate- source Voltage Drain Current (continuous) at TC= 25°C Drain Current (continuous) at TC= 100°C Drain Current (pulsed) Drain Current (continuous) at TC= 25°C Total Dissipation at TC= 25°C Total Dissipation at TC= 25°C Derating Factor(2) Storage Temperature Max. Operating Junction Temperature Value 30 ± 16 80 50 320 20 4 80 0.03 – 55 to 150 Unit V V A A A A W W W/°C °C Table 4: Thermal Data Rthj-C Rthj-pcb (2) Thermal Resistance Junction-Case (Drain) Thermal Operating Junction-pcb 1.56 31.3 °C/W °C/W ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) Table 5: On /Off Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125°C VGS = ± 16 V VDS= VGS, ID= 250µA VGS= 10 V, ID= 10 A VGS= 4.5 V, ID= 10 A 1 0.0045 0.0055 0.0055 0.007 Min. 30 1 10 ± 10 Typ. Max. Unit V µA µA nA V Ω Ω Table 6: Dynamic Symbol gfs (4) Ciss Coss Crss RG Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Input Resistance f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain Test Conditions VDS= 10V, ID= 10 A VDS= 25V, f= 1 MHz, VGS= 0 Min. Typ. 37 2160 614 98 4.1 Max. Unit S pF pF pF Ω 2/9 STL80NF3LL ELECTRICAL CHARACTERISTICS (CONTINUED) Table 7: Switching On Symbol td(on) tr td(off) tf Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Turn-off-Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD= 15 V, ID= 10 A RG = 4.7Ω, VGS = 4.5V (see Figure 15) Min. Typ. 23.5 39 47.5 37 26 7 12 35 Max. Unit ns ns ns ns nC nC nC VDD= 15V, ID= 10 A, VGS= 4.5 V (see Figure 17) Table 8: Source Drain Diode Symbol ISD ISDM (3) VSD (4) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse RecoveryCharge Reverse Recovery Current ISD= 20 A, VGS= 0 ISD= 20 A, di/dt= 100 A/µs, VDD= 15 V, Tj = 150°C (see Figure 16) 39 45 2.3 Test Conditions Min. Typ. Max. 20 80 1.3 Unit A A V ns nC A (1) The value is rated according Rthj-C . (2) When mounted on FR-4 board of 1in², 2oz Cu., t