STL8N6LF6AG

STL8N6LF6AG Automotive-grade N-channel 60 V, 21 mΩ typ., 32 A STripFET™ F6 Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STL8N6LF6AG 60 V 27 mΩ 32 A 55 W       Designed for automotive applications and AEC-Q101 qualified Very low on-resistance Very low gate charge High avalanche ruggedness Low gate drive power loss Wettable flank package Figure 1: Internal schematic diagram Applications  Switching applications Description This device is an N-channel Power MOSFET developed using the STripFET™ F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. Table 1: Device summary Order code Marking Package Packing STL8N6LF6AG 8N6LF6 PowerFLAT™ 5x6 Tape and reel January 2016 DocID028068 Rev 2 This is information on a product in full production. 1/14 www.st.com Contents STL8N6LF6AG Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 5 3 Test circuits ..................................................................................... 7 4 Package information ....................................................................... 8 5 2/14 4.1 PowerFLAT™ 5x6 WF type R package information .......................... 8 4.2 PowerFLAT™ 5x6 WF packing information .................................... 11 Revision history ............................................................................ 13 DocID028068 Rev 2 STL8N6LF6AG 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage ±20 V Drain current (continuous) at Tcase = 25 °C 32 Drain current (continuous) at Tcase = 100 °C 23 Drain current (continuous) at Tpcb = 25 °C 9.6 Drain current (continuous) at Tpcb = 100 °C 6.8 IDM(1)(2) Drain current (pulsed) 38 A IDM(2) Drain current (pulsed) 128 A PTOT Total dissipation at Tcase = 25 °C 55 PTOT Total dissipation at Tpcb = 25 °C 4.8 Tstg Storage temperature ID ID(1) Tj Operating junction temperature -55 to 175 A A W °C Notes: (1) When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s. (2) Pulse width is limited by safe operating area. Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 2.7 Thermal resistance junction-pcb 31.3 Rthj-pcb (1) Value Unit °C/W Notes: (1) When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s. Table 4: Avalanche characteristics Symbol IAV EAS(1) Parameter Value Unit Avalanche current, not repetitive 32 A Single pulse avalanche energy 120 mJ Notes: (1) starting Tj = 25 °C, ID = IAV, VDD = 43.5 V. DocID028068 Rev 2 3/14 Electrical characteristics 2 STL8N6LF6AG Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol Test conditions Min. Drain-source breakdown voltage VGS = 0 V, ID = 250 µA 60 IDSS Zero gate voltage drain current VGS = 0 V, VDS = 60 V 1 µA IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V ±100 nA Gate threshold voltage VDS = VGS, ID = 250 µA 2.5 V V(BR)DSS VGS(th) RDS(on) Parameter Typ. Max. Unit V 1 VGS = 10 V, ID = 9.6 A 21 27 VGS = 4.5 V, ID = 9.6 A 25 31 Min. Typ. Max. - 1340 - - 90 - - 60 - - 27 - - 4.6 - - 4.3 - Test conditions Min. Typ. Max. VDD = 30 V, ID = 12.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform") - 9.6 - - 20 - - 56 - - 7 - Min. Typ. Max. Unit Static drain-source on-resistance mΩ Table 6: Dynamic Symbol Ciss Parameter Test conditions Input capacitance VDS = 25 V, f = 1 MHz, VGS = 0 V Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDD = 30 V, ID = 9.6 A, VGS = 10 V (see Figure 14: "Test circuit for gate charge behavior") Unit pF nC Table 7: Switching times Symbol td(on) tr td(off) tf Parameter Turn-on delay time Rise time Turn-off delay time Fall time Unit ns Table 8: Source-drain diode Symbol ISD Parameter Test conditions Source-drain current - 9.6 A ISDM(1) Source-drain current (pulsed) - 38 A VSD(2) Forward on voltage VGS = 0 V, ISD = 9.6 A - 1.3 V trr Reverse recovery time - 22.5 ns Qrr Reverse recovery charge - 22.2 nC IRRM Reverse recovery current ISD = 25 A, di/dt = 100 A/µs, VDD = 48 V (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 2.0 A Notes: 4/14 (1) Pulse width is limited by safe operating area. (2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DocID028068 Rev 2 STL8N6LF6AG 2.1 Electrical characteristics Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID028068 Rev 2 5/14 Electrical characteristics STL8N6LF6AG Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics 6/14 DocID028068 Rev 2 STL8N6LF6AG 3 Test circuits Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform DocID028068 Rev 2 Figure 18: Switching time waveform 7/14 Package information 4 STL8N6LF6AG Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 PowerFLAT™ 5x6 WF type R package information Figure 19: PowerFLAT™ 5x6 WF type R package outline A0Y5_8231817_R_WF_Rev_12 8/14 DocID028068 Rev 2 STL8N6LF6AG Package information Table 9: PowerFLAT™ 5x6 WF type R mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 0.50 C 5.80 6.00 6.20 5.20 5.40 D 5.00 D2 4.15 D3 4.05 4.20 4.35 D4 4.80 5.0 5.20 D5 0.25 0.4 0.55 D6 0.15 0.3 0.45 e 4.45 1.27 E 6.20 E2 3.50 3.70 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 E6 0.175 0.325 0.450 E7 0.85 1.00 1.15 K 1.275 L 0.725 0.825 0.925 L1 0.175 0.275 0.375 ϴ 0° DocID028068 Rev 2 6.40 6.60 1.575 12° 9/14 Package information STL8N6LF6AG Figure 20: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm) 8231817_FOOTPRINT_R12 10/14 DocID028068 Rev 2 STL8N6LF6AG 4.2 Package information PowerFLAT™ 5x6 WF packing information Figure 21: PowerFLAT™ 5x6 WF tape Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape DocID028068 Rev 2 11/14 Package information STL8N6LF6AG Figure 23: PowerFLAT™ 5x6 reel 12/14 DocID028068 Rev 2 STL8N6LF6AG 5 Revision history Revision history Table 10: Document revision history Date Revision 06-Jul-2015 1 First release. 2 Updated title and features in cover page. Updated Section 1: "Electrical ratings", Section 2: "Electrical characteristics" and Section 4.1: "PowerFLAT™ 5x6 WF type R package information". 07-Jan-2016 Changes DocID028068 Rev 2 13/14 STL8N6LF6AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 14/14 DocID028068 Rev 2