STL8P2UH7

STL8P2UH7 P-channel 20 V, 0.0195 Ω typ., 8 A STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 2x2 package Datasheet - production data Features 1 2 3 6 1 Order code VDS RDS(on)max ID STL8P2UH7 20 V 0.0225 Ω @ 4.5 V 8A 5 2 3 4 PowerFLAT™ 2x2   Extremely low on-resistance R DS(on) Ultra logic level Figure 1: Internal schematic diagram Applications  Switching applications Description This device exhibits low on-state resistance and capacitance for improved conduction and switching performance. Table 1: Device summary Order code Marking Package Packaging STL8P2UH7 8L2U PowerFLAT™ 2x2 Tape and reel For the P-channel Power MOSFET the actual polarity of the voltages and the current must be reversed. June 2014 DocID025128 Rev 2 This is information on a product in full production. 1/14 www.st.com Contents STL8P2UH7 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package mechanical data ............................................................... 9 4.1 5 2/14 PowerFLAT™ 2x2 package mechanical data ................................. 10 Revision history ............................................................................ 13 DocID025128 Rev 2 STL8P2UH7 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 20 V VGS Gate-source voltage ±8 V ID Drain current (continuous) at Tpcb= 25 °C 8 A ID Drain current (continuous) at Tpcb= 100 °C 5.3 A Drain current (pulsed) 32 A Total dissipation at Tpcb= 25 °C 2.4 W - 55 to 150 °C 150 °C Value Unit 52 °C/W IDM (1) PTOT Tstg Storage temperature Tj Max. operating junction temperature Notes: (1) Pulse width limited by safe operating area Table 3: Thermal data Symbol Parameter (1) Rthj-pcb Thermal resistance junction-pcb max Notes: (1) When mounted on 1inch² FR-4 board, 2 oz Cu For the P-channel Power MOSFET the actual polarity of the voltages and the current must be reversed. DocID025128 Rev 2 3/14 Electrical characteristics 2 STL8P2UH7 Electrical characteristics (T C= 25 °C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage VGS= 0, ID= 250 μA IDSS Zero gate voltage drain current VGS= 0, VDS= 20 V 1 μA IGSS Gate-body leakage current VDS= 0, VGS= ± 5 V ±5 μA Gate threshold voltage VDS= VGS, ID= 250 μA 1 V Static drain-source on- resistance VGS= 4.5 V, ID= 4 A 0.0195 0.0225 Ω VGS= 2.5 V, ID= 4 A 0.02 0.025 Ω VGS= 1.8 V, ID= 4 A 0.036 0.043 Ω VGS= 1.5 V, ID= 4 A 0.05 0.085 Ω Min. Typ. Max. Unit - 2390 - pF - 220 - pF - 188 - pF - 22 - nC - 4.2 - nC - 3.6 - nC V(BR)DSS VGS(th) RDS(on) 20 V 0.4 Table 5: Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VGS= 0, VDS= 16 V, f = 1 MHz VDD= 16 V, ID= 8 A, VGS= 4.5 V For the P-channel Power MOSFET the actual polarity of the voltages and the current must be reversed. Table 6: Switching times Symbol td(on) tr td(off) tf 4/14 Parameter Test conditions Min. Typ. Max Uni t - 12.5 - ns - 30.5 - ns Turn-off delay time - 128 - ns Fall time - 84.5 - ns Turn-on delay time Rise time VDD= 16 V, ID= 8 A, RG= 1 Ω, VGS= 4.5 V DocID025128 Rev 2 STL8P2UH7 Electrical characteristics Table 7: Source drain diode Symbol ISD (1) ISDM VSD (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 8 A Source-drain current (pulsed) - 32 A 1 V Forward on voltage VGS= 0, ISD= 1 A - trr Reverse recovery time - 15.8 ns Qrr Reverse recovery charge - 5.9 nC IRRM VDD= 16 V di/dt = 100 A/μs, ISD= 1 A Reverse recovery current - 0.7 A Notes: (1) (2) Pulse width limited by safe operating area. Pulsed: pulse duration = 300 μs, duty cycle 1.5% For the P-channel Power MOSFET the actual polarity of the voltages and the current must be reversed. DocID025128 Rev 2 5/14 Electrical characteristics 2.1 STL8P2UH7 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance GIPG210520141011SA ID (A) GIPG210520141036SA K δ=0.5 100µs is ) ea ar S(on D his nt xR i n ma o i y at er d b Op ite m Li 10 0.2 1ms 10 0.1 -1 0.05 10ms 1 0.02 0.01 10 -2 0.1 Single pulse Tj=150°C Tpcb=25°C Single pulse 0.01 0.1 1 10 V DS(V) 10 -3 10 Figure 4: Output characteristics 10 -4 10 -3 10 -2 10 -1 10 0 tp(s) Figure 5: Transfer characteristics GIPG210520141044SA ID(A) -5 GIPG210520141055SA ID (A) V GS=2.5, 3, 3.5, 4, 4.5, 5V V DS=2V 20 12.00 2V 15 8.00 10 1.5V 5 4.00 0 0 2 6 4 8 V DS(V) 0.00 0.5 0 Figure 6: Gate charge vs gate-source voltage V DD=16V ID=8A 4 2 1.5 V GS(V) Figure 7: Static drain-source on-resistance GIPG210520141101SA V GS (V) 1 GIPG210520141102SA R DS(on) (mΩ) V GS=4.5V 20.5 20.0 3 19.5 2 19.0 1 18.5 0 0 5 10 15 20 Q g(nC) 18.0 0 6/14 DocID025128 Rev 2 1 2 3 4 5 6 ID(A) STL8P2UH7 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature GIPG210520141108SA C (pF) GIPG210520141114SA V GS(th) (norm) ID=250µ A 1.4 1.2 Ciss 1 1000 0.8 0.6 Coss Crss 0.4 100 0 4 8 12 16 0.2 -75 V DS(V) Figure 10: Normalized on-resistance vs temperature 125 T J(°C) GIPG210520141132SA V (BR)DSS (norm) ID=4A V GS=4.5V 1.4 75 25 Figure 11: Normalized V(BR)DSS vs temperature GIPG290520141440SA R DS(on) (norm) 1.6 -25 ID=1m A 1.04 1.2 1.0 1 0.8 0.6 0.4 0.96 0.2 0.0 -75 -25 25 0.92 -75 125 T J(°C) 75 -25 25 75 125 T J(°C) Figure 12: Source-drain diode forward characteristics GIPG210520141134SA V SD(V) T J=-55°C 0.9 TJ=25°C 0.8 T J=75°C 0.7 0.6 0.5 1 2 3 4 5 DocID025128 Rev 2 6 7 8 ISD(A) 7/14 Test circuits 3 STL8P2UH7 Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit Figure 15: Test circuit for inductive load switching and diode recovery times 8/14 DocID025128 Rev 2 STL8P2UH7 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. DocID025128 Rev 2 9/14 Package mechanical data 4.1 STL8P2UH7 PowerFLAT™ 2x2 package mechanical data Figure 16: Drawing dimension PowerFLAT™ 2 x 2 10/14 DocID025128 Rev 2 STL8P2UH7 Package mechanical data Table 8: PowerFLAT™ 2 x 2 mechanical data Dim. mm. Min. Typ. Max. A 0.70 0.75 0.80 A1 0.00 0.02 0.05 A3 0.20 b 0.25 0.30 0.35 D 1.90 2.00 2.10 E 1.90 2.00 2.10 D2 0.90 1.00 1.10 E2 0.80 0.90 1.00 e 0.55 0.65 0.75 K 0.15 0.25 0.35 K1 0.20 0.30 0.40 K2 0.25 0.35 0.45 L 0.20 0.25 0.30 L1 0.65 0.75 0.85 DocID025128 Rev 2 11/14 Package mechanical data STL8P2UH7 Figure 17: PowerFLAT™ 2 x 2 footprint 12/14 DocID025128 Rev 2 STL8P2UH7 5 Revision history Revision history Table 9: Document revision history Date Revision 20-Aug-2013 1 First release. 2 Document status promoted from preliminary data to production data Modified: title Modified: RDS(on) max value in cover page Modified: RDS(on) (typical and maximum) values in Table 4: "On /off states" Modified: the entire typical values in Table 5: "Dynamic", Table 6: "Switching times" and Table 7: "Source drain diode" Added Section 8.1: "Electrical characteristics (curves)" Minor text changes 04-Jun-2014 Changes DocID025128 Rev 2 13/14 STL8P2UH7 Please Read Carefully Information in this document is provided solely in connection with ST products. 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