STL9P3LLH6
Datasheet
P-channel -30 V, 12 mΩ typ., -9 A STripFET™ H6 Power MOSFET in a
PowerFLAT™ 3.3x3.3 package
Features
•
•
•
•
Order code
VDS
RDS(on) max
ID
STL9P3LLH6
-30 V
15 mΩ
-9 A
Very low on-resistance
Very low gate charge
High avalanche ruggedness
Low gate drive power loss
Applications
D(5, 6, 7, 8)
•
Switching applications
Description
G(4)
This device is a P-channel Power MOSFET developed using the STripFET™ H6
technology with a new trench gate structure. The resulting Power MOSFET exhibits
very low RDS(on) in all packages.
S(1, 2, 3)
AM01475v4
Product status
STL9P3LLH6
Product summary
Order code
STL9P3LLH6
Marking
9P3L
Package
PowerFLAT™ 3.3x3.3
Packing
Tape and reel
DS10145 - Rev 3 - February 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STL9P3LLH6
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
-30
V
VGS
Gate-source voltage
± 20
V
Drain current (continuous) at Tpcb = 25 °C
-9
A
Drain current (continuous) at Tpcb = 100 °C
-5.9
A
Drain current (pulsed)
-36
A
3
W
- 55 to 150
°C
ID
ID
IDM
(1)
PTOT
Total dissipation at Tpcb=25 °C
Tstg
Storage temperature range
Tj
Operating junction temperature range
1. Pulse width limited by safe operating area.
Table 2. Thermal data
Symbol
Parameter
Value
Unit
Rthj-case
Thermal resistance junction-case
2.5
°C/W
Rthj-pcb (1)
Thermal resistance junction-pcb
42
°C/W
1. When mounted on FR-4 board of 1inch², 2oz Cu t < 10 s
DS10145 - Rev 3
page 2/15
STL9P3LLH6
Electrical characteristics
2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 3. On /off states
Symbol
V(BR)DSS
IDSS
IGSS
Parameter
Drain-source breakdown
voltage
Zero gate voltage
drain current
Gate-body leakage
current
VGS(th)
Gate threshold voltage
RDS(on)
Static drain-source onresistance
Test conditions
VGS = 0 V, ID = -1 mA
Min.
Typ.
-30
Unit
V
VGS = 0 V, VDS = -30 V
VGS = 0 V, VDS = -30 V, TC = 125 °C
(1)
VDS = 0 V, VGS = ± 20 V
VDS = VGS, ID = -250 µA
Max.
-1
µA
-10
µA
±100
nA
-1
V
VGS = -10 V, ID =-4.5 A
12
15
mΩ
VGS = -4.5 V, ID = -4.5 A
18
22.5
mΩ
Min.
Typ.
Max.
Unit
-
2615
-
pF
-
340
-
pF
-
235
-
pF
1. Defined by design, not subject to production test.
Table 4. Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer capacitance
Qg
Total gate charge
VDD = -15 V, ID = -9 A,
-
24
-
nC
Qgs
Gate-source charge
-
9
-
nC
Qgd
Gate-drain charge
VGS = -4.5 to 0 V
(see Figure 13. Gate charge test
circuit)
-
8
-
nC
Min.
Typ.
Max.
Unit
-
13.2
-
ns
VDS = -25 V, f = 1 MHz,
VGS = 0 V
Table 5. Switching times
Symbol
td(on)
tr
td(off)
tf
Parameter
Turn-on delay time
Test conditions
VDD = -15 V, ID = -4.5 A,
Rise time
RG = 4.7 Ω, VGS = -10 V
-
93
-
ns
Turn-off delay time
(see Figure 12. Switching times test
circuit for resistive load)
-
50
-
ns
-
18
-
ns
Min.
Typ.
Max.
Unit
-1.1
V
Fall time
Table 6. Source drain diode
Symbol
VSD (1)
DS10145 - Rev 3
Parameter
Forward on voltage
Test conditions
ISD = -9 A, VGS = 0 V
-
page 3/15
STL9P3LLH6
Electrical characteristics
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
trr
Reverse recovery time
ISD = -9 A, di/dt = 100 A/µs
-
20
ns
Qrr
Reverse recovery charge
VDD = -24 V, Tj=150 °C
-
16
nC
Reverse recovery current
(see Figure 14. Test circuit for
inductive load switching and diode
recovery times)
-
-1.6
A
IRRM
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DS10145 - Rev 3
page 4/15
STL9P3LLH6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Note:
Note: For the P-channel Power MOSFET, current and voltage polarities are reversed.
Figure 1. Safe operating area
Figure 2. Thermal impedance
GIPG0903166B3P9SOA
ID
(A) Operation in this area is
limited by R DS(on)
K
10 1
GIPG0903166B3P9ZTH
0.05
10 -1
tp =10 ms
tp =10 ms
10 0
10 0
Rth-pcb
tp =1 s
T j ≤150 °C
Tpcb = 25°C
single pulse
10 -1
10 -1
10 -2
V DS (V)
10 1
10 -3
10 -4
Figure 3. Output characteristics
ID
(A) V GS = 7,8,9,10 V
V GS = 6 V
GIPG180320161101TCH
V DS =5 V
100
V GS = 4 V
80
80
60
60
40
40
V GS = 3 V
20
DS10145 - Rev 3
t p (s)
10 0
120
100
0
0
10 -1
ID
(A)
140
V GS = 5 V
120
10 -2
Figure 4. Transfer characteristics
GIPG180320161003OCH
140
10 -3
20
1
2
3
4
V DS (V)
0
0
1
2
3
4
5
6
7
V GS (V)
page 5/15
STL9P3LLH6
Electrical characteristics (curves)
Figure 5. Gate charge vs gate-source voltage
V GS
(V)
R DS(on)
(mΩ)
GIPG1803166B3PDQVG
10
12
4
11
2
10
10
20
30
40
50
Q g (nC)
Figure 7. Capacitance variations
C
(pF)
V GS =10 V
13
6
0
0
GIPG0903166B3P9RID
14
V DD = 15 V
ID=9A
8
Figure 6. Static drain-source on-resistance
9
10
15
20
25
30
35
40
I D (A)
Figure 8. Normalized gate threshold voltage vs
temperature
GIPG0903166B3PDCVR
V GS(th)
(norm.)
GIPG0903166B3PDVTH
1.1
I D = 250 µA
C ISS
1.0
10 3
f = 1 MHz
0.9
C OSS
C RSS
0.8
0.7
10 2
0
5
10
15
20
25
30
V DS (V)
Figure 9. Normalized on-resistance vs temperature
R DS(on)
(norm.)
1.5
GIPG1003166B3PDRON
V GS = 10 V
0.6
-75
V (BR)DSS
(norm.)
1.08
1.04
1.00
1.00
0.75
0.96
DS10145 - Rev 3
0
25 50 75 100 125 150 I D (A)
25
75
125
T j (°C)
Figure 10. Normalized V(BR)DSS vs temperature
1.25
0.5
-50 -25
-25
0.92
-75
GIPG0903166B3PDBDV
I D = 1 mA
-25
25
75
125
T j (°C)
page 6/15
STL9P3LLH6
Electrical characteristics (curves)
Figure 11. Source-drain diode forward characteristics
V SD
(V)
GIPG0903166B3PDSDF
1.0
T j = -55 °C
0.9
T j = 25 °C
0.8
0.7
T j = 175 °C
0.6
0.5
0.4
2
DS10145 - Rev 3
4
6
8
10
12
I SD (A)
page 7/15
STL9P3LLH6
Test circuits
3
Test circuits
Figure 12. Switching times test circuit for resistive load
Figure 13. Gate charge test circuit
Figure 14. Test circuit for inductive load switching and diode recovery times
DS10145 - Rev 3
page 8/15
STL9P3LLH6
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS10145 - Rev 3
page 9/15
STL9P3LLH6
PowerFLAT™ 3.3x3.3 package information
4.1
PowerFLAT™ 3.3x3.3 package information
Figure 15. PowerFLAT™ 3.3x3.3 package outline
BOTTOM VIEW
SIDE VIEW
TOP VIEW
8465286_2
DS10145 - Rev 3
page 10/15
STL9P3LLH6
PowerFLAT™ 3.3x3.3 package information
Table 7. PowerFLAT™ 3.3x3.3 package mechanical data
Dim.
mm
Min.
Typ.
Max.
A
0.70
0.80
0.90
b
0.25
0.30
0.39
c
0.14
0.15
0.20
D
3.10
3.30
3.50
D1
3.05
3.15
3.25
D2
2.15
2.25
2.35
e
0.55
0.65
0.75
E
3.10
3.30
3.50
E1
2.90
3.00
3.10
E2
1.60
1.70
1.80
H
0.25
0.40
0.55
K
0.65
0.75
0.85
L
0.30
0.45
0.60
L1
0.05
0.15
0.25
L2
θ
DS10145 - Rev 3
0.15
8°
10°
12°
page 11/15
STL9P3LLH6
PowerFLAT™ 3.3x3.3 package information
Figure 16. PowerFLAT™ 3.3x3.3 recommended footprint (dimensions are in mm)
8465286_footprint
DS10145 - Rev 3
page 12/15
STL9P3LLH6
Revision history
Table 8. Document revision history
Date
23-Jan-2014
Revision Changes
1
First release.
Modified: title and RDS(on) max value
DS10145 - Rev 3
07-Mar-2016
2
20-Feb-2018
3
Modified: Table 2: "Absolute maximum ratings", Table 4: "On /off states", Table 5: "Dynamic", Table
6: "Switching times" and Table 7: "Source drain diode"
Minor text changes.
Updated Figure 1. Safe operating area and Figure 2. Thermal impedance.
Removed maturity status indication from cover page. The document status is production data.
page 13/15
STL9P3LLH6
Contents
Contents
1
Electrical ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics (curves). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1
PowerFLAT™ 3.3x3.3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
DS10145 - Rev 3
page 14/15
STL9P3LLH6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS10145 - Rev 3
page 15/15