STLBC01
Bluetooth® low energy controller
Datasheet - production data
Applications
• Watches
VFQFPN 24L
• Fitness, wellness and sports
• Consumer medical
• Security/proximity
Features
• Remote control
• Bluetooth specification v4.0 compliant master
and slave BLE controller
• Remote sensing
• Bluetooth protocol stack for STM32L and
profiles provided separately
• Assisted living
• Operating supply voltage from 1.9 to 3.6 V
• 13 mA maximum peak current allows standard
coin cell battery usage
• Low power physical layer
• Link layer with embedded security engine
• UART and SPI available as HCI transport
layers
• SPI interface allows proprietary low power
mode to further reduce the power consumption
• ISM 2.4 GHz frequency band
• 1 Mbps on-air data rate
• Wide spread and low cost 26 MHz Xtal
• 200 Ω differential impedance of antenna port
• Very small number of external discrete
components
• Programmable output power from -18 dBm to
+3 dBm
• Digital RSSI
• Power management with integrated linear
regulator
• Home and industrial automation
• Mobile phone peripherals
• PC peripherals
Description
The STBLC01 is a very low power Bluetooth low
energy (BLE) controller compliant with Bluetooth
specification 4.0. The STBLC01 integrates a low
power physical layer, a link layer with an
embedded security engine, a host controller
interface (HCI), and a power management. The
STBLC01 allows the meeting of the tight
advisable peak current requirements imposed by
the use of standard coin cell batteries, and even
in worst-case operating conditions 13 mA is the
maximum current that is drawn from the input
voltage source. Yet ultra low power sleep modes
and very short transition time between operating
modes allow a very low average current
consumption to be achieved, which results in
longer battery life. The STBLC01 offers the
possibility of interfacing with several external
microcontrollers using either UART or SPI as the
transport layer for HCI communications.
• Battery level detector function to keep control
of the battery level detection
• Compliant with the following radio frequency
regulations: ETSI EN 300 328, EN 300 440,
FCC CFR47 Part 15, ARIB STD-T66
Table 1. Device summary
Order code
Package
Packing
STBLC01QTR
VFQFPN 24L
Tape and reel
• QFN 24 5x5 mm RoHS package
• Operating temp. range from -40 °C to 85 °C
April 2013
This is information on a product in full production.
DocID022984 Rev 2
1/40
www.st.com
40
Contents
STLBC01
Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Typical application diagram and pin description . . . . . . . . . . . . . . . . . . 7
4
Electrical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2
Handling procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.4.1
5
4.5
I/O characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.6
RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.7
Timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1
5.2
5.3
5.4
6
2/40
Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STBLC01 startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.1
Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.2
End of the boot-up procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
STBLC01 power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2.1
Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2.2
Xtreme mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2.3
OFF mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
STBLC01 functional modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.1
State diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.2
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3.3
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3.4
Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.3.5
BLE active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.3.6
BLE sleep (only for SPI transport layer) . . . . . . . . . . . . . . . . . . . . . . . . 18
STBLC01 reset structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Host controller interface (HCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DocID022984 Rev 2
STLBC01
Contents
6.1
6.2
HCI UART transport layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.1.1
UART interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.1.2
UART settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
HCI SPI transport layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.2.1
SPI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.2.2
SPI flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Host to controller flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Controller to host flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7
8
Peripherals information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1
AES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.3
Battery level detector (SVLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application design guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.1
Antenna port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.1.1
9
50 Ohm matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.2
Xtal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.3
Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Vendor HCI commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.1
9.2
9.3
9.4
STBLC_SET_PUBLIC_ADDRESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.1.1
Command parameters for STBLC_SET_PUBLIC_ADDRESS . . . . . . . 28
9.1.2
Return parameters for STBLC_SET_PUBLIC_ADDRESS . . . . . . . . . . 28
STLBC_SET_POWER_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
9.2.1
Command parameters for STLBC_SET_POWER_MODE . . . . . . . . . . 29
9.2.2
Return parameters for STLBC_SET_POWER_MODE . . . . . . . . . . . . . 29
9.2.3
Returned events for STLBC_SET_POWER_MODE . . . . . . . . . . . . . . . 29
STBLC_SVLD_MEASUREMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
9.3.1
Command parameters for STBLC_SVLD_MEASUREMENT . . . . . . . . 29
9.3.2
Return parameters for STBLC_SVLD_MEASUREMENT . . . . . . . . . . . 30
9.3.3
Returned events for STBLC_SVLD_MEASUREMENT . . . . . . . . . . . . . 30
STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9.4.1
Command parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . 30
9.4.2
Return parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . 30
9.4.3
Returned events for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . 30
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Contents
STLBC01
9.5
9.6
10
STBLC_POWER_MODE-CONFIGURATION . . . . . . . . . . . . . . . . . . . . . 31
9.5.1
Command parameters for STBLC_POWER_MODE-CONFIGURATION .
31
9.5.2
Return parameters for STBLC_POWER_MODE-CONFIGURATION . . 31
9.5.3
Returned events for STBLC_POWER_MODE-CONFIGURATION . . . . 31
STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
9.6.1
Command parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . 31
9.6.2
Return parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . 32
9.6.3
Returned events for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . 32
Vendor HCI events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.1
STBLC_POWER_MODE_IDLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.1.1
10.2
Event parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Hardware error event codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
11
Related documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
12
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
4/40
DocID022984 Rev 2
STLBC01
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
External components of the typical application diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
STBLC01 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STBLC01 general operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Typical current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
I/O characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
General RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Transmitter characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Receiver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
HCI command format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
HCI ACL data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
HCI event format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SVLD reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
HCI commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Command parameters for STBLC_SET_PUBLIC_ADDRESS . . . . . . . . . . . . . . . . . . . . . . 30
Return parameters for STBLC_SET_PUBLIC_ADDRESS. . . . . . . . . . . . . . . . . . . . . . . . . 30
Command parameters for STLBC_SET_POWER_MODE . . . . . . . . . . . . . . . . . . . . . . . . . 31
Return parameters for STLBC_SET_POWER_MODE. . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Command parameters for STBLC_SVLD_MEASUREMENT . . . . . . . . . . . . . . . . . . . . . . . 31
Return parameters for STBLC_SVLD_MEASUREMENT. . . . . . . . . . . . . . . . . . . . . . . . . . 32
Command parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . . . . . . . . . . . 32
Return parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . . . . . . . . . . . . . . 32
Command parameters for STBLC_POWER_MODE-CONFIGURATION. . . . . . . . . . . . . . 33
Return parameters for STBLC_POWER_MODE-CONFIGURATION . . . . . . . . . . . . . . . . 33
Command parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . . . . . . . . . . 33
Return parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . . . . . . . . . . . . . 34
Event parameters for STBLC_POWER_MODE_IDLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Hardware error event codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
VFQFPN 5X5X0.9 24 leads mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
DocID022984 Rev 2
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List of figures
STLBC01
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
6/40
BLE stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Simplified application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Simplified block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Suggested application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
STBLC01 pinout top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
STBLC01 state diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Matching circuit for 50 Ohm antenna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Xtal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VFQFPN 5X5X0.9 24 leads mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
DocID022984 Rev 2
STLBC01
1
General description
General description
The conceptual drawing in Figure 1 shows the BLE stack partitioning; meanwhile a
simplified application schematic is shown in Figure 2.
Figure 1. BLE stack
BLE APPLICATION STACK
BLE APPLICATION
BLE PROFILES
External MCU
HOST
HOST CONTROLLER
INTERFACE
LINK LAYER
STBLC01
PHYSICAL LAYER
AM10253V1
Figure 2. Simplified application diagram
XTAL
OSC
26MHz
HOST
Controller
Interface
UART SPI
MCU
memory
Power
Management
HCI
Host
Controller
Interface
Application
BLE Protocol stack
BLE Controller
Sensor Interface
BLE Radio
Battery
Sensors
AM10254V1
The protocol stack running in the host is released separately in the form of static library for
the STM32L. BLE qualified profiles are available separately.
The STBLC01 radio has been designed specifically for low power applications. The TX
output power can be controlled by the BLE host from -18 dBm to +3 dBm in order to
optimize the current consumption for a wide set of applications.
DocID022984 Rev 2
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Block diagram
STLBC01
The STBLC01 uses a very small number of external discrete components. The robust
internal RX architecture allows the STBLC01 to operate without the need for expensive
external filters to block undesired frequency bands. A simple matching network allows the
adaptation of antenna impedance to the STBLC01 differential 200 Ω real impedance.
2
Block diagram
A simplified block diagram of the STBLC01 is shown in Figure 3.
Figure 3. Simplified block diagram
AM10255V1
8/40
DocID022984 Rev 2
HOST
MCU
DocID022984 Rev 2
1uF 16V
100pF
SEL
STBLC01
avss_pll2
sel
csn_WU
VBAT
VCC1
SW_DCDC
WU/SPI CSN
C8
MISO
MOSI
SCK
VDD
VSS
VSS_DCDC
bias_r
AVSS_PLL1
XTAL1
XTAL2
RST
IRQ
C7
VDD
1
2
3
4
5
6
U1
NX3225SA
Q1
19
20
21
22
23
24
UART TX/SPI MISO
UART RX/SPI MOSI
SPI SCK
RST
SPI IRQ
12pF
C1
25
27k
VCC2
AVSS_RF
ANTP
ANTN
AVSS_PA
AVDD_PA
R1
12pF
C2
18
17
16
15
14
13
VCC
C9
100pF
ANTP
ANTN
C3
47uF 6.3V
C4
10nF
C10
4.7nF
C11
1.2pF
L2
3.3nH
L1
3.3nH
C6
1.2pF
1.0pF
C13
L4
1.1nH
L3
2.0nH
0
C12
1.0pF
R3
J2
SMA connector
RF_OUT
3
GND
STLBC01
Typical application diagram and pin description
Typical application diagram and pin description
Figure 4. Suggested application schematic
12
11
10
9
8
7
AM12611v2
9/40
Typical application diagram and pin description
STLBC01
Table 2. External components of the typical application diagram
Components
Value
Descriptions
C1, C2
12 pF
Crystal loading capacitor
C3
47 μF
VCC decoupling capacitor
C4
10 nF
VCC decoupling capacitor
C6
1.2 pF
RF balun/matching capacitor
C7
100 pF
LDO-digital decoupling capacitor
C8
1 μF
LDO-digital decoupling capacitor
C9
100 pF
LDO-PA decoupling capacitor
C10
4.7 nF
LDO-PA decoupling capacitor
C11
1.2 pF
RF balun/matching capacitor
C12
1 pF
RF balun/matching capacitor
C13
1 pF
RF balun/matching capacitor
L1
3.3 nH
RF balun/matching inductor
L2
3.3 nH
RF balun/matching inductor
L3
2.0 nH
RF balun/matching inductor
L4
1.1 nH
RF balun/matching inductor
R1
27 kΩ
Bias resistor
Q1
26 MHz
NX3225SA crystal
UART_TX/MISO
UART_RX/MOSI
SCK
VDD
BIAS_R
IRQ
RST
XTAL2
XTAL1
AVSS_PLL1
Figure 5. STBLC01 pinout top view
STBLC01
VCC
AVSS_RF
ANTP
QFN24 5x5
ANTN
AVSS_PA
AVSS
AVSS1
AVSS_PLL2
SEL
WU/CSN
AVSS3
VBAT
AVSS2
AVDD_PA
AM10256V1
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DocID022984 Rev 2
STLBC01
Typical application diagram and pin description
Table 3. STBLC01 pinout description
Pin
Name
Type
Description
1
UART_TX / SPI_MISO
Digital output
2
UART_RX / SPI_MOSI
Digital input
UART RX / SPI data input (SDI)
3
SPI_CLK
Digital input
SPI clock input (SCK)
4
VDD
Power
Positive supply for the digital part (1)
5
AVSS
Ground
Negative supply for the digital part(2)
6
AVSS1
Ground
Ground(2)
7
AVSS2
Ground
Ground(2)
8
AVSS3
Ground
Ground(2)
9
VBAT
Analog
Ground(2)
10
WU/CSN
Digital input
UART wake up from sleep/off mode / SPI chip
select.
11
SEL
Digital input
Interface selection (0 = UART, 1 = SPI).
12
AVSS_PLL2
Ground
Negative supply of PLL(2)
13
AVDD_PA
Power
Regulated output voltage for the power amplifier(1)
14
AVSS_PA
Ground
Negative supply for the power amplifier(2)
15
ANTN
RF
16
ANTP
RF
17
AVSS_RF
Ground
Negative supply of RF part(2)
18
VCC
Power
Main supply for the chip
19
BIAS_R
Analog
Pin for bias setting resistor
20
AVSS_PLL1
Ground
Negative supply of PLL(2)
21
XTAL1
Analog
22
XTAL2
Analog
23
RST
Digital input
Reset
24
IRQ
Digital input
SPI interrupt request
UART TX / SPI data output (SDO)
Differential RF ports
Xtal oscillator ports
1. For proper operation of the chip, this terminal must not be loaded by any external circuitry.
2. For proper operation of the chip, this terminal must be connected to a common ground plane.
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Electrical
STLBC01
4
Electrical
4.1
Absolute maximum ratings
Table 4 summarizes the absolute maximum rating for the STBLC01. Stresses above these
listed maximum ratings may cause permanent damage to the device. Exposure beyond the
specified electrical characteristics may affect device reliability or cause malfunction. The
STBLC01 is available in a green-mold and lead free QFN 5x5 package. The maximum
soldering conditions are specified as in the JEDEC J-STD-020C standard.
Table 4. Absolute maximum ratings
Parameter
Symbol
Min.
Max.
Unit
System ground
GND
-0.2
0.2
V
Supply voltage
VSUP
GND-0.2
3.6
V
Voltage at remaining pin
VPIN
GND-0.2 VSUP+0.2
Storage temperature
Electrostatic discharge referred to GND according to MilStd-883C, method 3015.7
4.2
V
Tst
-50
150
°C
VESD
-2000
+2000
V
Handling procedures
This device has built-in protection against high static voltages or electric fields; however,
anti-static precautions must be taken as for any other CMOS component. Unless otherwise
specified, proper operation can only occur when all terminal voltages are kept within the
voltage range. Unused inputs must always be tied to a defined logic voltage level unless
otherwise specified.
4.3
General operating conditions
The general operating conditions for both STBLC01 versions are summarized in Table 5.
These parameters are specified based on the component list and on the application
schematic of Figure 4.
Table 5. STBLC01 general operating conditions
Parameter
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Min.
Typ.
Max.
Unit
Supply voltage
1.9
3
3.6
V
Temperature range
-40
+85
°C
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STLBC01
Electrical
4.4
Electrical characteristics
4.4.1
Current consumption
This section summarizes the estimated current consumption of the STBLC01 at pin VCC.
The parameters defined in Table 6 are specified based on the component list defined in
Table 2 and on the application schematic of Figure 4. Functional modes used in the table
are defined in Section 5.3. Unless otherwise specified, the voltage VCC is set to 2.5 V.
Table 6. Typical current consumption
Parameter
Symbol
Off mode
Sleep mode
Idle mode
Typ.
Max.
Unit
Ioff
9
μA
Isleep
19
μA
Iidle
200
-
μA
-
BLE transmit mode for 0 dBm output
power
Itx
12.1
mA
BLE receive mode
Irx
12.9
mA
IBLEsleep_crystal
450
μA
IBLEsleep_RC
60
μA
BLE sleep mode (crystal)
BLE sleep mode (RC)
4.5
Min.
I/O characteristics
This section summarizes the I/O characteristics.
Table 7. I/O characteristics
Parameter
Symbol
Min.
HIGH level input voltage
VIH
0.75*Vcc
LOW level input voltage
VIL
0
Typ.
Max.
Unit
Vcc
V
0.25*Vcc
V
-
4.6
Output HIGH current
IOH
1
mA
Output LOW current
IOL
1
mA
RF characteristics
This section summarizes the RF characteristics of the STBLC01. All parameters are based
on the components in Table 2 and on the application schematic of Figure 4. Unless
otherwise specified, VCC = 2.5 V. Measurement conditions and device configuration are
specified in [3] for PHY parameters and in [4] for LL parameters. When applicable,
exceptions for some parameters are compliant to that described in [2], volume 6, part A.
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Electrical
STLBC01
Table 8. General RF characteristics
Parameter
Note
Operating frequency
Min.
Typ.
2400
Differential antenna impedance
On-air data rate
Max.
Unit
2484
MHz
200
W
1000
Kbps
2
MHz
26
MHz
Channel spacing
Crystal frequency
Crystal frequency
accuracy(1)
±50
ppm
1. Frequency accuracy includes initial tolerance, stability over temperature range and aging of the quartz.
Table 9. Transmitter characteristics
Parameter
Note
Min.
Typ.
Max.
Unit
Output power for the lowest power setting
-18
dBm
Output power for the highest power setting
+3
dBm
RF power accuracy
±3
dB
Power transmitted at frequency offset |foffs| = ±2 MHz
Power transmitted at frequency offset |foffs| = ±3 MHz
(1)
Frequency deviation
-
Drift rate
Spurious emission f in the ranges
– 30 MHz – 88 MHz
– 88 MHz – 230 MHz
– 230 MHz – 470 MHz
– 470 MHz – 862 MHz
– 862 MHz – 960 MHz
– 960 MHz – 2396 MHz
– 2487.5 MHz – 12750 MHz
(2)
dBm
-30
dBm
±250
Deviation from the channel center frequency
Frequency drift for any packet length
-20
kHz
±150
kHz
50
kHz
400
Hz/μs
-57.3
-54.0
-51.3
-54.0
-51.3
-43.4
-43.4
dBm
1. Frequency deviation corresponding to a 10101010 sequence is at least 80% of the frequency deviation
corresponding to a 00001111 sequence. Positive frequency deviations represent a logic level ‘1’ and
negative frequency deviations represent a logic level ‘0’ as defined in [2], volume 6, part A, section 3.1
2. Measuring conditions and signal specifications are described in [3], [4] and [5]. These parameters are
highly related to a correct matching network and PCB design. Refer to Section 8 for design guidelines.
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STLBC01
Electrical
Table 10. Receiver characteristics
Parameter
Note
Min.
Sensitivity level for 0.1% BER
Maximum input power for 0.1% BER
Typ.
Max.
Unit
-80
dBm
-5
dBm
Spurious emission for 30 MHz < f < 1 GHz
(1)
-57
dBm
Spurious emission f > 1 GHz
(1)
-47
dBm
In band blocking C/I for a wanted signal level of -67 dBm:
– Co-channel interference
– Interference at frequency offset foffs = 1 MHz
– Interference at frequency offset foffs = 2 MHz
– Interference at frequency offset foffs = 3 MHz
– Interference at image frequency foffs = -4 MHz
– Interference at adjacent frequencies to image
Out of band blocking for a required signal level of -67 dBm:
– Frequency range 30-1999 MHz
– Frequency range 2000-2399 MHz
– Frequency range 2484-2999 MHz
– Frequency range 3000-12750 MHz
21
15
-17
-27
-9
-15
-30
-35
-35
-30
dBm
dBm
1. Measuring conditions and signal specifications are described in [3], [4] and [5]. These parameters are
highly related to a correct matching network and PCB design. Refer to Section 8 for design guidelines.
4.7
Timing characteristics
Table 11. Timing characteristics
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
-
15.5
-
ms
Start-up time (power up to
standby mode)
Tstart-up
Sleep => Standby mode(1)
Tsleep_std
-
2.6
-
ms
Toff_std
-
2.7
-
ms
Off => Standby
mode(2)
-
1. This time is dominated by the Xtal oscillator startup.
2. This time is dominated by the Xtal oscillator startup.
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Functional description
STLBC01
5
Functional description
5.1
STBLC01 startup
This section describes the STBLC01 startup procedure. The description is intended to be
informational only, as it is independent of any external actions. That application does
however select the preferred communication interface by setting the pin SEL(a) (SEL = 1
SPI, SEL = 0 UART).
5.1.1
Startup
When a 3 V battery is connected to the STBLC01, an internal RC oscillator starts up,
providing a clock with fixed duty-cycle to the power check circuit. After the power check
indicates enough voltage on VDD, the Xtal oscillator is enabled and when its startup
procedure is completed, the main logic can use the Xtal clock as reference.
5.1.2
End of the boot-up procedure
Once the XTAL oscillator clock is available to the digital part of the controller, the STBLC01
enters idle state and an event is sent to the host through the selected communication
interface. Refer to Section 6 for a complete description of how to send commands and read
events from the STBLC01.
At the end of the boot sequence, the STBLC01 returns an event
STBLC_POWER_MODE_IDLE to the host to notify that the system has entered in Idle
mode. If for any reason the first HCI event is corrupted after start-up, for example if the host
needs a long time to initialize or if the SEL signal is not stable at start-up time, it is
recommended that the host generates an additional reset to ensure a proper start-up.
5.2
STBLC01 power modes
The STBLC01 can be configured to work in three main power modes which are
automatically chosen based on the selected chip state described in Section 5.3. These
modes are, however, not directly selectable by application. For this reason this section is
intended to be informational.
5.2.1
Standby mode
In this mode the Xtal is up and running and is the main clock source of the system. The
internal RC oscillator is active.
5.2.2
Xtreme mode
In Xtreme mode, the Xtal oscillator is turned off but the internal RC is kept on. The supply
voltage of the logic is lowered to reduce the effect of leakage. The complete controller status
is kept.
a. In order to avoid issues at boot-up due to interface selection, it is advisable to pull up (SPI) or pull down (UART)
the pin SEL with a 10 kΩ.
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STLBC01
5.2.3
Functional description
OFF mode
In this mode, all internal oscillators are off. The supply voltage of the logic is lowered to
reduce the effect of leakage. The complete controller status is kept.
5.3
STBLC01 functional modes
5.3.1
State diagram
This part describes in which modes the STBLC01 can operate and how to switch from one
mode to another. Figure 6 shows a simplified state diagram of the STBLC01. The arrows
indicate how the transaction from one state to the other can be achieved. Note that some
operations in some states are only allowed for HCI over SPI transport layer, some others
are achieved only by firmware.
As described in Section 5.1, after this initial step, the STBLC01 automatically enters Idle
mode. Change of state is allowed through the HCI commands. In Section 4.7 the time
required to switch from one state to the other is defined.
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Functional description
STLBC01
Figure 6. STBLC01 state diagram
AM10257V2
HCI over SPI
OFF
Sleep
HCI
WU or
HCI over SPI
HCI over SPI
BLE
Sleep
(crystal)
5.3.2
HCI
HCI or
BLE firmware
Idle
BLE firmware
BLE firmware
BLE
Active
BLE firmware
BLE firmware
BLE
Sleep
(RC)
Idle mode
Idle is the mode that the STBLC01 enters as default after a reset. When this mode is
entered, the HCI event STBLC_POWER_MODE_IDLE is reported to the host. The power
mode for this configuration is Standby, as defined in Section 5.2.1. The HCI system is
available and the host can communicate with the controller using the selected transport
layer. The HCI is able to receive and decode any command sent by the host as well as send
any event back to the host using either UART or SPI transport layers, according to the value
of the SEL pin. Xtal is the clock source of STBLC01 logic. RF core is off in this state. The
internal logic is in Halt mode, waiting for a HCI command from the host.
5.3.3
Sleep mode
Sleep mode is an STBLC01 low power mode. The power mode for this configuration is
Xtreme, as defined in Section 5.2.2. RF cannot be activated from this state. When this mode
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STLBC01
Functional description
is exited, the STBLC01 goes into Idle mode. The HCI system is available but with limited
functionality depending on the transport layer chosen:
•
•
5.3.4
If UART has been chosen as transport layer, no HCI commands are accepted. The
system can be woken up by setting the pin WU to high. Once this is done, the system
restarts all internal oscillators and automatically goes into idle state asserting the
STBLC_POWER_MODE_IDLE event.
If SPI has been chosen as the transport layer, the STBLC01 is capable of executing a
limited set of HCI commands with a limited speed. In particular, all commands which
enable RF communications are not allowed in this mode. The flow control described in
Section 6.2.2 ensures that no overflow occurs in the communication. The HCI
command STBLC_SET_POWER_MODE can be used to go into Standby mode.
Off mode
Off mode is the lowest STBLC01 power consumption mode. The power mode for this
configuration is OFF as defined in Section 5.2.3. RF cannot be activated from this state. The
HCI system is available but only to wake up the system. No HCI commands are accepted.
When the system wakes up, the default mode is Idle. Depending on the transport layer
chosen, the system can be woken up as follows:
•
•
5.3.5
If UART has been chosen as the transport layer, the system can be woken up by
setting the WU pin to '1'. Once this is done, the system restarts all internal oscillators
and automatically goes into idle state, asserting the STBLC_POWER_MODE_IDLE
event.
If SPI has been chosen as the transport layer, the system can be woken up by sending
any HCI command. Only a limited set of HCI commands are supported in this mode
and with limited speed. In particular, all commands which enable RF communications
are not allowed in this mode. Once the command has been received, the STBLC01
switches automatically in Sleep mode and tries to execute the command. The
command STBLC_SET_POWER_MODE can be used to either go into Idle or into Off
mode. In the first case the system restarts all internal oscillators and automatically goes
into idle state asserting the STBLC_POWER_MODE_IDLE event. In the second case
no special HCI event is sent but the STBLC01 returns in Off mode.
BLE active
BLE active is the mode where the STBLC01 is able to communicate to other BLE devices.
This mode can be entered only from Idle mode. This mode represents the starting state for
any Bluetooth low energy operation (scanning, advertisement, connection). The power
mode for this configuration is Standby, as defined in Section 5.2.1. The HCI system is
available and the host can communicate with the controller using the selected transport
layer. HCI is able to receive and decode any command sent by the host as well as send any
event back to the host using either UART or SPI transport layers, according to the value of
the SEL pin. Xtal is the clock source of STBLC01 logic. Internal RC is calibrated during this
phase. The RF core can be activated and controlled in order to optimize power
consumption. The internal logic is in Halt mode, waiting for a HCI command from the host. In
order to avoid possible noise coupling, it is highly recommended to reduce the hostcontroller communications when the on-air link is active.
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Functional description
5.3.6
STLBC01
BLE sleep (only for SPI transport layer)
BLE sleep mode is a special low power mode available only when the SPI transport layer is
used. This mode can be enabled by the HCI command.
The STBLC01 offers two possible configurations for this mode: one employing the Xtal
oscillator and another using the RC oscillator. When the Xtal oscillator is used, the high
precision of the Xtal allows the STBLC01 to act as a master, slave, advertiser or scanner
device. When the STBLC01 is a slave, advertiser or scanner device, the RC oscillator can
be chosen, and the power consumption can be significantly reduced because the Xtreme
power mode is used in that case.
The STBLC01 controls automatically the transitions between BLE Active and this mode; the
host cannot influence them directly.
The use of the RC oscillator can be enabled using the HCI command
STBLC_POWER_MODE_CONFIGURATION.
In this configuration, the RF core is turned off and the HCI system is active and able to
receive any command.
5.4
•
If UART has been chosen as transport layer, only the Xtal oscillator can be selected.
•
If the transport layer is SPI, the Xtal oscillator or the RC oscillator can be selected.
STBLC01 reset structure
The STBLC01 has the following reset sources:
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1.
Power On Reset (POR). This occurs after each power-up of the STBLC01. Once the
boot-up procedure described in Section 5.1 is completed, an
STBLC_POWER_MODE_IDLE event is reported to the host, indicating that the
STBLC01 has entered Idle mode. During POR, the RST pad is pulled to logic 0.
2.
RST pad. The host can reset the STBLC01 by pulling up the RST pin for at least 5 ms.
In this situation the STBLC01 reboots the firmware and an event
STBLC_POWER_MODE_IDLE is sent as soon as the STBLC01 has entered Idle
mode. The RST pad is pulled to logic 0 during POR.
3.
HCI reset. Sending the standard BT command HCI_RESET, the host can reset the
BLE functions of the STBLC01 as described in [2].
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6
Host controller interface (HCI)
Host controller interface (HCI)
The STBLC01 includes a host controller interface as defined in [2], volume 2; part E.
Table 12 summarizes the command, Table 13 the data format and Table 14 the event
format. A more detailed description of commands and events as well as all HCI related
information can be found in [2].
Table 12. HCI command format
Byte #
1
2-3
4
Parameter
Size
Description
1
Packet ID: packet Identifier
– For HCI Command Packet_ID = 0x01
OpCode
2
OpCode is a unique identification of the command. It
includes
– OpCode Group Field (OGF) of 6 bits. Code 0x3F is
reserved for Vendor command
– OpCode Command Field (OCF) of 10 bits
Parameter_Total_Le
ngth
1
Lengths of all the parameters contained in the given
command packet (N.B.: total length of parameters, not
number of parameters)
Packet_ID
Parameter_0
Each command has a specific number of parameters
associated with it. These parameters and the size of each of
the parameters are defined for each command. Each
parameter is an integer number of octets in size
...
Parameter_N
Table 13. HCI ACL data format
Byte #
1
2-3
4
Parameter
Size
Description
1
Packet ID: Packet Identifier
– For HCI Data Packet_ID = 0x02
Handle
PB flag
BC flag
2
Connection_Handle (12 bit) to be used for transmitting data
packet or segment over primary controller. Range: 0x0000xEFF (0xF00-0xFFF reserved for future use)
Packet_Boundary_Flag (bit 4 and bit 5 of the second octet)
Broadcast_Flag (bit 6 and bit 7 of the second octet)
Data_Total_Length
2
Length of data measured in octets.
Packet_ID
Data
ACL data (L2CAP PDU)
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Host controller interface (HCI)
STLBC01
Table 14. HCI event format
Byte #
Parameter
Size
Description
1
Packet_ID
1
Packet ID: Packet Identifier
– For HCI Event Packet_ID = 0x04
2
Event_Code
1
Each event is assigned a one-byte event code to uniquely
identify different types of events. Range: 0x00 to 0xFF,
where 0xFF is reserved for Vendor specific events.
3
Parameter_Total_Le
ngth
1
Lengths of all the parameters contained in the given event
packet
Event_Parameter_0
Each event has a specific number of parameters associated
with it. These parameters and the size of each of the
parameters are defined for each event. Each parameter is
an integer number of octets in size.
...
Event_Parameter_N
In addition to standard commands, a set of HCI proprietary commands for dealing with the
power modes and some parameters linked to RF performance are supported. The complete
list of supported proprietary HCI commands is available in Section 7.
The STBLC01 supports the two different transport layers for HCI according to the level of
the SEL pin:
6.1
1.
SEL = 0: UART interface as defined in [2], volume 4, part A.
2.
SEL = 1: SPI interface with proprietary flow control.
HCI UART transport layer
The STBLC01 contains a 2-pin UART compatible for communication protocol with 16450,
16550 and 16750 standards. The baud rate can be set by the host by sending the related
HCI command (refer to Section 7). The default baud rate is 115.2 kbps.
6.1.1
UART interface
The UART interface is through the following pins:
6.1.2
•
UART_RX: UART receiver line
•
UART_TX: UART transmitting line
UART settings
The HCI UART transport layer uses the following settings for RS232:
•
•
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Baud rate: configurable via HCI
The default baud rate is 115.2 kbps. The default value is only set by POR or the RST
pin
•
Number of data bits: 8
•
Parity bit: no parity
•
Start bit: 1 start bit
•
Stop bit: 1 stop bit
•
Flow control: not used
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6.2
Host controller interface (HCI)
HCI SPI transport layer
The STBLC01 features a proprietary HCI SPI transport level which may allow the
host/controller system to reach lower power consumption by using lower clock frequencies.
HCI commands sent and events received over the SPI transport layer are identical to the
ones sent/received over the UART transport level. The STBLC01 supports only slave mode
SPI. The maximal SPI speed is 10 MHz. STBLC01 HCI events are signalled to host thought
the assertion of the IRQ pin. When this occurs, the host sends a clock so that event can be
read. Pin IRQ is also used to inform the host that the STBLC01 has data coming from RF
communication to send. The procedures to read events or data are exactly the same.
6.2.1
SPI interface
The STBLC01 includes a 5-wire, 8-bit, MSB first, Motorola compatible with CPOL=0,
CPHA=0 SPI interface. Only half-duplex transport is supported. The SPI interface is defined
through the following pins:
•
•
•
•
•
6.2.2
CSN: chip select signal. This signal is active low and it is mandatory, even when only 1
slave device is connected to the host
SPI_SCK: SPI clock signal. When CSN is active, the host sends to the controller a
number of clock cycles in multiples of 8 bits during each SPI transaction. When CSN is
not active, the STBLC01 ignores any signal sent to this pin. This allows the host to set
a clock signal to serve other devices
SPI_MOSI: Host to controller transfer data line. The host generates data on the
negative edge and samples data on the positive edge of the SPI_SCK signal. SPI data
is sent in byte format, with the most significant bit (MSB) first.
SPI_MISO: Controller to the host transfer data line. When CSN is active, controller
generated data on the negative edge and sample data on the positive edge of the
SPI_SCK signal. When CSN is inactive, the controller sets this output in tristate mode.
SPI data is sent in byte format, with the most significant bit (MSB) first.
IRQ: Interrupt request. This signal is set by the controller when an event needs to be
sent to the host.
SPI flow control
The STBLC01 features a proprietary flow control for all communications over SPI both from
the host to the controller and from the controller to the host. Each SPI transaction is done for
8 bits of data.
Host to controller flow
When the host needs to communicate with the controller, the following flow is followed:
1.
Host sets the MOSI signal to '1'.
2.
Host activates CSN after 100 ns.
3.
Host polls MISO line. The first polling is done at least 100 ns after CSN is activated.
4.
If MISO = '0' then the controller reception buffer is full and the host is not allowed to
start the transaction.
5.
If MISO = '1' then the controller reception buffer is not full and the host can start the
transaction. After each set of 8 rising edges of SPI_SCK, the host polls the MISO line to
check whether the controller reception buffer is not full. The first polling can be done on
the first SPI_SCK falling edge.
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Host controller interface (HCI)
STLBC01
Controller to host flow
When the controller needs to communicate with the host, the following flow is followed:
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1.
Controller sets IRQ line to '1'. This means that the controller has at least 1 byte of data
to transmit.
2.
Host pulls down the MOSI signal.
3.
Host activates CSN after 100 ns.
4.
Host starts an SPI transaction by sending a data byte equal to 0x00.
5.
Host reads data sent by the controller on the MISO line.
6.
If IRQ is set to '0' during an SPI transaction, then the controller has no other data to
transmit. Once all bits of the transaction are read, the host can stop sending a clock.
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7
Peripherals information
Peripherals information
The STBLC01 includes several peripherals to fulfil all the requirements of the BLE standard.
Although none of these peripherals are available for host use. This section gives a short
description of STBLC01 internal peripherals to provide a better overview of the system.
7.1
AES
The STBLC01 includes a hardware encryption/decryption accelerator based on the
advanced encryption system (AES) standard. For further information about AES please
refer to the official page of NIST (http://csrc.nist.gov/CryptoToolkit/aes/).
This block provides the following functions:
7.2
1.
BLE encryption key calculation
2.
BLE message integrity code (MIC) calculation
3.
BLE encryption stream generation
Random number generator (RNG)
The STBLC01 features an RNG block which is used to generate a non-deterministic bit
stream as required in [2]. The result of this block is a non-deterministic 32-bit stream.
7.3
Battery level detector (SVLD)
The STBLC01 offers the possibility of monitoring the supply voltage of the system. The host
can launch an SVLD measurement by sending the HCI command
STBLC_SVLD_MEASUREMENT, as defined in Section 9. The measurement compares the
supply voltage level with a predefined voltage level described in Table 15. After the
measurement is completed, an event is reported to the host, as described in Section 9.3.2.
All voltages specified in Table 15 must be considered with a precision of ±10%.
Table 15. SVLD reference
Supply
Reference
Function
2.05 V
Battery low detection
2.25 V
Battery low early warning
VCC
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Application design guidelines
8
STLBC01
Application design guidelines
This section provides some design guidelines and constraints are given for proper
application designs. In particular, antenna port and antenna design guidelines, XTAL
oscillator and power supply connections are described. Furthermore, PCB guidelines are
stated in order to achieve an optimum RF-performance.
8.1
Antenna port
The STBLC01 features a fully differential 200 +j0 Ω antenna port for the received or emitted
signals at the pins ANTP and ANTN. The selected input/output impedance allows the
implementation of a folded dipole antenna directly connectable to the antenna port which
does not require any external matching components. Use of other types of antenna is
granted by the implementation of a matching network with few external components. The
following general guidelines can be used to achieve the best results in terms of RF
performance:
8.1.1
1.
Use at least a 2-layer PCB, dedicating the bottom layer to one common ground plane
covering all external components and the chip itself. Connect the attached area pin of
the package to the ground plane.
2.
Keep the STBLC01 ANTN/ANTP symmetry on the PCB by keeping symmetry in
components and via placement as well as line-routing.
3.
Use only 100 Ω transmission lines between the STBLC01 RF output pins and the
antenna / matching network input.
4.
Try to minimize RF trace lengths.
5.
Respect also a 3 mm clearance to ground close to RF transmission lines and/or
matching network components. In particular, respect clearance to ground for antenna
structure (varies with antenna topology).
6.
Do not put a ground plane below the antenna structure to avoid gain loss and directivity
modification.
50 Ohm matching
The STBLC01 antenna impedance can be converted to 50 Ω termination to allow interfacing
with a standard measurement system or with a standard 50 Ω antenna structure. In this
case, a matching circuit which ensures the conversion from the differential 200 Ω antenna
port of the STBLC01 and the single-ended 50 Ω of the instruments, is required. Figure 7
shows an example circuit to implement a matching network. In order to achieve the best RF
performance, the layout around the antenna port - both for the chip and attached antenna
connector - needs to be done while keeping RF guidelines in mind.
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STLBC01
Application design guidelines
Figure 7. Matching circuit for 50 Ohm antenna
STBLC01
L1= 3.3nH
C1= 1.2pF
ANTP
200 Ohm
L3= 2.0nH
50 Ohm
ANTN
L2= 3.3nH
C1= 1.0pF
C2= 1.2pF
AM10261V1
8.2
Xtal oscillator
The STBLC01 includes a fully integrated, low power 26 MHz Xtal oscillator with an
embedded amplitude regulation loop. In order to achieve low power operation and good
frequency stability of the XTAL-oscillator, certain considerations with respect to the quartz
load capacitance C0 need to be taken into account. Figure 8 shows a simplified block
diagram of the amplitude regulated oscillator used in the STBLC01.
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Application design guidelines
STLBC01
Figure 8. Xtal block diagram
Amplitude regulation
Buffered
rail-to-rail
clock
CPAD
CPAD
XTAL2
XTAL1
CPB2
CPB1
C1
C2
AM10262V1
Low power consumption and fast startup time is achieved by choosing a quartz crystal with
a low load capacitance C0. A reasonable choice for capacitor C0 is 10 pF. The Xtal startup
time is typically 1 ms but can go up to 10 ms depending on the quality factor of the external
quartz chosen. To achieve good frequency stability, the following equation then needs to be
satisfied:
Equation 1
′
′
C1 ⋅ C2
-′
C 0 = ---------------------′
C1 + C2
where C1'= C1+CPCB1+ CPAD, C2'= C2+CPCB2+CPAD and C1 and C2 are external (SMD)
components, CPCB1 and CPCB2 are PCB routing parasites and CPAD is the equivalent smallsignal pad-capacitance. The value of CPAD is around 1 pF for each pad. The routing
parasites should be minimized by placing quartz and C1 / C2 close to the chip, not only for
an easier matching of the load capacitance C0, but also to ensure robustness against noise
injection. Connect each capacitor of the XTAL oscillator to ground by a separate via.
To achieve good noise immunity against external interference, the XTAL oscillator is
designed with low input impedance using a chip-internal 260 kΩ resistor between XTAL1
and XTAL2. In case the noise robustness needs to be further increased, an external parallel
resistor can be added at the cost of extra current consumption.
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8.3
Application design guidelines
Power supplies
In order to avoid any interference on the RF communication, all STBLC01 power supplies
need to be properly decoupled. In general, all decoupling capacitors defined in Figure 4
need to be as close as possible to the relative pin. Special caution needs to be taken for the
decoupling on AVDD_PA (power supply for PA) and VDD (power supply for digital part). It is
mandatory to put the decoupling capacitors as close as possible to the pin. All ground
connections must be as short as possible using vias directly to the ground plane. Avoid
sharing vias between different signals.
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Vendor HCI commands
9
STLBC01
Vendor HCI commands
This section describes the proprietary HCI commands which can be used to set up special
features of the STBLC01. As defined, the OGF reserved for vendor specific
commands/event is 0x3F.
Table 16. HCI commands
HCI Command
OCF
Description
STBLC_SET_PUBLIC_ADDRESS
0x02
Set public address
STBLC_SET_POWER_MODE
0x03
Select power mode
STBLC_SVLD_MEASUREMENT
0x04
Run SVLD measurement
STBLC_SET_RF_POWER_LEVEL
0x05
Select TX power level
STBLC_POWER_MODE_CONFIGURAT
ION
0x06
Enable/disable transition to BLE Sleep mode
STBLC_SET_UART_BAUD_RATE
0x07
Set UART baud rate
9.1
STBLC_SET_PUBLIC_ADDRESS
9.1.1
Command parameters for STBLC_SET_PUBLIC_ADDRESS
Table 17. Command parameters for STBLC_SET_PUBLIC_ADDRESS
9.1.2
Parameter
Size
Address
6
Description
Set the public address of the device in the controller
Return parameters for STBLC_SET_PUBLIC_ADDRESS
Table 18. Return parameters for STBLC_SET_PUBLIC_ADDRESS
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Parameter
Size
Address
1
Description
Standard BT error codes
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Vendor HCI commands
9.2
STLBC_SET_POWER_MODE
9.2.1
Command parameters for STLBC_SET_POWER_MODE
Table 19. Command parameters for STLBC_SET_POWER_MODE
Parameter
Power mode
9.2.2
Size
1
Description
0x00 = Idle
0x01 = Sleep
0x02 = Off
0x03-0xFF = reserved
Return parameters for STLBC_SET_POWER_MODE
Table 20. Return parameters for STLBC_SET_POWER_MODE
9.2.3
Parameter
Size
Address
1
Description
Standard BT error codes
Returned events for STLBC_SET_POWER_MODE
The following event sequence, depending on the transition, is returned:
1.
From Idle mode to Sleep/Off mode, only the command completed event is returned.
2.
From Sleep/Off mode to Idle mode, a command status is sent after checking the
integrity of the command. Once Idle state has been entered completely an
STBLC_POWER_MODE_IDLE event is returned to the host to report that the action
has been completely done.
9.3
STBLC_SVLD_MEASUREMENT
9.3.1
Command parameters for STBLC_SVLD_MEASUREMENT
Table 21. Command parameters for STBLC_SVLD_MEASUREMENT
Parameter
Size
Description
Level
1
0x06 = 2.05 V
0x07 = 2.25 V
0x00-0x05 reserved
0x08-0xFF reserved
Source
1
0x00 = reserved
0x01 = VCC
0x02-0xFF = reserved
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Vendor HCI commands
9.3.2
STLBC01
Return parameters for STBLC_SVLD_MEASUREMENT
Table 22. Return parameters for STBLC_SVLD_MEASUREMENT
9.3.3
Parameter
Size
Description
Status
1
Standard Bluetooth error codes
Result
1
0x00 = voltage is above the level
0x01 = voltage is below the level
Returned events for STBLC_SVLD_MEASUREMENT
Command complete event.
9.4
STBLC_SET_RF_POWER_LEVEL
9.4.1
Command parameters for STBLC_SET_RF_POWER_LEVEL
Table 23. Command parameters for STBLC_SET_RF_POWER_LEVEL
Parameter
Level
9.4.2
Size
1
Description
0x00 = -18 dBm
0x01 = -15 dBm
0x02 = -12 dBm
0x03 = -9 dBm
0x04 = -6 dBm
0x05 = -3 dBm
0x06 = 0 dBm
0x07 = +3 dBm
0x08-0xFF = reserved
Return parameters for STBLC_SET_RF_POWER_LEVEL
Table 24. Return parameters for STBLC_SET_RF_POWER_LEVEL
9.4.3
Parameter
Size
Status
1
Description
Standard BT error codes
Returned events for STBLC_SET_RF_POWER_LEVEL
Command complete event.
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Vendor HCI commands
9.5
STBLC_POWER_MODE-CONFIGURATION
9.5.1
Command parameters for STBLC_POWER_MODE-CONFIGURATION
Table 25. Command parameters for STBLC_POWER_MODE-CONFIGURATION
9.5.2
Parameter
Size
Sleep_Mode_Enable
1
Description
0x00 = transition to BLE Sleep mode disabled
0x01 = transition to BLE Sleep mode enabled
0x02-0xFF = reserved
Return parameters for STBLC_POWER_MODE-CONFIGURATION
Table 26. Return parameters for STBLC_POWER_MODE-CONFIGURATION
9.5.3
Parameter
Size
Status
1
Description
Standard BT error codes
Returned events for STBLC_POWER_MODE-CONFIGURATION
Command complete event.
9.6
STBLC_SET_UART_BAUD_RATE
9.6.1
Command parameters for STBLC_SET_UART_BAUD_RATE
Table 27. Command parameters for STBLC_SET_UART_BAUD_RATE
Parameter
Baud_Rate
Size
Description
1
0x00 = 1 200 Bd
0x01 = 2 400 Bd
0x02 = 4 800 Bd
0x03 = 9 600 Bd
0x04 = 14 400 Bd
0x05 = 19 200 Bd
0x06 = 28 800 Bd
0x07 = 38 400 Bd
0x08 = 57 600 Bd
0x09 = 76 800 Bd
0x0A = 115 200 Bd
0x0B = 230 400 Bd
0x0C = 460 800 Bd
0x0D = 921 600 Bd
0x0E = 1 843 200 Bd
0x0F – 0xFF reserved
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Vendor HCI commands
9.6.2
STLBC01
Return parameters for STBLC_SET_UART_BAUD_RATE
Table 28. Return parameters for STBLC_SET_UART_BAUD_RATE
9.6.3
Parameter
Size
Status
1
Description
Standard BT error codes
Returned events for STBLC_SET_UART_BAUD_RATE
Command complete event.
The STBLC01 changes the baud rate after sending the command complete event. This
command is used only if no other event is in the controller HCI buffer. For this reason it is
strongly recommended to use this command only after power-up or reset.
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10
Vendor HCI events
Vendor HCI events
This section defines the STBLC01 vendor events. There is no special event mask defined
for vendor events in the STBLC01. This means that the host cannot avoid receiving vendor
events.
10.1
STBLC_POWER_MODE_IDLE
This event reports that the device has correctly entered idle mode. This event is also sent
after watchdog or bus error resets. This event is sent after POR and HCI resets.
The associated event code is 0xFF.
10.1.1
Event parameters
Table 29. Event parameters for STBLC_POWER_MODE_IDLE
10.2
Parameter
Size
STBLC_Event_Code
1
Description
0x01
Hardware error event codes
The hardware error event is a standard BT event. The STBLC01 defines additional
parameter codes as follows:
Table 30. Hardware error event codes
Code
Description
0x00
No error
0x01
HCI synchronization lost
0x02
RF initialization fail (auto-calibration)
0x03
RF system error
0x04
CPU reset (watchdog, bus error)
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Related documents
11
36/40
STLBC01
Related documents
1.
Bluetooth Core specifications, Version 4.0, Bluetooth SIG, 30.06.2010.
2.
Bluetooth Low Energy RF-PHY Test Specifications, Version 4.0, Bluetooth SIG,
15.12.2009.
3.
Bluetooth 4.0 Link Layer Test Specifications, Version 4.0.1, Bluetooth SIG, 30.06.2010.
4.
ETSI EN 300 440-1, Version 1.3.1, Sept. 2001.
5.
ETSI EN 300 328, Version 1.7.1, May 2006.
6.
FCC Rules 15.247, FCC, Sept. 2009.
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12
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
Table 31. VFQFPN 5X5X0.9 24 leads mechanical dimensions
mm.
Dim.
Min.
Typ.
Max.
A
0.80
0.85
1.00
A1
0.00
0.02
0.05
A3
b
0.20
0.20
0.30
D
5.00
E
5.00
D2
3.2
E2
3.2
e
0.35
3.70
3.65
3.70
0.65
L1
0.30
K
0.20
F
0°
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0.50
14°
37/40
Package mechanical data
STLBC01
Figure 9. VFQFPN 5X5X0.9 24 leads mechanical drawing
8397984_B
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13
Revision history
Revision history
To
Table 32. Document revision history
Date
Revision
Changes
10-Jan-2013
1
Initial release.
22-Apr-2013
2
Document status promoted from preliminary data to production data.
Updated Table 1.
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STLBC01
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