STLVDS3486BDR

STLVDS3486 High speed differential line drivers Feature summary ■ meets or exceeds the requirements of ansi TIA/EIA-644 standard ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t Description b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ■ Operates with a single 3.3V supply ■ Designed for signaling rate up to 400Mbps ■ Differential input thresholds ±100mV max ■ Typical propagation delay time of 2.5ns ■ Power dissipation 60mW typical per receiver at 200MHz ■ Low voltage TTL (LVTTL) logic output levels ■ Pin compatible with the MC3486 and SN65LVD3486 ■ Open circuit fail safe ■ ESD protection: 7KV receiver pins 3KV all pins vs gnd TSSOP It also provides a valid logical output state with a ±100mV differential input voltage within the input common mode voltage range. The input common mode voltage allows 1V of ground potential difference between two LVDS nodes. The STLVDS3486, is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operations with a 3.3V supply rail. This differential receiver provides a valid logical output state with a 3.3V supply rail. The intended application of this device and signalling technique is both point-to-point and multidrop data transmission over controlled impedance media approximately 100Ω. The transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment. The STLVDS3486 version is characterized for operation from -40°C to 85°C. . Order code Part number Temperature Range Package Comments STLVDS3486BTR -40 to 85 °C TSSOP16 (Tape & Reel) 2500 parts per reel April 2006 Rev. 4 1/15 www.st.com 15 STLVDS3486 Contents 1 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/15 STLVDS3486 Pin configuration 1 Pin configuration Figure 1. Pin connections ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Table 1. Table 2. Pin description Pin n° Symbol Name and function 2, 6, 10, 14 1A to 4A Receiver inputs 1, 7, 9, 15 1B to 4B Negated receiver inputs 3, 5, 11, 13 1Y to 4Y Receiver outputs 4 1EN, 2EN Receivers 1 and 2 enable 12 3EN, 4EN Receivers 3 and 4 enable 8 GND Ground 16 VCC Supply voltage Truth table Differential input Enables Output A, B EN Y VID ≥ 100mV H H -100mV < VID < 100mV H ? VID ≤ -100mV H L X L Z OPEN H H L=Low level, H=High Level, X=Don’t care, Z= High Impedance 3/15 Logic diagram 2 Logic diagram Figure 2. Logic diagram and logic symbol STLVDS3486 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 4/15 STLVDS3486 Maximum ratings 3 Maximum ratings Table 3. Absolute maximum ratings Symbol VCC Parameter Supply voltage (Note 1) VI Input voltage VI Input voltage (A or B inputs) ESD Value Unit -0.5 to 4.6 V -0.5 to (VCC + 0.5) V -0.5 to 4.6 V Pins receivers 7 All pins vs gnd 3 Human body model KV ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Tstg Note: Note: Storage temperature range -65 to +150 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1 Table 4. All voltages except differential I/O bus voltage, are with respect to the network ground terminal. Recommended operating conditions Symbol Parameter Min. Typ. Max. Unit 3.3 3.6 V VCC Supply voltage 3.0 VIH HIGH Level input voltage (enable) 2.0 VIL LOW Level input voltage (enable) |VID| Magnitude of differential input voltage VIC Common mode input voltage TJ Operating temperature range V 0.8 V 0.1 0.6 V 0.5|VID| 2.4-0.5|VID| V VCC - 0.8 -40 85 °C 5/15 Electrical characteristics STLVDS3486 4 Electrical characteristics Table 5. Electrical characteristics (Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, and VCC = 3.3V). Symbol Parameter VITH+ Positive Going Differential Input Voltage Threshold VITH- Negative Going Differential Input Voltage Threshold VOH High Level Output Voltage VOL Low Level Output Voltage ICC Supply Current Test conditions Min. Typ. Max. Unit 100 mV -100 mV ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O IOH = -8mA 2.4 IOH = -4mA 2.8 V IOH = 8mA 0.4 V 10 18 mA 0.25 0.5 mA -2 -10 -20 -1.2 -3 Enabled, No Load II Disabled Input Current (A or B inputs) VI = 0V VI = 2.4V 20 µA VIH = 2V 10 µA Low Level Input Current (EN, G, G or Inputs) VIL = 0.8V 10 µA High Impedance Output Current VO = 0 or VCC ± 10 µA II(OFF) Power off Input Current (A or B inputs) VCC = 0, VI = 3.6V IIH High Level Input Current (EN, G, G or Inputs) IIL IOZ 6/15 µA 10 STLVDS3486 Table 6. Electrical characteristics Switching characteristics (Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, and VCC = 3.3V). Symbol Parameter Test conditions Min. Typ. Max. Unit tPLH Propagation Delay Time, Low to High Output 1.5 2.5 3.3 ns tPHL Propagation Delay Time, High to Low Output 1.5 2.5 3.3 ns Differential Output Signal Rise Time tr Differential Output Signal Fall Time 0.4 ns CL = 10pF, Fig. 1 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O tf 0.4 ns tsk(O) Channel to Channel Output Skew (note1) 0.1 0.3 ns tsk(P) Pulse Skew (|tPHL - tPLH|) (note2) 0.2 0.4 ns tsk(PP) Part to Part Skew (note3) 1 ns 3 12 ns 5 12 ns tPZH Propagation Delay Time, High Impedance to High Level Output tPZL Propagation Delay Time, High Impedance to Low Level Output Fig. 2 tPHZ Propagation Delay Time, High Level to High Impedance Output 5 12 ns tPLZ Propagation Delay Time, Low Level to High Impedance Output 5 12 ns Note: 1 tsk(O) is the maximum delay time difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. 2 tsk(P) is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. 3 tsk(PP) is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC, and within 5°C of each other within the operating temperature range. 7/15 Test circuit STLVDS3486 5 Test circuit Figure 3. Timing test circuit, timing and waveforms ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Note A: All input pulse are supplied by a generator having the following characteristics: tr or tf ≤ 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 10 ± 0.2ns. Note B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T. 8/15 STLVDS3486 Figure 4. Test circuit Enable and disable time test circuit and waveform ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Note A: All input pulse are supplied by a generator having the following characteristics: tr or tf ≤ 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 500 ± 10ns. Note B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T. 9/15 Typical performance characteristics 6 STLVDS3486 Typical performance characteristics (unless otherwise specified at TJ = 25°C) Figure 5. Output current vs output voltage Figure 6. Output current vs output voltage ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 10/15 STLVDS3486 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 11/15 Package mechanical data STLVDS3486 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 1 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 12/15 STLVDS3486 Package mechanical data Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 0.504 D 20.2 0.795 N 60 2.362 0.519 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O T 22.4 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 13/15 Revision history STLVDS3486 8 Revision history Table 7. Revision history Date Revision 06-Apr-2006 4 Changes Order codes has been updated and new template. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 14/15 STLVDS3486 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Please Read Carefully: Information in this document is provided solely in connection with ST products. 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