STM32 F2 series
High‑performance Cortex‑M3 MCUs
STMicroelectronics
32‑bit Flash microcontrollers, 120 MHz/150 DMIPS
with ART AcceleratorTM and advanced peripherals
www.st.com/stm32
STM32 F2 series
The STM32 F2 series complements our STM32 product portfolio by offering devices with close pin-to-pin
compatibility, with more performance, more Flash and SRAM memories, and advanced peripherals such as
a camera interface, crypto/hash processor, full/high speed USB-OTG, Ethernet, CAN, and external memory
interface. These expand the number of addressable applications in the industrial, consumer, and medical
segments.
Based on CortexTM-M3 running at 120 MHz, the STM32 F2 series allows a performance equivalent to zero-wait
execution from Flash using the adaptive real-time ART Accelerator™ technology.
The STM32 F2 series includes devices with 128 Kbytes to 1 Mbyte of on-chip Flash memory, 64 Kbytes to
128 Kbytes of SRAM, and 15 communication interfaces.
LQFP64, LQFP100, LQFP144, WLCSP64 (< 4 x 4 mm), UFBGA176 and LQFP176 packages are available.
STM32
F2 block
STM32F-2
blockdiagram
diagram
ART AcceleratorTM
System
Power supply
1.2 V regulator
POR/PDR/PVD
Xtal oscillators
32 kHz + 4 ~26 MHz
Internal RC oscillators
32 kHz + 16 MHz
PLL
ARM Cortex-M3
CPU 120 MHz
SysTick timer
2x watchdogs
(independent and window)
51/82/114/140 I/Os
Cyclic redundancy
check (CRC)
Camera interface
MPU
3x SPI, 2x I²S, 3x I²C
Ethernet MAC 10/100
with IEEE 1588
2x CAN 2.0B
JTAG/SW debug/ETM
1x USB 2.0 OTG FS/HS1
Nested vector
interrupt
controller (NVIC)
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1x USB 2.0 OTG FS
16-channel DMA
Crypto/hash processor2
3DES, AES 256
SHA-1, MD5, HMAC
True random number
generator (RNG)
Notes:
1.
HS requires an external PHY connected to the ULPI interface
2.
Crypto/hash processor on STM32F217 and STM32F215
2
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Multi-AHB bus matrix
Control
2x 16-bit motor control
PWM
Synchronized AC timer
10x 16-bit timers
2x 32-bit timers
Applications
Connectivity
Clock control
RTC/AWU
128-Kbyte
Up to 1-Mbyte Flash memory
Up to 128-Kbyte SRAM
FSMC/
SRAM/NOR/NAND/CF/
LCD parallel interface
80-byte + 4-Kbyte
backup SRAM
512 OTP bytes
SDIO
6x USART
LIN, smartcard, IrDA,
modem control
Analog
2-channel 2x 12-bit DAC
3x 12-bit ADC
24 channels / 2 MSPS
Temperature sensor
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Industrial
QQ PLC
QQ Inverters
QQ Power meters
QQ Printers, scanners
QQ Industrial networking
Building and security
QQ Alarm systems
QQ Access control
QQ HVAC
Medical
QQ High-end glucose meters
QQ Power meters
QQ Battery-operated
applications
Appliances
QQ Motor drive
QQ Application control
Consumer
QQ PC peripherals, gaming
QQ Digital cameras, GPS
platforms
QQ Home audio
STM32 F2 series product lines
Common core peripherals and architecture:
6x USART, 3x SPI, 3x I²C
2x CAN
Multiple 16‑bit and 32‑bit timers
2x advanced timers
Dual DAC
FSMC
2x I²S
STM32F207/217
Up to
Up to
120 MHz 128-Kbyte
1-Mbyte
CPU
SRAM
Flash
2x USB
2.0 OTG
FS/HS1
STM32F205/215
Up to
Up to
120 MHz 128-Kbyte
1-Mbyte
CPU
SRAM
Flash
1x USB
2.0 OTG
FS/HS1
USB 2.0 Camera
OTG FS interface
SDIO
RNG
Crypto/
Ethernet
hash
processor2 IEEE 1588
MPU
ETM with JTAG fuse security
Main 4-26 MHz oscillator
Internal 16 MHz and
32 kHz RC oscillators
+
Real-time clock
4-Kbyte battery backed up SRAM
2x watchdogs
Reset circuitry
SDIO
RNG
Crypto/
hash
processor2
Up to 16-channel DMA
80 % GPIO ratio, up to 60 MHz
3x 12‑bit ADC (2 MSPS)
Temperature sensor
1.73 to 3.6 V VDD
Notes:
1. HS requires an external PHY connected to ULPI interface
2. Crypto/hash processor on STM32F217 and STM32F215
3. 1.7 V for WLCSP64 package only and 1.8 V for all other packages
Abbreviations:
FSMC: Flexible static memory controller
RNG: Random number generator
STM32 F2 series portfolio
Flash size (bytes)
1M
768 K
512 K
256 K
128 K
STM32F217VG
STM32F217ZG
STM32F217IG
STM32F207VG
STM32F207ZG
STM32F207IG
STM32F215RG
STM32F215VG
STM32F215ZG
STM32F205RG
STM32F205VG
STM32F205ZG
STM32F207VF
STM32F207ZF
STM32F205VF
STM32F205ZF
STM32F217VE
STM32F217ZE
STM32F217IE
STM32F207VE
STM32F207ZE
STM32F207IE
STM32F215RE
STM32F215VE
STM32F215ZE
STM32F205RE
STM32F205VE
STM32F205ZE
STM32F205RF
STM32F207VC
STM32F207ZC
STM32F205RC
STM32F205VC
STM32F205ZC
STM32F205RB
STM32F205VB
64 pins
WLCSP*/LQFP
100 pins
LQFP
Note:
* STM32F205RG and STM32F205RE only
Legend:
STM32F207
Ethernet, 2x USB OTG, camera interface
STM32F207IF
STM32F207IC
Pin count
144 pins
LQFP
STM32F217
Ethernet, 2x USB OTG, camera interface,
crypto/hash processor
176 pins
UFBGA/LQFP
STM32F205
1x USB OTG FS/HS
STM32F215
1x USB OTG FS/HS,
crypto/hash processor
3
STM32 F2 key features
Real‑time
performance
Outstanding power
efficiency
Superior and
innovative
peripherals
Maximum
integration
Extensive tools and
software
+ ART Accelerator,
Multi‑AHB bus matrix,
Excellent real‑time
120 MHz/150 DMIPS
zero‑wait state
execution performance
from Flash
RTC in VBAT mode,
ultra‑low dynamic
power consumption
1.7 to 3.6 V VDD
USB‑OTG High Speed,
camera interface,
Ethernet, CAN, crypto/
hash processor,
external memory
interface
1‑Mbyte Flash,
128‑Kbyte SRAM,
512 OTP bytes, 4‑Kbyte
backup SRAM, reset
circuitry, voltage
regulator, internal
RC oscillator, PLL
Various IDE starter kits,
libraries, RTOS and
stacks
STM32 F2 series, over 50 part numbers,
a new addition to the STM32 platform now
counting over 250 compatible devices
Unleashing the full performance of the core beyond the embedded Flash speed is an art.
Real‑time performance
To free the full performance of the Cortex-M3 core, ST has developed a leading-edge 90 nm process and a unique
technology, the adaptive real-time ART Accelerator™. The ART Accelerator uses an advanced prefetch queue and
branch cache to offer a performance equivalent to zero-wait execution from embedded Flash memory.
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
Data/debug bus
Arbitration
and branch
management
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
Instruction bus
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
128-bit
Cortex-M3
CPU
4
Flash
memory
ART Accelerator
128-bit
Core
128-bit wide
embedded Flash memory
Combined with ST’s 90 nm technology, the ART Accelerator achieves a linear performance up to 120 MHz, offering 150 DMIPS
and 254 Coremark performance executing from Flash.
The acceleration mechanism is made possible using a prefetch queue, a branch cache and a smart arbitration mechanism.
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MCUs using less advanced accelerators or slower embedded Flash memories will impact execution performance as wait
states occur.
MCUs using faster Flash but no branch cache acceleration to achieve performance usually show higher power consumption
as a result of more accesses to a power hungry Flash.
ART Accelerator™ performance result
DMIPS
STM32 F2:
best mix, acceleration and speed
150
Competitor R: maximum frequency limitation
125
100
Competitor F: Flash access bottleneck
75
50
25
0
20
40
60
80
STM32 F2 series
100
120
Competitor F
FCPU
(MHz)
Competitor R
The 32-bit multi-AHB bus matrix allows concurrent execution and data transfers. It interconnects all masters and slaves and
ensures seamless and efficient operation even when several high-speed peripherals are working simultaneously.
For example, the following may all be performed at the same time.
General
purpose
DMA1
8 channels
System
Data
Instructions
120 MHz
General
purpose
DMA2
8 channels
DMA_P2
Cortex-M3
with CPU
DMA_MEM2
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The core accesses the Flash and 112-Kbyte SRAM block through the ART Accelerator
The DMA2 controller transfers data from the camera interface located on the AHB2 peripheral bus to an LCD connected to
the FSMC
The USB OTG High Speed interface stores received data in the 16-Kbyte SRAM block
DMA_P1
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DMA_MEM1
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Ethernet
MAC 10/100
DMA
USB OTG
HS
DMA
Bus masters
480 Mbit/s
100 Mbit/s
12.5 Mbyte/s 60 Mbyte/s
Bus slaves
AHB2 peripheral
AHB1/APB1
AHB1 peripheral
AHB1/APB2
SRAM 16 Kbytes
SRAM 112 Kbytes
480 Mbyte/s D
480 Mbyte/s I
ART
Accelerator
7-layer 32-bit multi-AHB bus matrix
FSMC
D
I
Flash
1 Mbyte
5
Outstanding power efficiency
188 µA/MHz, 22.5 mA at 120 MHz (executing EEMBC CoreMark V1.0 from Flash memory, with the
ART Accelerator enabled and all peripherals off). Who said performance and dynamic power efficiency were
incompatible! The key to such power efficiency in Run mode is twofold:
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ST’s 90 nm process allowing the CPU core to run at only 1.2 V
The ART Accelerator reducing the number of accesses to Flash
Further contributing to the outstanding power efficiency:
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Advanced low-power modes and features such as battery back-up with RTC and 4-Kbyte back-up SRAM
VDD min down to 1.7 V on CSP package
Superior and innovative peripherals
The STM32 F2 series introduces new peripherals to the STM32 platform:
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Ethernet MAC 10/100 with IEEE 1588 v2 hardware support
USB OTG with high speed support (external PHY required)
Audio class architecture: I²S and USB peripherals with advanced PLL and data synchronization schemes
Camera interface, 8- to 14-bit parallel, up to 48 Mbyte/s at 48 MHz
Flexible static memory interface (FSMC) running at up to 60 MHz to expand memory space or support an LCD
Crypto/hash processor: 3DES, AES 256/SHA-1, MD5, HMAC
3x SPI running at up to 30 Mbit/s, 6x USART running at up to 7.5 Mbit/s
3x 12-bit ADC, 2 MSPS and up to 6 MSPS in interleaved mode
RTC with hardware calendar support
True random number generator
Fast GPIO (60 MHz toggling speed)
Maximum integration
The Flash and SRAM memories available in the product can accommodate advanced software stacks and user
data, with no need for external memories.
In addition, 512 bytes of OTP memory make it possible to store critical user data such as Ethernet MAC addresses
or cryptographic keys.
The reset circuitry and the internal RC oscillators make the STM32 F2 series a cost-optimized solution.
Extensive tools and SW
A complete range of high-end and low-cost tools is available to provide
software and hardware development solutions.
ST provides an evaluation board allowing full access to the STM32 F2
series features such as external memories, Ethernet, the two USB OTG connectors,
touchscreen TFT display, CMOS camera audio output and exchange audio PLL.
The board provides connection to all I/Os and all peripherals available in the chip.
The order codes are: STM3220G-EVAL (board with STM32F207IGH6 chip, no
encryption support) and STM3221G-EVAL1 (board with STM32F217IGH6 chip,
encryption support).
For a quick start with the STM32 F2 series, starter kits are available from IAR and
Keil, along with an EvoPrimer from Raisonance. Respective order codes are
STM3220G-SK/IAR, STM3220G-SK/KEI and STM3220G-PRIMER.
Java for STM32
With the STM32 F2 series, start developing embedded applications in Java. Benefit from the highly-optimized STM32 Java
virtual machine to increase software engineering productivity.
Order code: STM3220G-JAVA
Note:
1. Contact your local ST sales office.
6
Device summary
Flash Internal
RAM
size
size
(Kbytes) (Kbytes)
Timer functions
16‑bit
(IC/OC/
PWM)
DAC
Supply current (ICC)
Lowest Run mode Temperature
(°C)
power
mode (µA) (µA/MHz)
Package
STM32F205RB
LQFP64
(10x10)
128
64
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
51(51)
1.8 to 3.6
2.5
188
-40 to +85 or
‑40 to +105
STM32F205RC
LQFP64
(10x10)
256
96
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
51(51)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205RE
LQFP64
(10x10)
WLCSP64
(less than
4x4)
512
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
51(51)
1.73/1.8
to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F215RE2
LQFP64
(10x10)
512
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
51(51)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205RF
LQFP64
(10x10)
768
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
51(51)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205RG
LQFP64
(10x10),
WLCSP64
(less than
4x4)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
51(51)
1.73/1.8
to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F215RG2
LQFP64
(10x10)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
51(51)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205VB
LQFP100
(14x14)
128
64
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205VC
LQFP100
(14x14)
256
96
STM32F205VE
LQFP100
(14x14)
512
128
STM32F215VE2
LQFP100
(14x14)
512
STM32F205VF
LQFP100
(14x14)
STM32F205VG
Others
ADC
I/Os
Supply
(high Serial interface voltage
current)
(V)
Part number
STM32F205/215 – 120 MHz CPU, 1x USB OTG (FS/HS1), crypto/hash processor2
2x12‑bit
128
12x16‑bit 2x32‑bit
(24/24/30) timers (8/8/8), 16x12‑bit
2x WDG,
12x16‑bit RTC, 24‑bit
(24/24/30) down counter, 16x12‑bit
2x16‑bit basic
12x16‑bit timers
16x12‑bit
(24/24/30)
2.5
188
‑40 to +85 or
‑40 to +105
2.5
188
‑40 to +85 or
‑40 to +105
2x12‑bit
3xSPI,
82(82) 2xI²S, 3xI²C,
1.8 to 3.6
3xUSART (IrDa,
ISO 7816),
82(82) 3xUART, 1xUSB 1.8 to 3.6
OTG FS/HS,
2xCAN, SDIO
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
768
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
LQFP100
(14x14)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F215VG2
LQFP100
(14x14)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205ZC
LQFP144
(20x20)
256
96
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205ZE
LQFP144
(20x20)
512
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F215ZE2
LQFP144
(20x20)
512
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205ZF
LQFP144
(20x20)
768
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F205ZG
LQFP144
(20x20)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F215ZG2
LQFP144
(20x20)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
2x12‑bit
7
Device summary
Part number
Package
Flash Internal
RAM
size
size
(Kbytes) (Kbytes)
Timer functions
16‑bit
(IC/OC/
PWM)
Others
ADC
DAC
I/Os
Supply
(high Serial interface voltage
current)
(V)
Supply current (ICC)
Lowest Run mode Temperature
(°C)
power
mode (µA) (µA/MHz)
STM32F207/217 – 120 MHz CPU, 2x USB OTG (FS + FS/HS1), camera IF, crypto/hash processor2
STM32F207VC
LQFP100
(14x14)
256
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207VE
LQFP100
(14x14)
512
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F217VE2
LQFP100
(14x14)
512
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207VF
LQFP100
(14x14)
768
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207VG
LQFP100
(14x14)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F217VG2
LQFP100
(14x14)
1024
128
12x16‑bit
(24/24/30)
16x12‑bit
2x12‑bit
82(82)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207ZC
LQFP144
(20x20)
256
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207ZE
LQFP144
(20x20)
512
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 114(114)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F217ZE2
LQFP144
(20x20)
512
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 114(114)
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207ZF
LQFP144
(20x20)
768
128
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207ZG
LQFP144
(20x20)
1024
128
2.5
188
‑40 to +85 or
‑40 to +105
STM32F217ZG2
LQFP144
(20x20)
1024
128
12x16‑bit 2x32‑bit
(24/24/30) timers (8/8/8), 24x12‑bit
2x WDG,
12x16‑bit RTC, 24‑bit
(24/24/30) down counter, 24x12‑bit
2x16‑bit basic
12x16‑bit timers
24x12‑bit
(24/24/30)
1.8 to 3.6
3xSPI,
2xI²S, 3xI²C,
2x12‑bit 114(114) 3xUSART (IrDa, 1.8 to 3.6
ISO 7816),
3xUART, 2xUSB
2x12‑bit 114(114) OTG (FS +FS/ 1.8 to 3.6
HS), 2xCAN,
Ethernet
2x12‑bit 114(114) MAC10/100,
1.8 to 3.6
SDIO
2.5
188
‑40 to +85 or
‑40 to +105
256
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 140(140)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
512
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 140(140)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
512
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 140(140)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
768
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 140(140)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
1024
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 140(140)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
1024
128
12x16‑bit
(24/24/30)
24x12‑bit
2x12‑bit 140(140)
1.8 to 3.6
2.5
188
‑40 to +85 or
‑40 to +105
STM32F207IC
STM32F207IE
STM32F217IE2
STM32F207IF
STM32F207IG
STM32F217IG2
UFBGA176
(10x10)
LQFP176
(24x24)
UFBGA176
(10x10)
LQFP176
(24x24)
UFBGA176
(10x10)
LQFP176
(24x24)
UFBGA176
(10x10)
LQFP176
(24x24)
UFBGA176
(10x10)
LQFP176
(24x24))
UFBGA176
(10x10)
LQFP176
(24x24)
Notes:
1. HS requires an external PHY connected to ULPI interface
2. Crypto/hash processor on STM32F217 and STM32F215
3. 1.7 V min on WLCSP64 package only, 1.8 V min on other packages
Dedicated part numbers are available to support Java and MP3 software subject to royalties. Please check online for more information
© STMicroelectronics - September 2011 - Printed in United Kingdom - All rights reserved
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All other names are the property of their respective owners
Order code: BRSTM32F20811
For more information on ST products and solutions, visit www.st.com
