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STM32F302C8T6

STM32F302C8T6

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    LQFP48_7X7MM

  • 描述:

    Arm®Cortex®-M4 32位MCU+FPU,高达64 KB闪存、16 KB SRAM、ADC、DAC、USB、CAN、COMP、运算放大器,2V-3.6 V

  • 数据手册
  • 价格&库存
STM32F302C8T6 数据手册
STM32F302x6 STM32F302x8 ARM® Cortex®-M4 32-bit MCU+FPU, up to 64 KB Flash, 16 KB SRAM, ADC, DAC, USB, CAN, COMP, Op-Amp, 2.0 - 3.6 V Datasheet - production data Features • Core: ARM® 32-bit Cortex®-M4 CPU with FPU (72 MHz max.), single-cycle multiplication and HW division, DSP instruction • Memories – 32 to 64 Kbytes of Flash memory – 16 Kbytes of SRAM on data bus • Reset and power management – VDD, VDDA voltage range: 2.0 to 3.6 V – Power-on/Power down reset (POR/PDR) – Programmable voltage detector (PVD) – Low-power: Sleep, Stop, and Standby – VBAT supply for RTC and backup registers • Clock management – 4 to 32 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – Internal 8 MHz RC with x 16 PLL option – Internal 40 kHz oscillator • Up to 51 fast I/O ports, all mappable on external interrupt vectors, several 5 V-tolerant • Interconnect matrix • 7-channel DMA controller supporting timers, ADCs, SPIs, I2Cs, USARTs and DAC • 1 × ADC 0.20 μs (up to 15 channels) with selectable resolution of 12/10/8/6 bits, 0 to 3.6 V conversion range, single ended/differential mode, separate analog supply from 2.0 to 3.6 V • Temperature sensor • 1 x 12-bit DAC channel with analog supply from 2.4 to 3.6 V • Three fast rail-to-rail analog comparators with analog supply from 2.0 to 3.6 V • 1 x operational amplifier that can be used in PGA mode, all terminal accessible with analog supply from 2.4 to 3.6 V This is information on a product in full production. UFQFPN32 (5x5 mm) WLCSP49 (3.417x3.151 mm) • Up to 18 capacitive sensing channels supporting touchkey, linear and rotary sensors • CRC calculation unit June 2017 LQFP48 (7x7 mm) LQFP64 (10x10 mm) • Up to 9 timers – One 32-bit timer with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input – One 16-bit 6-channel advanced-control timer, with up to 6 PWM channels, deadtime generation and emergency stop – Three 16-bit timers with IC/OC/OCN or PWM, deadtime gen. and emergency stop – One 16-bit basic timer to drive the DAC – 2 watchdog timers (independent, window) – SysTick timer: 24-bit downcounter • Calendar RTC with alarm, periodic wakeup from Stop/Standby • Communication interfaces – Three I2Cs with 20 mA current sink to support Fast mode plus – Up to 3 USARTs, 1 with ISO 7816 I/F, auto baudrate detect and Dual clock domain – Up to two SPIs with multiplexed full duplex I2S – USB 2.0 full-speed interface – 1 x CAN interface (2.0B Active) – Infrared transmitter • Serial wire debug (SWD), JTAG • 96-bit unique ID Table 1. Device summary Reference Part number STM32F302x6 STM32F302R6, STM32F302C6, STM32F302K6 STM32F302x8 STM32F302R8, STM32F302C8, STM32F302K8 DocID025147 Rev 7 1/138 www.st.com Contents STM32F302x6 STM32F302x8 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 ARM® Cortex®-M4 core with FPU, embedded Flash and SRAM . . . . . . . 13 3.2 Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2.1 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2.2 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.3 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.4 Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 14 3.5 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.5.4 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.7 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.8 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.9 Direct memory access (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.10 Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.10.1 3.11 2/138 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 19 Fast analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.11.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.11.2 Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.11.3 VBAT battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.12 Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.13 Operational amplifier (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.14 Ultra-fast comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.15 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.15.1 Advanced timer (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.15.2 General-purpose timers (TIM2, TIM15, TIM16, TIM17) . . . . . . . . . . . . . 23 3.15.3 Basic timer (TIM6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 DocID025147 Rev 7 STM32F302x6 STM32F302x8 Contents 3.15.4 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.15.5 Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.15.6 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.16 Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 24 3.17 Inter-integrated circuit interfaces (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.18 Universal synchronous/asynchronous receiver transmitter (USART) . . . 27 3.19 Serial peripheral interfaces (SPI)/Inter-integrated sound interfaces (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.20 Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.21 Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.22 Touch sensing controller (TSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.23 Infrared transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.24 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.24.1 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 31 4 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 6.3.2 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 59 6.3.3 Embedded reset and power control block characteristics . . . . . . . . . . . 59 6.3.4 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 6.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 6.3.6 Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 DocID025147 Rev 7 3/138 4 Contents 7 STM32F302x6 STM32F302x8 6.3.7 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.3.8 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 6.3.9 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.3.10 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 6.3.11 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 6.3.12 Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.3.13 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.3.14 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.3.15 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 6.3.16 Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 6.3.17 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 6.3.18 ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 6.3.19 DAC electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 6.3.20 Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 6.3.21 Operational amplifier characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 114 6.3.22 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 6.3.23 VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 7.1 WLCSP49 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119 7.2 LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 7.3 LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 7.4 UFQFPN32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 7.5 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 7.5.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 7.5.2 Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . 133 8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 4/138 DocID025147 Rev 7 STM32F302x6 STM32F302x8 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 STM32F302x6/8 device features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . 11 External analog supply values for analog peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 STM32F302x6/8 peripheral interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 STM32F302x6/8 I2C implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 USART features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 STM32F302x6/8 SPI/I2S implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Capacitive sensing GPIOs available on STM32F302x6/8 devices . . . . . . . . . . . . . . . . . . . 29 No. of capacitive sensing channels available on STM32F302x6/8 devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 STM32F302x6/8 pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Alternate functions for Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Alternate functions for Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Alternate functions for Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Alternate functions for Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Alternate functions for Port F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 STM32F302x6 STM32F302x8 peripheral register boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 59 Programmable voltage detector characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Internal reference voltage calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Typical and maximum current consumption from VDD supply at VDD = 3.6V . . . . . . . . . . 62 Typical and maximum current consumption from the VDDA supply . . . . . . . . . . . . . . . . . . 64 Typical and maximum VDD consumption in Stop and Standby modes. . . . . . . . . . . . . . . . 64 Typical and maximum VDDA consumption in Stop and Standby modes. . . . . . . . . . . . . . . 65 Typical and maximum current consumption from VBAT supply. . . . . . . . . . . . . . . . . . . . . . 65 Typical current consumption in Run mode, code with data processing running from Flash 67 Typical current consumption in Sleep mode, code running from Flash or RAM . . . . . . . . . 68 Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 DocID025147 Rev 7 5/138 6 List of tables Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. 6/138 STM32F302x6 STM32F302x8 Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 IWDG min/max timeout period at 40 kHz (LSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 WWDG min-max timeout value @72 MHz (PCLK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 I2C analog filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 I2S characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 USB startup time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 USB: Full-speed electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Maximum ADC RAIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 ADC accuracy - limited test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Operational amplifier characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 WLCSP49 - 49-pin, 3.417 x 3.151 mm, 0.4 mm pitch wafer level chip scale package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 WLCSP49 recommended PCB design rules (0.4 mm pitch) . . . . . . . . . . . . . . . . . . . . . . 121 LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 DocID025147 Rev 7 STM32F302x6 STM32F302x8 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. DS9896 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Infrared transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 STM32F302x6/8 UFQFN32 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 STM32F302x6/8 LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 STM32F302x6/8 LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 STM32F302x6/8 WLCSP49 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 STM32F302x6/8 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Typical VBAT current consumption (LSE and RTC ON/LSEDRV[1:0] = ‘00’) . . . . . . . . . . . 66 High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 HSI oscillator accuracy characterization results for soldered parts . . . . . . . . . . . . . . . . . . 80 TC and TTa I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 TC and TTa I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Five volt tolerant (FT and FTf) I/O input characteristics - CMOS port. . . . . . . . . . . . . . . . . 88 Five volt tolerant (FT and FTf) I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . 88 I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 I2S slave timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 I2S master timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . 100 ADC typical current consumption in single-ended and differential modes . . . . . . . . . . . . 104 ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Maximum VREFINT scaler startup time from power down . . . . . . . . . . . . . . . . . . . . . . . . . 113 OPAMP Voltage Noise versus Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 WLCSP49 - 49-pin, 3.417 x 3.151 mm, 0.4 mm pitch wafer level chip scale package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 WLCSP49 - 49-pin, 3.417 x 3.151 mm, 0.4 mm pitch wafer level chip scale package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 WLCSP49 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . 122 LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 LQFP64 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . . . 125 LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 DocID025147 Rev 7 7/138 8 List of figures Figure 45. Figure 46. Figure 47. Figure 48. 8/138 STM32F302x6 STM32F302x8 LQFP48 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 UFQFPN32 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 DocID025147 Rev 7 STM32F302x6 STM32F302x8 1 Introduction Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F302x6/8 microcontrollers. This datasheet should be read in conjunction with the STM32F302xB/C/D/E and STM32F302x6/8 advanced ARM®-based 32-bit MCUs reference manual (RM0365). The reference manual is available from the STMicroelectronics website www.st.com. For information on the ARM® Cortex®-M4 core, please refer to the Cortex®-M4 Technical Reference Manual, available from ARM website www.arm.com. DocID025147 Rev 7 9/138 52 Description 2 STM32F302x6 STM32F302x8 Description The STM32F302x6/8 family is based on the high-performance ARM® Cortex®-M4 32-bit RISC core operating at a frequency of up to 72 MHz and embedding a floating point unit (FPU). The family incorporates high-speed embedded memories (up to 64 Kbytes of Flash memory, 16 Kbytes of SRAM), and an extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer a fast 12-bit ADC (5 Msps), three comparators, an operational amplifier, up to 18 capacitive sensing channels, one DAC channel, a low-power RTC, one generalpurpose 32-bit timer, one timer dedicated to motor control, and up to three general-purpose 16-bit timers, and one timer to drive the DAC. They also feature standard and advanced communication interfaces: three I2Cs, up to three USARTs, up to two SPIs with multiplexed full-duplex I2S, a USB FS device, a CAN, and an infrared transmitter. The STM32F302x6/8 family operates in the –40 to +85°C and –40 to +105°C temperature ranges from at a 2.0 to 3.6 V power supply. A comprehensive set of power-saving mode allows the design of low-power applications. The STM32F302x6/8 family offers devices in 32-, 48-, 49- and 64-pin packages. The set of included peripherals changes with the device chosen. 10/138 DocID025147 Rev 7 STM32F302x6 STM32F302x8 Description Table 2. STM32F302x6/8 device features and peripheral counts Peripheral STM32F302Kx Flash (Kbytes) 32 64 SRAM (Kbytes) Timers 32 STM32F302Rx 64 32 64 16 Advanced control 1 (16-bit) General purpose 3 (16-bit) 1 (32 bit) Basic 1 SysTick timer 1 Watchdog timers (independent, window) 2 PWM channels (all)(1) 16 18 PWM channels (except complementary) 10 12 SPI/I2S 2 2C 3 I Comm. interfaces USART GPIOs STM32F302Cx 2 3 USB 2.0 FS 1 CAN 2.0B 1 Normal I/Os (TC, TTa) 9 20 26 5-Volt tolerant I/Os (FT, FT1) 15 17 25 DMA channels 7 Capacitive sensing channels 13 17 18 12-bit ADC Number of channels 1 8 1 11 1 15 12-bit DAC channels Analog comparator 1 2 3 Operational amplifier 1 CPU frequency 72 MHz Operating voltage Operating temperature Packages 3 2.0 to 3.6 V Ambient operating temperature: - 40 to 85 °C / - 40 to 105 °C Junction temperature: - 40 to 125 °C UFQFPN32 LQFP48, WLCSP49 LQFP64 1. This total number considers also the PWMs generated on the complementary output channels. DocID025147 Rev 7 11/138 52 Description STM32F302x6 STM32F302x8 Figure 1. DS9896 block diagram 73,8 9ROWDJHUHJ 9WR9 2%/ ,EXV &RUWH[0&38 )ODVK LQWHUIDFH )38 )PD[0+] 6\VWHP 19,& 65$0 .% 325 6XSSO\ 6XSHUYLVLRQ 5HVHW ,QW 3253'5 39' 5&+60+] ;7$/26& 0+] ,QG:'*. 6WDQGE\ LQWHUIDFH $+%3&/. 7HPSVHQVRU $3%3&/. ,) 5HVHW  FORFN FRQWURO *3,23257% 3&>@ *3,23257& 3'>@ *3,23257' 3)>@ *3,23257) 7,0(5 &KDQQHO&RPS &KDQQHO%5.DV$) 7,0(5 &KDQQHO&RPS &KDQQHO%5.DV$) 7,0(5 &KDQQHOV &RPSFKDQQHOV (75%5.DV$) 5;7;&76576 6PDUW&DUGDV$) ;7$/N+] %DFNXS 57& 5HJ $:8 %\WH %DFNXS LQWHUIDFH 86$57&/. ,&&/. $'&6$5 &/. 7,0(5 ELW3:0 &5& 7,0(53:0 86$57 $+% $3% 9%$7 9WR9 26&B,1 26&B287 $17,7$03 &KDQQHOV(75DV$) 63,,6 026,0,62 6&.166DV$) 63,,6 026,0,62 6&.166DV$) 86$57 5;7;&76576DV$) 86$57 5;7;&76576DV$) ,& 6&/6'$60%$DV$) ,& 6&/6'$60%$DV$) ,& 6&/6'$60%$DV$) :LQ:$7&+'2* E[&$1 65$0IRU86%DQG &$1.% 86%)6 7,0(5 ,) ELW'$& &$17;&$15; 86%B'386%B'0 '$&B&+ #9''$ 6@ *URXSVRI FKDQQHOVDV$) $+%GHFRGHU 3$>@ ELW$'& #9'',2 5&/6 3// 95() 95() 15(6(7 9''$ 966$ #9''$ #9''$ *3'0$ FKDQQHOV 9'',2 WR9 966 #9'',2 )/$6+.% ELWV 'EXV %XV0DWUL[ -7567 -7', -7&.6:&/. -7066:',2 -7'2 $V$) 3RZHU 9'' 6:-7$* 2S$PS ,1[[287[[ #9''$ ;[,QV287VDV$) 069 1. AF: alternate function on I/O pins. 12/138 DocID025147 Rev 7 STM32F302x6 STM32F302x8 Functional overview 3 Functional overview 3.1 ARM® Cortex®-M4 core with FPU, embedded Flash and SRAM The ARM® Cortex®-M4 processor with FPU is the latest generation of ARM processors for embedded systems. It was developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced response to interrupts. The ARM® Cortex®-M4 32-bit RISC processor with FPU features exceptional codeefficiency, delivering the high-performance expected from an ARM core in the memory size usually associated with 8- and 16-bit devices. The processor supports a set of DSP instructions which allow efficient signal processing and complex algorithm execution. Its single-precision FPU speeds up software development by using metalanguage development tools while avoiding saturation. With its embedded ARM core, the STM32F302x6/8 family is compatible with all ARM tools and software. Figure 1 shows the general block diagram of the STM32F302x6/8 family devices. 3.2 Memories 3.2.1 Embedded Flash memory All STM32F302x6/8 devices feature up to 64 Kbytes of embedded Flash memory available for storing programs and data. The Flash memory access time is adjusted to the CPU clock frequency (0 wait state from 0 to 24 MHz, 1 wait state from 24 to 48 MHz and 2 wait states above). 3.2.2 Embedded SRAM STM32F302x6/8 devices feature 16 Kbytes of embedded SRAM. 3.3 Boot modes At startup, BOOT0 pin and BOOT1 option bit are used to select one of three boot options: • Boot from user Flash • Boot from system memory • Boot from embedded SRAM The boot loader is located in system memory. It is used to reprogram the Flash memory by using USART1 (PA9/PA10), USART2 (PA2/PA3) or USB (PA11/PA12) through DFU (device firmware upgrade). DocID025147 Rev 7 13/138 52 Functional overview 3.4 STM32F302x6 STM32F302x8 Cyclic redundancy check calculation unit (CRC) The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a configurable generator polynomial value and size. Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of the software during runtime, to be compared with a reference signature generated at linktime and stored at a given memory location. 3.5 Power management 3.5.1 Power supply schemes • VSS, VDD = 2.0 to 3.6 V: external power supply for I/Os and the internal regulator. It is provided externally through VDD pins. • VSSA, VDDA = 2.0 to 3.6 V: external analog power supply for ADC, DAC, comparators, operational amplifier, reset blocks, RCs and PLL. The minimum voltage to be applied to VDDA differs from one analog peripheral to another. Table 3 provides the summary of the VDDA ranges for analog peripherals. The VDDA voltage level must always be greater than or equal to the VDD voltage level and must be provided first. Table 3. External analog supply values for analog peripherals Analog peripheral • 3.5.2 Minimum VDDA supply Maximum VDDA supply ADC/COMP 2.0 V 3.6 V DAC/OPAMP 2.4 V 3.6 V VBAT = 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup registers (through power switch) when VDD is not present. Power supply supervisor The device has an integrated power-on reset (POR) and power-down reset (PDR) circuits. They are always active, and ensure proper operation above a threshold of 2 V. The device remains in reset mode when the monitored supply voltage is below a specified threshold, VPOR/PDR, without the need for an external reset circuit. • The POR monitors only the VDD supply voltage. During the startup phase it is required that VDDA should arrive first and be greater than or equal to VDD. • The PDR monitors both the VDD and VDDA supply voltages, however the VDDA power supply supervisor can be disabled (by programming a dedicated Option bit) to reduce the power consumption if the application design ensures that VDDA is higher than or equal to VDD. The device features an embedded programmable voltage detector (PVD) that monitors the VDD power supply and compares it to the VPVD threshold. An interrupt can be generated when VDD drops below the VPVD threshold and/or when VDD is higher than the VPVD threshold. The interrupt service routine can then generate a warning message and/or put the MCU into a safe state. The PVD is enabled by software. 14/138 DocID025147 Rev 7 STM32F302x6 STM32F302x8 3.5.3 Functional overview Voltage regulator The regulator has three operation modes: main (MR), low-power (LPR), and power-down. • The MR mode is used in the nominal regulation mode (Run) • The LPR mode is used in Stop mode. • The power-down mode is used in Standby mode: the regulator output is in high impedance, and the kernel circuitry is powered down thus inducing zero consumption. The voltage regulator is always enabled after reset. It is disabled in Standby mode. 3.5.4 Low-power modes The STM32F302x6/8 supports three low-power modes to achieve the best compromise between low power consumption, short startup time and available wakeup sources: • Sleep mode In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU when an interrupt/event occurs. • Stop mode Stop mode achieves the lowest power consumption while retaining the content of SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC and the HSE crystal oscillators are disabled. The voltage regulator can also be put either in normal or in low-power mode. The device can be woken up from Stop mode by any of the EXTI line. The EXTI line source can be one of the 16 external lines, the PVD output, the USB wakeup, the RTC alarm, COMPx, I2C or USARTx. • Standby mode The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is switched off so that the entire 1.8 V domain is powered off. The PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering Standby mode, SRAM and register contents are lost except for registers in the Backup domain and Standby circuitry. The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pin, or an RTC alarm occurs. Note: The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop or Standby mode. 3.6 Interconnect matrix Several peripherals have direct connections between them. This allows autonomous communication between peripherals, saving CPU resources thus power supply consumption. In addition, these hardware connections allow fast and predictable latency. DocID025147 Rev 7 15/138 52 Functional overview STM32F302x6 STM32F302x8 Table 4. STM32F302x6/8 peripheral interconnect matrix Interconnect source 16/138 Interconnect action TIMx Timers synchronization or chaining ADC1 DAC1 Conversion triggers DMA Memory to memory transfer trigger Compx Comparator output blanking COMPx TIMx Timer input: OCREF_CLR input, input capture ADC1 TIM1 Timer triggered by analog watchdog GPIO RTCCLK HSE/32 MC0 TIM16 Clock source used as input channel for HSI and LSI calibration CSS CPU (hard fault) COMPx PVD GPIO TIM1 TIM15, 16, 17 Timer break TIMx Note: Interconnect destination TIMx External trigger, timer break GPIO ADC1 DAC1 Conversion external trigger DAC1 COMPx Comparator inverting input For more details about the interconnect actions, please refer to the corresponding sections in the STM32F302xx and STM32F302x6/8 reference manual RM0365. DocID025147 Rev 7 STM32F302x6 STM32F302x8 3.7 Functional overview Clocks and startup System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected as default CPU clock on reset. An external 4-32 MHz clock can be selected, in which case it is monitored for failure. If failure is detected, the system automatically switches back to the internal RC oscillator. A software interrupt is generated if enabled. Similarly, full interrupt management of the PLL clock entry is available when necessary (for example with failure of an indirectly used external oscillator). Several prescalers allow to configure the AHB frequency, the high speed APB (APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and the high speed APB domains is 72 MHz, while the maximum allowed frequency of the low speed APB domain is 36 MHz. The advanced clock controller clocks the core and all peripherals using a single crystal or oscillator. To achieve audio class performance, an audio crystal can be used. DocID025147 Rev 7 17/138 52 Functional overview STM32F302x6 STM32F302x8 Figure 2. Clock tree )/,7)&/. WR)ODVKSURJUDPPLQJLQWHUIDFH +6, WR,&[ [  6
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