STM32L011G4U7

STM32L011x3 STM32L011x4 Access line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0+, up to 16KB Flash, 2KB SRAM, 512B EEPROM, ADC Datasheet - production data Features • • • • • • • • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.23 µA Standby mode (2 wakeup pins) – 0.29 µA Stop mode (16 wakeup lines) – 0.54 µA Stop mode + RTC + 2 KB RAM retention – Down to 76 µA/MHz in Run mode – 5 µs wakeup time (from Flash memory) – 41 µA 12-bit ADC conversion at 10 ksps Core: Arm® 32-bit Cortex®-M0+ – From 32 kHz to 32 MHz max. – 0.95 DMIPS/MHz Reset and supply management – Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds – Ultralow power POR/PDR – Programmable voltage detector (PVD) Clock sources – 0 to 32 MHz external clock – 32 kHz oscillator for RTC with calibration – High speed internal 16 MHz factory-trimmed RC (+/- 1%) – Internal low-power 37 kHz RC – Internal multispeed low-power 65 kHz to 4.2 MHz RC – PLL for CPU clock Pre-programmed bootloader – USART, SPI supported Development support – Serial wire debug supported Up to 28 fast I/Os (23 I/Os 5V tolerant) TSSOP14/20 UFQFPN20 3x3 mm 169 mils UFQFPN28 4x4 mm UFQFPN32 5x5 mm This is information on a product in full production. WLCSP25 2.133x2.070 mm – • • Rich Analog peripherals – 12-bit ADC 1.14 Msps up to 10 channels (down to 1.65 V) – 2x ultra-low-power comparators (window mode and wake up capability, down to 1.65 V) 5-channel DMA controller, supporting ADC, SPI, I2C, USART, Timers • 4x peripherals communication interface • 1x USART (ISO 7816, IrDA), 1x UART (low power) • 1x SPI 16 Mbits/s • 1x I2C (SMBus/PMBus) • 7x timers: 1x 16-bit with up to 4 channels, 1x 16-bit with up to 2 channels, 1x 16-bit ultra-low-power timer, 1x SysTick, 1x RTC and 2x watchdogs (independent/window) • CRC calculation unit, 96-bit unique ID • All packages are ECOPACK®2 Table 1. Device summary Reference Part number STM32L011x3 STM32L011G3, STM32L011K3, STM32L011E3, STM32L011F3, STM32L011D3 STM32L011x4 STM32L011G4, STM32L011K4, STM32L011E4, STM32L011F4, STM32L011D4 Memories – Up to 16 KB Flash memory with ECC – 2 KB RAM – 512 B of data EEPROM with ECC – 20-byte backup register – Sector protection against R/W operation September 2017 LQFP32 7x7 mm DocID027973 Rev 5 1/119 www.st.com Contents STM32L011x3/4 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.2 Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2 Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 Arm® Cortex®-M0+ core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4 Reset and supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.4 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.5 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.6 Low-power real-time clock and backup registers . . . . . . . . . . . . . . . . . . . 24 3.7 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.8 Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.9 Direct memory access (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.10 Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.11 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.11.1 3.12 Ultra-low-power comparators and reference voltage . . . . . . . . . . . . . . . . 27 3.13 System configuration controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.14 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.15 2/119 Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.14.1 General-purpose timers (TIM2, TIM21) . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.14.2 Low-power Timer (LPTIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.14.3 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.14.4 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.14.5 Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 DocID027973 Rev 5 STM32L011x3/4 Contents 3.15.1 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.15.2 Universal synchronous/asynchronous receiver transmitter (USART) . . 30 3.15.3 Low-power universal asynchronous receiver transmitter (LPUART) . . . 31 3.15.4 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.16 Cyclic redundancy check (CRC) calculation unit . . . . . . . . . . . . . . . . . . . 31 3.17 Serial wire debug port (SW-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6.3.2 Embedded reset and power control block characteristics . . . . . . . . . . . 49 6.3.3 Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.3.4 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 6.3.5 Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 6.3.6 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 6.3.7 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 6.3.8 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 6.3.9 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 6.3.10 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 6.3.11 Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 6.3.12 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.3.13 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 6.3.14 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 6.3.15 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 DocID027973 Rev 5 3/119 4 Contents 7 STM32L011x3/4 6.3.16 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.3.17 Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.3.18 Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.3.19 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 7.1 LQFP32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 7.2 UFQFPN32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 7.3 WLCSP25 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 7.4 UFQFPN28 4 x 4 mm package information . . . . . . . . . . . . . . . . . . . . . . 103 7.5 UFQFPN20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 7.6 TSSOP20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 7.7 TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112 7.8 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113 7.8.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 4/119 DocID027973 Rev 5 STM32L011x3/4 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ultra-low-power STM32L011x3/x4 device features and peripheral counts. . . . . . . . . . . . . 11 Functionalities depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . 16 CPU frequency range depending on dynamic voltage scaling . . . . . . . . . . . . . . . . . . . . . . 16 Functionalities depending on the working mode (from Run/active down to standby) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 STM32L011x3/4 peripherals interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 STM32L011x3/4 I2C implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 USART implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 SPI implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 49 Embedded internal reference voltage calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Current consumption in Run mode, code with data processing running from Flash. . . . . . 53 Current consumption in Run mode vs code type, code with data processing running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Current consumption in Run mode, code with data processing running from RAM . . . . . . 55 Current consumption in Run mode vs code type, code with data processing running from RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Current consumption in Low-power Run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Current consumption in Low-power Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Typical and maximum current consumptions in Stop mode . . . . . . . . . . . . . . . . . . . . . . . . 59 Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . . 60 Average current consumption during wakeup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Peripheral current consumption in run or Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Peripheral current consumption in Stop and Standby mode . . . . . . . . . . . . . . . . . . . . . . . 62 Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 LSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 16 MHz HSI16 oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 MSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Flash memory and data EEPROM characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Flash memory and data EEPROM endurance and retention . . . . . . . . . . . . . . . . . . . . . . . 71 EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 DocID027973 Rev 5 5/119 6 List of tables Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. 6/119 STM32L011x3/4 EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 RAIN max for fADC = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Comparator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Comparator 2 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 I2C analog filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 I2C frequency in all I2C modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 SPI characteristics in voltage Range 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 SPI characteristics in voltage Range 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SPI characteristics in voltage Range 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 LQFP32 - 32-pin, 7 x 7 mm, 32-pin low-profile quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 WLCSP25 - 25-ball, 2.133 x 2.070 mm, 0.4 mm pitch wafer level chip scale package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 WLCSP25 recommended PCB design rules (0.4 mm pitch) . . . . . . . . . . . . . . . . . . . . . . 101 UFQFPN28 - 28-lead, 4x4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 UFQFPN20 - 20-lead, 3x3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 TSSOP14 – 14-lead thin shrink small outline, 5 x 4.4 mm, 0.65 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 STM32L011x3/4 ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 DocID027973 Rev 5 STM32L011x3/4 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. STM32L011x3/4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 STM32L011x3/4 LQFP32 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 STM32L011x3/4 UFQFPN32 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 STM32L011x3/4 WLCSP25 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 STM32L011x3/4 UFQFPN28 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 STM32L011x3/4 UFQFPN20 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 STM32L011x3/4 TSSOP20 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 STM32L011x3/4 TSSOP14 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 IDD vs VDD, at TA= 25 °C, Run mode, code running from Flash memory, Range 2, 16 MHz HSE, 1WS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 IDD vs VDD, at TA= 25 °C, Run mode, code running from Flash memory, Range 2, HSI16, 1WS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 IDD vs VDD, at TA= -40/25/55/ 85/105/125 °C, Low-power run mode, code running from RAM, Range 3, MSI (Range 0) at 64 KHz, 0 WS . . . . . . . . . . . . . . . . . 58 IDD vs VDD, at TA= -40/25/55/ 85/105/125 °C, Stop mode with RTC enabled and running on LSE Low drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 IDD vs VDD, at TA= -40/25/55/85/105/125 °C, Stop mode with RTC disabled, all clocks OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 HSI16 minimum and maximum value versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . 67 VIH/VIL versus VDD (CMOS I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 VIH/VIL versus VDD (TTL I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 LQFP32 - 32-pin, 7 x 7 mm, 32-pin low-profile quad flat package outline . . . . . . . . . . . . . 94 LQFP32 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Example of LQFP32 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 UFQFPN32 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Example of UFQFPN32 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 WLCSP25 - 25-ball, 2.133 x 2.070 mm, 0.4 mm pitch wafer level chip scale package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 WLCSP25 - 25-ball, 2.133 x 2.070 mm, 0.4 mm pitch wafer level chip scale package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Example of WLCSP25 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 DocID027973 Rev 5 7/119 8 List of figures Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. Figure 50. Figure 51. Figure 52. 8/119 STM32L011x3/4 UFQFPN28 - 28-lead, 4x4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 UFQFPN28 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Example of UFQFPN28 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 UFQFPN20 - 20-lead, 3x3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 UFQFPN20 - 20-lead, 3x3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Example of UFQFPN20 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 Example of TSSOP20 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 TSSOP14 – 14-lead thin shrink small outline, 5.0 x 4.4 mm, 0.65 mm pitch, package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Example of TSSOP14 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 DocID027973 Rev 5 STM32L011x3/4 1 Introduction Introduction The ultra-low-power STM32L011x3/4 family includes devices in 7 different package types from 14 to 32 pins. The description below gives an overview of the complete range of peripherals proposed in this family. These features make the ultra-low-power STM32L011x3/4 microcontrollers suitable for a wide range of applications: • Gas/water meters and industrial sensors • Healthcare and fitness equipment • Remote control and user interface • PC peripherals, gaming, GPS equipment • Alarm system, wired and wireless sensors, video intercom This STM32L011x3/4 datasheet should be read in conjunction with the STM32L0x1 reference manual (RM0377). For information on the Arm® Cortex®-M0+ core please refer to the Cortex®-M0+ Technical Reference Manual, available from the www.arm.com website. Figure 1 shows the general block diagram of the device family. DocID027973 Rev 5 9/119 32 Description 2 STM32L011x3/4 Description The access line ultra-low-power STM32L011x3/4 family incorporates the high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at a 32 MHz frequency, high-speed embedded memories (up to 16 Kbytes of Flash program memory, 512 bytes of data EEPROM and 2 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals. The STM32L011x3/4 devices provide high power efficiency for a wide range of performance. It is achieved with a large choice of internal and external clock sources, an internal voltage adaptation and several low-power modes. The STM32L011x3/4 devices offer several analog features, one 12-bit ADC with hardware oversampling, two ultra-low-power comparators, several timers, one low-power timer (LPTIM), three general-purpose 16-bit timers, one RTC and one SysTick which can be used as timebases. They also feature two watchdogs, one watchdog with independent clock and window capability and one window watchdog based on bus clock. Moreover, the STM32L011x3/4 devices embed standard and advanced communication interfaces: one I2C, one SPI, one USART, and a low-power UART (LPUART). The STM32L011x3/4 also include a real-time clock and a set of backup registers that remain powered in Standby mode. The ultra-low-power STM32L011x3/4 devices operate from a 1.8 to 3.6 V power supply (down to 1.65 V at power down) with BOR and from a 1.65 to 3.6 V power supply without BOR option. They are available in the -40 to +125 °C temperature range. A comprehensive set of power-saving modes allows the design of low-power applications. 10/119 DocID027973 Rev 5 STM32L011x3/4 2.1 Description Device overview Table 2. Ultra-low-power STM32L011x3/x4 device features and peripheral counts Peripheral STM32 L011D3 STM32 L011F3 Flash (Kbytes) STM32 L011E3 STM32 L011G3 STM32 L011K3 STM32 L011G4 STM32 L011K4 24 26/28(1) 512 2 Generalpurpose 2 LPTIM 1 RTC/SYSTICK/IWDG/ WWDG 1/1/1/1 SPI 1 I2 C 1 USART 1 LPUART 1 GPIOs 11 16 21 24 Clocks: HSE(2)/LSE/HSI/MSI/LSI 12b synchronized ADC Number of channels 26/28(1) 11 16 21 1/1/1/1/1 1 4 1 7/9(3) 1 10 1 4 Comparators 1 7/9(3) 1 10 2 Max. CPU frequency 32 MHz 1.8 V to 3.6 V (down to 1.65 V at power-down) with BOR option 1.65 V to 3.6 V without BOR option Operating voltage Ambient temperature: –40 to +125 °C Junction temperature: –40 to +130 °C Operating temperatures Packages STM32 L011E4 16 RAM (Kbytes) Communication interfaces STM32 L011F4 8 Data EEPROM (bytes) Timers STM32 L011D4 TSSOP 14 LQFP/, TSSOP/ LQFP/ TSSOP/ WLCSP UFQFPN TSSOP WLCSP UFQFPN UFQFPN UFQFPN UFQFPN UFQFPN 25 28 14 25 28 32 20 32 20 1. The devices feature 26 and 28 GPIOs on LQFP32 and UFQFPN32, respectively. 2. HSE available only as external clock input (HSE bypass). 3. The devices feature 7 and 9 ADC channels on UFQFPN20 and TSSOP20, respectively. DocID027973 Rev 5 11/119 32 Description STM32L011x3/4 Figure 1. STM32L011x3/4 block diagram 7HPS VHQVRU 6:' 6:' )/$6+ ((3520 %227 &257(;0&38 )PD[0+] $'& $,1[ 63, 0,62026, 6&.166 5$0 '%* '0$ 19,& (;7, $ 3 %  7,0 FK %5,'*( &203 ,13,10287 &203 ,13,10287 /37,0 ,1,1 (75287 &5& %5,'*( *3,23257$ 3%>@ *3,23257% 3&>@ *3,23257& &.B,1 +6( $+%)PD[0+] 3$>@ ::'* ,& $ 3 %  6&/6'$ 60%$ 86$57 5;7;576 &76&. /38$57 5;7;576 &76 +6,0 /6, ,:'* 3// 06, 7,0 FK 57& %&.35(* 5(6(7 &/. :.83[ 26&B,1 26&B287 /6( 39'B,1 95()B287 308 1567 9''$ 9'' 5(*8/$725 06Y9 12/119 DocID027973 Rev 5 STM32L011x3/4 2.2 Description Ultra-low-power device continuum The ultra-low-power family offers a large choice of core and features, from 8-bit proprietary core up to Arm® Cortex®-M4, including Arm® Cortex®-M3 and Arm® Cortex®-M0+. The STM32Lx series are the best choice to answer your needs in terms of ultra-low-power features. The STM32 Ultra-low-power series are the best solution for applications such as gas/water meter, keyboard/mouse or fitness and healthcare application. Several built-in features like LCD drivers, dual-bank memory, low-power Run mode, operational amplifiers, 128-bit AES, DAC, crystal-less USB and many other definitely help you building a highly cost optimized application by reducing BOM cost. STMicroelectronics, as a reliable and long-term manufacturer, ensures as much as possible pin-to-pin compatibility between all STM8Lx and STM32Lx on one hand, and between all STM32Lx and STM32Fx on the other hand. Thanks to this unprecedented scalability, your legacy application can be upgraded to respond to the latest market feature and efficiency requirements. DocID027973 Rev 5 13/119 32 Functional overview STM32L011x3/4 3 Functional overview 3.1 Low-power modes The ultra-low-power STM32L011x3/4 supports dynamic voltage scaling to optimize its power consumption in Run mode. The voltage from the internal low-drop regulator that supplies the logic can be adjusted according to the system’s maximum operating frequency and the external voltage supply. There are three power consumption ranges: • Range 1 (VDD range limited to 1.71-3.6 V), with the CPU running at up to 32 MHz • Range 2 (full VDD range), with a maximum CPU frequency of 16 MHz • Range 3 (full VDD range), with a maximum CPU frequency limited to 4.2 MHz Seven low-power modes are provided to achieve the best compromise between low-power consumption, short startup time and available wakeup sources: • Sleep mode In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU when an interrupt/event occurs. Sleep mode power consumption at 16 MHz is about 1 mA with all peripherals off. • Low-power run mode This mode is achieved with the multispeed internal (MSI) RC oscillator set to the lowspeed clock (max 131 kHz), execution from SRAM or Flash memory, and internal regulator in low-power mode to minimize the regulator's operating current. In Lowpower run mode, the clock frequency and the number of enabled peripherals are both limited. • Low-power sleep mode This mode is achieved by entering Sleep mode with the internal voltage regulator in low-power mode to minimize the regulator’s operating current. In Low-power sleep mode, both the clock frequency and the number of enabled peripherals are limited; a typical example would be to have a timer running at 32 kHz. When wakeup is triggered by an event or an interrupt, the system reverts to the Run mode with the regulator on. • Stop mode with RTC The Stop mode achieves the lowest power consumption while retaining the RAM and register contents and real time clock. All clocks in the VCORE domain are stopped, the PLL, MSI RC, HSE and HSI RC oscillators are disabled. The LSE or LSI is still running. The voltage regulator is in the low-power mode. Some peripherals featuring wakeup capability can enable the HSI RC during Stop mode to detect their wakeup condition. The device can be woken up from Stop mode by any of the EXTI line, in 3.5 µs, the processor can serve the interrupt or resume the code. The EXTI line source can be any GPIO. It can be the PVD output, the comparator 1 event or comparator 2 event 14/119 DocID027973 Rev 5 STM32L011x3/4 Functional overview (if internal reference voltage is on), it can be the RTC alarm/tamper/timestamp/wakeup events, the USART/I2C/LPUART/LPTIM wakeup events. • Stop mode without RTC The Stop mode achieves the lowest power consumption while retaining the RAM and register contents. All clocks are stopped, the PLL, MSI RC, HSI and LSI RC, HSE and LSE crystal oscillator are disabled. Some peripherals featuring wakeup capability can enable the HSI RC during Stop mode to detect their wakeup condition. The voltage regulator is in the low-power mode. The device can be woken up from Stop mode by any of the EXTI line, in 3.5 µs, the processor can serve the interrupt or resume the code. The EXTI line source can be any GPIO. It can be the PVD output, the comparator 1 event or comparator 2 event (if internal reference voltage is on). It can also be wakened by the USART/I2C/LPUART/LPTIM wakeup events. • Standby mode with RTC The Standby mode is used to achieve the lowest power consumption and real time clock. The internal voltage regulator is switched off so that the entire VCORE domain is powered off. The PLL, MSI RC, HSE bypass and HSI RC oscillators are also switched off. The LSE or LSI is still running. After entering Standby mode, the RAM and register contents are lost except for registers in the Standby circuitry (wakeup logic, IWDG, RTC, LSI, LSE Crystal 32 KHz oscillator, RCC_CSR register). The device exits Standby mode in 60 µs when an external reset (NRST pin), an IWDG reset, a rising edge on one of the three WKUP pins, RTC alarm (Alarm A or Alarm B), RTC tamper event, RTC timestamp event or RTC Wakeup event occurs. • Standby mode without RTC The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is switched off so that the entire VCORE domain is powered off. The PLL, MSI RC, HSI and LSI RC, HSE and LSE crystal oscillator are also switched off. After entering Standby mode, the RAM and register contents are lost except for registers in the Standby circuitry (wakeup logic, IWDG, RTC, LSI, LSE Crystal 32 KHz oscillator, RCC_CSR register). The device exits Standby mode in 60 µs when an external reset (NRST pin) or a rising edge on one of the three WKUP pin occurs. Note: The RTC, the IWDG, and the corresponding clock sources are not stopped automatically by entering Stop or Standby mode. DocID027973 Rev 5 15/119 32 Functional overview STM32L011x3/4 Table 3. Functionalities depending on the operating power supply range Functionalities depending on the operating power supply range Operating power supply range ADC operation Dynamic voltage scaling range VDD = 1.65 to 1.71 V ADC only, conversion time up to 570 ksps Range 2 or range 3 VDD = 1.71 to 1.8 V(1) ADC only, conversion time up to 1.14 Msps Range 1, range 2 or range 3 VDD = 1.8 to 2.0 V(1) Conversion time up to 1.14 Msps Range1, range 2 or range 3 VDD = 2.0 to 2.4 V Conversion time up to 1.14 Msps Range 1, range 2 or range 3 VDD = 2.4 to 3.6 V Conversion time up to 1.14 Msps Range 1, range 2 or range 3 1. CPU frequency changes from initial to final must respect the condition: fCPU initial 1.65 V and and TA > −10 °C TA > 25 °C VDD > 2.7 V VDD > 2.4 V VDD > 2.0 V VDD > 1.8 V VDD > 1.75 V 0.5 < 0.1 NA NA NA NA NA NA 0.22 1 0.2 < 0.1 NA NA NA NA NA 7.5 0.47 2.5 1.7 1.5 < 0.1 NA NA NA NA 12.5 0.78 4 3.2 3 1 NA NA NA NA 19.5 1.22 6.5 5.7 5.5 3.5 NA NA NA < 0.1 39.5 2.47 13 12.2 12 10 NA NA NA 5 79.5 4.97 27 26.2 26 24 < 0.1 NA NA 19 160.5 10.03 50 49.2 49 47 32 < 0.1 < 0.1 42 1. Guaranteed by design. Table 56. ADC accuracy(1)(2)(3)(4) Symbol Parameter Conditions Min Typ Max ET Total unadjusted error - 2 4 EO Offset error - 1 2.5 EG Gain error - 1 2 EL Integral linearity error - 1.5 2.5 ED Differential linearity error - 1 1.5 10.2 11 11.3 12.1 - Signal-to-noise distortion 62 67.8 - Effective number of bits ENOB SINAD Effective number of bits (16-bit mode oversampling with ratio =256)(5) 1.65 V < VDDA < 3.6 V, range 1/2/3, except for TSSOP14 package Signal-to-noise ratio 63 68 - SNR Signal-to-noise ratio (16-bit mode oversampling with ratio =256)(5) 70 76 - THD Total harmonic distortion - -81 -68.5 82/119 DocID027973 Rev 5 Unit LSB bits dB STM32L011x3/4 Electrical characteristics Table 56. ADC accuracy(1)(2)(3)(4) Symbol Parameter Conditions Min Typ Max ET Total unadjusted error - 3 5 EO Offset error - 2 2.5 EG Gain error - 2 2.5 EL Integral linearity error - 1.5 2.5 ED Differential linearity error - 1 1.7 9.5 10.5 - 10.7 11.6 - Signal-to-noise distortion 59 65 - Effective number of bits ENOB SINAD 1.65 V < VDDA < 3.6 V, range 1/2/3, TSSOP14 package Effective number of bits (16-bit mode oversampling with ratio =256)(5) Signal-to-noise ratio 59 65 - SNR Signal-to-noise ratio (16-bit mode oversampling with ratio =256)(5) 66 73 - THD Total harmonic distortion - -75 -63 Unit LSB bits dB 1. ADC DC accuracy values are measured after internal calibration. 2. ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the standard (non-robust) analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to standard analog pins which may potentially inject negative current. Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in Section 6.3.12 does not affect the ADC accuracy. 3. Better performance may be achieved in restricted VDDA, frequency and temperature ranges. 4. In TSSOP14 package, where VDDA pin is shared with VDD pin, I/O toggling should be minimized to reach the values given in the above table. I/O toggling with loaded I/O pins can generate ripple on VDD/VDDA and degrade the ADC accuracy. 5. This number is obtained by the test board without additional noise, resulting in non-optimized value for oversampling mode. Figure 27. ADC accuracy characteristics 966$ (*   ([DPSOHRIDQDFWXDOWUDQVIHUFXUYH 7KHLGHDOWUDQVIHUFXUYH (QGSRLQWFRUUHODWLRQOLQH   (7      (2 (/   ('  /6%,'($/              (7 7RWDO8QDMXVWHG(UURUPD[LPXPGHYLDWLRQ EHWZHHQWKHDFWXDODQGLGHDOWUDQVIHUFXUYHV (2 2IIVHW(UURUPD[LPXPGHYLDWLRQ EHWZHHQWKHILUVWDFWXDOWUDQVLWLRQDQGWKHILUVW LGHDORQH (* *DLQ(UURUGHYLDWLRQEHWZHHQWKHODVW LGHDOWUDQVLWLRQDQGWKHODVWDFWXDORQH (' 'LIIHUHQWLDO/LQHDULW\(UURUPD[LPXP GHYLDWLRQEHWZHHQDFWXDOVWHSVDQGWKHLGHDORQHV (/ ,QWHJUDO/LQHDULW\(UURUPD[LPXPGHYLDWLRQ EHWZHHQDQ\DFWXDOWUDQVLWLRQDQGWKHHQGSRLQW FRUUHODWLRQOLQH 9''$ 069 DocID027973 Rev 5 83/119 93 Electrical characteristics STM32L011x3/4 Figure 28. Typical connection diagram using the ADC 9''$ 97 5$,1 9$,1 $,1[ &SDUDVLWLF 97 6DPSOHDQGKROG$'& FRQYHUWHU 5$'& ELW FRQYHUWHU ,/“Q$ &$'& 06Y9 1. Refer to Table 54: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 6.3.16 Temperature sensor characteristics Table 57. Temperature sensor calibration values Calibration value name TS_CAL2 Description Memory address TS ADC raw data acquired at temperature of 130 °C ± 5 °C, VDDA= 3 V ± 10 mV 0x1FF8 007E - 0x1FF8 007F Table 58. Temperature sensor characteristics Symbol Parameter TL(1) VSENSE linearity with temperature Avg_Slope(1) Average slope V130 Voltage at 130°C I ±5°C(2) Min Typ Max Unit - ±1 ±2 °C 1.48 1.61 1.75 mV/°C 640 670 700 mV µA Current consumption - 3.4 6 tSTART(3) Startup time - - 10 TS_temp(4)(3) ADC sampling time when reading the temperature 10 - - (3) DDA(TEMP) 1. Guaranteed by characterization results, not tested in production. 2. Measured at VDD = 3 V ±10 mV. V30 ADC conversion result is stored in the TS_CAL1 byte. 3. Guaranteed by design, not tested in production. 4. Shortest sampling time can be determined in the application by multiple iterations. 84/119 DocID027973 Rev 5 µs STM32L011x3/4 6.3.17 Electrical characteristics Comparators Table 59. Comparator 1 characteristics Symbol Parameter Conditions Min(1) Typ Max(1) Unit 3.6 V VDDA Analog supply voltage - 1.65 R400K R400K value - - 400 - R10K R10K value - - 10 - Comparator 1 input voltage range - 0.6 - VDDA Comparator startup time VIN tSTART td Voffset dVoffset/dt ICOMP1 kΩ V - - 7 10 (2) Propagation delay - - 3 10 Comparator offset(3) - - ±3 ±10 mV VDDA = 3.6 V Comparator offset VIN+ = 0 V variation in worst voltage VIN- = VREFINT stress conditions(3) TA = 25 ° C 0 1.5 10 mV/1000 h Current consumption(4) - 160 260 nA - µs 1. Guaranteed by characterization, not tested in production. 2. The delay is characterized for 100 mV input step with 10 mV overdrive on the inverting input, the noninverting input set to the reference. 3. In TSSOP14 package, where VDDA pin is shared with VDD pin, I/O toggling should be minimized to reach the values given in the above table. I/O toggling with loaded I/O pins can generate ripple on VDD/VDDA and degrade the comparator performance. 4. Comparator consumption only. Internal reference voltage not included. Table 60. Comparator 2 characteristics Symbol VDDA VIN Parameter Min Analog supply voltage - 1.65 - 3.6 V Comparator 2 input voltage range - 0 - VDDA V Fast mode - 15 20 Slow mode - 20 25 1.65 V ≤ VDDA ≤ 2.7 V - 1.8 3.5 2.7 V ≤ VDDA ≤ 3.6 V - 2.5 6 1.65 V ≤ VDDA ≤ 2.7 V - 0.8 2 2.7 V ≤ VDDA ≤ 3.6 V - 1.2 4 - ±4 ±20 mV - 15 30 ppm /°C tSTART Comparator startup time td slow Propagation delay(2) in slow mode td fast Propagation delay(2) in fast mode Voffset Typ Max(1) Unit Conditions Comparator offset error(3) dThreshold/ Threshold voltage temperature dt coefficient VDDA = 3.3V TA = 0 to 50 ° C V- =VREFINT, 3/4 VREFINT, 1/2 VREFINT, 1/4 VREFINT. DocID027973 Rev 5 µs 85/119 93 Electrical characteristics STM32L011x3/4 Table 60. Comparator 2 characteristics (continued) Symbol Parameter ICOMP2 Current consumption(4) Conditions Typ Max(1) Unit Min Fast mode - 3.5 5 Slow mode - 0.5 2 µA 1. Guaranteed by characterization results, not tested in production. 2. The delay is characterized for 100 mV input step with 10 mV overdrive on the inverting input, the noninverting input set to the reference. 3. In TSSOP14 package, where VDDA pin is shared with VDD pin, I/O toggling should be minimized to reach the values given in the above table. I/O toggling with loaded I/O pins can generate ripple on VDD/VDDA and degrade the comparator performance. 4. Comparator consumption only. Internal reference voltage (necessary for comparator operation) is not included. 6.3.18 Timer characteristics TIM timer characteristics The parameters given in the Table 61 are guaranteed by design. Refer to Section 6.3.13: I/O port characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 61. TIMx(1) characteristics Symbol tres(TIM) fEXT ResTIM tCOUNTER Parameter Timer resolution time Conditions fTIMxCLK = 32 MHz Min Max Unit 1 - tTIMxCLK 31.25 - ns 0 fTIMxCLK/2 MHz 0 16 MHz 16 bit 65536 tTIMxCLK 2048 µs Timer external clock frequency on CH1 to CH4 f TIMxCLK = 32 MHz Timer resolution - 16-bit counter clock period when internal clock is selected (timer’s prescaler disabled) - tMAX_COUNT Maximum possible count fTIMxCLK = 32 MHz 0.0312 - - 65536 × 65536 tTIMxCLK fTIMxCLK = 32 MHz - 134.2 s 1. TIMx is used as a general term to refer to the TIM2 and TIM21 timers. 86/119 1 DocID027973 Rev 5 STM32L011x3/4 6.3.19 Electrical characteristics Communications interfaces I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for: • Standard-mode (Sm) : with a bit rate up to 100 kbit/s • Fast-mode (Fm) : with a bit rate up to 400 kbit/s • Fast-mode Plus (Fm+) : with a bit rate up to 1 Mbit/s. The I2C timing requirements are guaranteed by design when the I2C peripheral is properly configured (refer to the reference manual for details) and when the I2CCLK frequency is greater than the minimum given in Table 63. The SDA and SCL I/O requirements are met with the following restrictions: the SDA and SCL I/O pins are not "true" open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDDIOx is disabled, but is still present. Only FTf I/O pins support Fm+ low level output current maximum requirement (refer to Section 6.3.13: I/O port characteristics for the I2C I/Os characteristics). All I2C SDA and SCL I/Os embed an analog filter (see Table 62 for the analog filter characteristics). The analog spike filter is compliant with I2C timings requirements only for the following voltage ranges: • Fast mode Plus: 2.7 V ≤VDD ≤3.6 V and voltage scaling Range 1 • Fast mode: – 2 V ≤VDD ≤3.6 V and voltage scaling Range 1 or Range 2. – VDD < 2 V, voltage scaling Range 1 or Range 2, Cload < 200 pF. In other ranges, the analog filter should be disabled. The digital filter can be used instead. Note: In Standard mode, no spike filter is required. Table 62. I2C analog filter characteristics(1) Symbol Parameter Conditions Min Maximum pulse width of spikes that are suppressed by the analog filter Range 2 Range 3 Unit 260(3) Range 1 tAF Max 50(2) - ns - 1. Guaranteed by characterization results. 2. Spikes with widths below tAF(min) are filtered. 3. Spikes with widths above tAF(max) are not filtered DocID027973 Rev 5 87/119 93 Electrical characteristics STM32L011x3/4 Table 63. I2C frequency in all I2C modes Symbol fI2CCLK Parameter Condition Standard-mode 2 Fast-mode 8 I2C clock frequency Fast-mode Plus 88/119 Min DocID027973 Rev 5 Analog filter ON, DNF = 0 18 Analog filter OFF, DNF = 1 16 Unit MHz STM32L011x3/4 Electrical characteristics SPI characteristics Unless otherwise specified, the parameters given in the following tables are derived from tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 18. Refer to Section 6.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 64. SPI characteristics in voltage Range 1 (1) Symbol Parameter Conditions Min Typ - - Slave mode Transmitter 1.71