STM32L083x8 STM32L083xB
STM32L083xZ
Ultra-low-power 32-bit MCU Arm®-based Cortex®-M0+, up to 192KB
Flash, 20KB SRAM, 6KB EEPROM, LCD, USB, ADC, DACs, AES
Datasheet - production data
Features
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FBGA
FBGA
Ultra-low-power platform
– 1.65 V to 3.6 V power supply
– -40 to 125 °C temperature range
– 0.29 µA Standby mode (3 wakeup pins)
– 0.43 µA Stop mode (16 wakeup lines)
– 0.86 µA Stop mode + RTC + 20-Kbyte RAM
retention
– Down to 93 µA/MHz in Run mode
– 5 µs wakeup time (from Flash memory)
– 41 µA 12-bit ADC conversion at 10 ksps
Core: Arm® 32-bit Cortex®-M0+ with MPU
– From 32 kHz up to 32 MHz max.
– 0.95 DMIPS/MHz
Memories
– Up to 192-Kbyte Flash memory with ECC (2
banks with read-while-write capability)
– 20-Kbyte RAM
– 6 Kbytes of data EEPROM with ECC
– 20-byte backup register
– Sector protection against R/W operation
Up to 84 fast I/Os (78 I/Os 5V tolerant)
Reset and supply management
– Ultra-safe, low-power BOR (brownout reset)
with 5 selectable thresholds
– Ultra-low-power POR/PDR
– Programmable voltage detector (PVD)
Clock sources
– 1 to 25 MHz crystal oscillator
– 32 kHz oscillator for RTC with calibration
– High speed internal 16 MHz factory-trimmed RC
(+/- 1%)
– Internal low-power 37 kHz RC
– Internal multispeed low-power 65 kHz to
4.2 MHz RC
– Internal self calibration of 48 MHz RC for USB
– PLL for CPU clock
Pre-programmed bootloader
– USB, USART supported
Development support
– Serial wire debug supported
LCD driver for up to 4x52 or 8x48 segments
November 2019
This is information on a product in full production.
LQFP48 (7 x 7 mm)
LQFP64 (10x10 mm)
LQFP100 (14x14 mm)
UFQFPN48
(7x7 mm)
UFBGA100
7x7 mm
TFBGA64
5x5 mm
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– Support contrast adjustment
– Support blinking mode
– Step-up converted on board
Rich Analog peripherals
– 12-bit ADC 1.14 Msps up to 16 channels (down
to 1.65 V)
– 2 x 12-bit channel DACs with output buffers
(down to 1.8 V)
– 2x ultra-low-power comparators (window mode
and wake up capability, down to 1.65 V)
Up to 24 capacitive sensing channels supporting
touchkey, linear and rotary touch sensors
7-channel DMA controller, supporting ADC, SPI,
I2C, USART, DAC, Timers, AES
11x peripheral communication interfaces
– 1x USB 2.0 crystal-less, battery charging
detection and LPM
– 4x USART (2 with ISO 7816, IrDA), 1x UART
(low power)
– Up to 6x SPI 16 Mbits/s
– 3x I2C (2 with SMBus/PMBus)
11x timers: 2x 16-bit with up to 4 channels, 2x 16-bit
with up to 2 channels, 1x 16-bit ultra-low-power
timer, 1x SysTick, 1x RTC, 2x 16-bit basic for DAC,
and 2x watchdogs (independent/window)
CRC calculation unit, 96-bit unique ID
True RNG and firewall protection
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Hardware Encryption Engine AES 128-bit
All packages are ECOPACK2
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Table 1. Device summary
Reference
STM32L083x8
Part number
STM32L083V8
STM32L083xB
STM32L083CB, STM32L083VB, STM32L083RB
STM32L083xZ
STM32L083CZ, STM32L083VZ, STM32L083RZ
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www.st.com
Contents
STM32L083xx
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3
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2.1
Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2.2
Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2
Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3
Arm® Cortex®-M0+ core with MPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4
Reset and supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.1
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.2
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.3
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.5
Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.6
Low-power real-time clock and backup registers . . . . . . . . . . . . . . . . . . . 25
3.7
General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.8
Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.9
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.10
Direct memory access (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.11
Liquid crystal display (LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.12
Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.13
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.13.1
Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.13.2
VLCD voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.14
Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.15
Ultra-low-power comparators and reference voltage . . . . . . . . . . . . . . . . 29
3.16
Touch sensing controller (TSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.17
AES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.18
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.18.1
General-purpose timers (TIM2, TIM3, TIM21 and TIM22) . . . . . . . . . . . 31
3.18.2
Low-power Timer (LPTIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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Contents
3.18.3
Basic timer (TIM6, TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.18.4
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.18.5
Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.18.6
Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.19.1
I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.19.2
Universal synchronous/asynchronous receiver transmitter (USART) . . 34
3.19.3
Low-power universal asynchronous receiver transmitter (LPUART) . . . 35
3.19.4
Serial peripheral interface (SPI)/Inter-integrated sound (I2S) . . . . . . . . 35
3.19.5
Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.20
Clock recovery system (CRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.21
Cyclic redundancy check (CRC) calculation unit . . . . . . . . . . . . . . . . . . . 36
3.22
Serial wire debug port (SW-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.1.1
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.1.2
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.1.3
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.1.4
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.1.5
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.1.6
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
6.1.7
Optional LCD power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
6.1.8
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
6.2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
6.3
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
6.3.1
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
6.3.2
Embedded reset and power control block characteristics . . . . . . . . . . . 66
6.3.3
Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 67
6.3.4
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
6.3.5
Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.3.6
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
6.3.7
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
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6.3.8
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.3.9
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
6.3.10
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
6.3.11
Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
6.3.12
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
6.3.13
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
6.3.14
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6.3.15
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6.3.16
DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
6.3.17
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
6.3.18
Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
6.3.19
Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
6.3.20
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
6.3.21
LCD controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
7.1
LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
7.2
UFBGA100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
7.3
LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
7.4
TFBGA64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
7.5
LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
7.6
UFQFPN48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
7.7
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
7.7.1
Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
8
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
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List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Table 43.
Table 44.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ultra-low-power STM32L083xxx device features and peripheral counts . . . . . . . . . . . . . . 11
Functionalities depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . 16
CPU frequency range depending on dynamic voltage scaling . . . . . . . . . . . . . . . . . . . . . . 16
Functionalities depending on the working mode
(from Run/active down to standby) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
STM32L0xx peripherals interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Internal voltage reference measured values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Capacitive sensing GPIOs available on STM32L083xx devices . . . . . . . . . . . . . . . . . . . . 30
Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
STM32L083xx I2C implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
USART implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SPI/I2S implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
STM32L083xx pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Alternate functions port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Alternate functions port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Alternate functions port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Alternate functions port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Alternate functions port E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Alternate functions port H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 66
Embedded internal reference voltage calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Current consumption in Run mode, code with data processing running from
Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Current consumption in Run mode vs code type,
code with data processing running from Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Current consumption in Run mode, code with data processing running from RAM . . . . . . 71
Current consumption in Run mode vs code type,
code with data processing running from RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Current consumption in Low-power run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Current consumption in Low-power sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Typical and maximum current consumptions in Stop mode . . . . . . . . . . . . . . . . . . . . . . . . 76
Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . . 77
Average current consumption during Wakeup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Peripheral current consumption in Run or Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Peripheral current consumption in Stop and Standby mode . . . . . . . . . . . . . . . . . . . . . . . 81
Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
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List of tables
Table 45.
Table 46.
Table 47.
Table 48.
Table 49.
Table 50.
Table 51.
Table 52.
Table 53.
Table 54.
Table 55.
Table 56.
Table 57.
Table 58.
Table 59.
Table 60.
Table 61.
Table 62.
Table 63.
Table 64.
Table 65.
Table 66.
Table 67.
Table 68.
Table 69.
Table 70.
Table 71.
Table 72.
Table 73.
Table 74.
Table 75.
Table 76.
Table 77.
Table 78.
Table 79.
Table 80.
Table 81.
Table 82.
Table 83.
Table 84.
Table 85.
Table 86.
Table 87.
Table 88.
Table 89.
Table 90.
Table 91.
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HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
LSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
16 MHz HSI16 oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
HSI48 oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
MSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Flash memory and data EEPROM characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Flash memory and data EEPROM endurance and retention . . . . . . . . . . . . . . . . . . . . . . . 92
EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
RAIN max for fADC = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Comparator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Comparator 2 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
I2C analog filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
SPI characteristics in voltage Range 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
SPI characteristics in voltage Range 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
SPI characteristics in voltage Range 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
I2S characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
USB startup time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
USB: full speed electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
LCD controller characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
LQPF100 - 100-pin, 14 x 14 mm low-profile quad flat package
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array
package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
UFBGA100 recommended PCB design rules (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . 128
LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat
package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid
array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
TFBGA64 recommended PCB design rules (0.5 mm pitch BGA). . . . . . . . . . . . . . . . . . . 134
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data. . . . . . . . . . . 137
UFQFPN48 - 48 leads, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat
package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
DS10671 Rev 5
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List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
STM32L083xx block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STM32L083xx LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
STM32L083xx UFBGA100 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
STM32L083xx LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
STM32L083xx TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
STM32L083xx LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
STM32L083xx UFQFPN48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Optional LCD power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
IDD vs VDD, at TA= 25/55/85/105 °C, Run mode, code running from
Flash memory, Range 2, HSE, 1WS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
IDD vs VDD, at TA= 25/55/85/105 °C, Run mode, code running from
Flash memory, Range 2, HSI16, 1WS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
IDD vs VDD, at TA= 25 °C, Low-power run mode, code running
from RAM, Range 3, MSI (Range 0) at 64 KHz, 0 WS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
IDD vs VDD, at TA= 25/55/ 85/105/125 °C, Stop mode with RTC enabled
and running on LSE Low drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
IDD vs VDD, at TA= 25/55/85/105/125 °C, Stop mode with RTC disabled,
all clocks OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
HSI16 minimum and maximum value versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . 88
VIH/VIL versus VDD (CMOS I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
VIH/VIL versus VDD (TTL I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Power supply and reference decoupling (VREF+ not connected to VDDA) . . . . . . . . . . . . 105
Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . 106
12-bit buffered/non-buffered DAC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
I2S slave timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
I2S master timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . 121
LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat package outline . . . . . . . . . . . . . . 124
LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat
recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
LQFP100 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball
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List of figures
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
Figure 49.
Figure 50.
Figure 51.
Figure 52.
Figure 53.
Figure 54.
Figure 55.
Figure 56.
Figure 57.
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STM32L083xx
grid array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball
grid array package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
UFBGA100 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . 130
LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat recommended footprint . . . . . . . . . . 131
LQFP64 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball
grid array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball
,grid array recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
TFBGA64 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . . . 136
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat recommended footprint . . . . . . . . . . . . 137
LQFP48 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
UFQFPN48 - 48 leads, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat
package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
UFQFPN48 - 48 leads, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat
package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
UFQFPN48 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
DS10671 Rev 5
STM32L083xx
1
Introduction
Introduction
The ultra-low-power STM32L083xx are offered in 6 different package types from 48 to 100
pins. Depending on the device chosen, different sets of peripherals are included, the
description below gives an overview of the complete range of peripherals proposed in this
family.
These features make the ultra-low-power STM32L083xx microcontrollers suitable for a wide
range of applications:
•
Gas/water meters and industrial sensors
•
Healthcare and fitness equipment
•
Remote control and user interface
•
PC peripherals, gaming, GPS equipment
•
Alarm system, wired and wireless sensors, video intercom
This STM32L083xx datasheet should be read in conjunction with the STM32L0x3xx
reference manual (RM0367).
For information on the Arm®(a) Cortex®-M0+ core please refer to the Cortex®-M0+ Technical
Reference Manual, available from the www.arm.com website.
Figure 1 shows the general block diagram of the device family.
a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
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Description
2
STM32L083xx
Description
The ultra-low-power STM32L083xx microcontrollers incorporate the connectivity power of
the universal serial bus (USB 2.0 crystal-less) with the high-performance Arm Cortex-M0+
32-bit RISC core operating at a 32 MHz frequency, a memory protection unit (MPU), highspeed embedded memories (up to 192 Kbytes of Flash program memory, 6 Kbytes of data
EEPROM and 20 Kbytes of RAM) plus an extensive range of enhanced I/Os and
peripherals.
The STM32L083xx devices provide high power efficiency for a wide range of performance.
It is achieved with a large choice of internal and external clock sources, an internal voltage
adaptation and several low-power modes.
The STM32L083xx devices offer several analog features, one 12-bit ADC with hardware
oversampling, two DACs, two ultra-low-power comparators, AES, several timers, one lowpower timer (LPTIM), four general-purpose 16-bit timers and two basic timer, one RTC and
one SysTick which can be used as timebases. They also feature two watchdogs, one
watchdog with independent clock and window capability and one window watchdog based
on bus clock.
Moreover, the STM32L083xx devices embed standard and advanced communication
interfaces: up to three I2Cs, two SPIs, one I2S, four USARTs, a low-power UART
(LPUART), and a crystal-less USB. The devices offer up to 24 capacitive sensing channels
to simply add touch sensing functionality to any application.
The STM32L083xx also include a real-time clock and a set of backup registers that remain
powered in Standby mode.
Finally, their integrated LCD controller has a built-in LCD voltage generator that allows to
drive up to 8 multiplexed LCDs with contrast independent of the supply voltage.
The ultra-low-power STM32L083xx devices operate from a 1.8 to 3.6 V power supply (down
to 1.65 V at power down) with BOR and from a 1.65 to 3.6 V power supply without BOR
option. They are available in the -40 to +125 °C temperature range. A comprehensive set of
power-saving modes allows the design of low-power applications.
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Description
Device overview
Table 2. Ultra-low-power STM32L083xxx device features and peripheral counts
Peripheral
STM32L083 STM32L083 STM32L083 STM32L083
V8
CB
VB
RB
Flash memory (Kbytes)
64 Kbytes
Data EEPROM (Kbytes)
3 Kbytes
128 Kbytes
192 Kbytes
6 Kbytes
RAM (Kbytes)
20 Kbytes
AES
Timers
1
Generalpurpose
4
Basic
2
LPTIMER
1
RTC/SYSTICK/IWDG/WWDG
1/1/1/1
6(4)(1)/1
SPI/I2S
I2 C
Communication
USART
interfaces
LPUART
3
4
1
USB/(VDD_USB)
GPIOs
1/(1)
84
40
84
51
Clocks:
HSE/LSE/HSI/MSI/LSI
12-bit synchronized ADC
Number of channels
LCD
COM x SEG
1
16
1
10
1
16
1
4x52 or
8x48
1
4x52 or
8x48
1
4x18
51
1
10
1
16
1
4x32 or 8x28
1
4x18
1
4x52 or
8x48
1
4x32 or
8x28(2)
17
24
24
2
24
17
24
Max. CPU frequency
Operating voltage
84
2
2
Comparators
Capacitive sensing
channels
40
1/1/1/1/1
12-bit DAC
Number of channels
24
32 MHz
1.8 V to 3.6 V (down to 1.65 V at power-down) with BOR option 1.65 to 3.6 V without BOR option
Ambient temperature: –40 to +125 °C
Junction temperature: –40 to +130 °C
Operating temperatures
Packages
STM32L083 STM32L083 STM32L083
CZ
VZ
RZ
LQFP100,
UFBGA100
LQFP48,
UFQFPN48
LQFP100,
UFBGA100
LQFP64
LQFP48,
UFQFPN48
LQFP100,
UFBGA100
LQFP64,
TFBGA64
1. 4 SPI interfaces are USARTs operating in SPI master mode.
2. On TFBGA64, only 4x31 or 8x27 COMxSEG are available.
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Description
STM32L083xx
Figure 1. STM32L083xx block diagram
Temp
sensor
SWD
SWD
FLASH
EEPROM
BOOT
FIREWALL
CORTEX M0+ CPU
Fmax:32MHz
ADC1
AINx
SPI1
MISO, MOSI,
SCK, NSS
USART1
RX, TX, RTS,
CTS, CK
RAM
MPU
DBG
DMA1
NVIC
EXTI
A
P
B
2
TIM21
2ch
TIM22
2ch
BRIDGE
COMP1
INP, INM, OUT
COMP2
INP, INM, OUT
BRIDGE
LPTIM1
IN1, IN2,
ETR, OUT
RAM 1K
USB 2.0 FS
TIM6
DAC1
OUT1
TIM7
DAC2
OUT1
I2C1
SCL, SDA,
SMBA
I2C2
SCL, SDA
I2C3
SCL, SDA,
SMBA
TSC
PA[0:15]
GPIO PORT A
PB[0:15]
GPIO PORT B
PC[0:15]
GPIO PORT C
RNG
GPIO PORT D
AES
PE[0:15]
PH[0:1], [9:10]
GPIO PORT E
AHB: Fmax 32MHz
PD[0:15]
CRC
GPIO PORT H
WWDG
A
P
B
1
OSC_IN,
OSC_OUT
HSE
HSI 16M
HSI 48M
LSI
RX, TX, RTS,
CTS, CK
USART4
RX, TX, RTS,
CTS, CK
IWDG
TIM2
RX, TX, RTS,
CTS, CK
RX, TX, RTS,
CTS
MISO/MCK,
MOSI/SD,
SCK/CK, NSS/
WS
4ch
TIM3
4ch
LCD
COMx, SEGx,
LCD_VLCDx
USART5
MSI
RTC
LPUART1
BCKP REG
SPI2/I2S
RESET & CLK
WKUPx
OSC32_IN,
OSC32_OUT
USART2
CRS
PLL
LSE
PVD_IN
VREF_OUT
PMU
DP, DM, OE,
CRS_SYNC,
VDD_USB
NRST
VDDA
VDD
REGULATOR
MSv35432V1
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STM32L083xx
2.2
Description
Ultra-low-power device continuum
The ultra-low-power family offers a large choice of core and features, from 8-bit proprietary
core up to Arm® Cortex®-M4, including Arm® Cortex®-M3 and Arm® Cortex®-M0+. The
STM32Lx series are the best choice to answer your needs in terms of ultra-low-power
features. The STM32 ultra-low-power series are the best solution for applications such as
gaz/water meter, keyboard/mouse or fitness and healthcare application. Several built-in
features like LCD drivers, dual-bank memory, low-power run mode, operational amplifiers,
128-bit AES, DAC, crystal-less USB and many other definitely help you building a highly
cost optimized application by reducing BOM cost. STMicroelectronics, as a reliable and
long-term manufacturer, ensures as much as possible pin-to-pin compatibility between all
STM8Lx and STM32Lx on one hand, and between all STM32Lx and STM32Fx on the other
hand. Thanks to this unprecedented scalability, your legacy application can be upgraded to
respond to the latest market feature and efficiency requirements.
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36
Functional overview
STM32L083xx
3
Functional overview
3.1
Low-power modes
The ultra-low-power STM32L083xx support dynamic voltage scaling to optimize its power
consumption in Run mode. The voltage from the internal low-drop regulator that supplies
the logic can be adjusted according to the system’s maximum operating frequency and the
external voltage supply.
There are three power consumption ranges:
•
Range 1 (VDD range limited to 1.71-3.6 V), with the CPU running at up to 32 MHz
•
Range 2 (full VDD range), with a maximum CPU frequency of 16 MHz
•
Range 3 (full VDD range), with a maximum CPU frequency limited to 4.2 MHz
Seven low-power modes are provided to achieve the best compromise between low-power
consumption, short startup time and available wakeup sources:
•
Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can
wake up the CPU when an interrupt/event occurs. Sleep mode power consumption at
16 MHz is about 1 mA with all peripherals off.
•
Low-power run mode
This mode is achieved with the multispeed internal (MSI) RC oscillator set to the lowspeed clock (max 131 kHz), execution from SRAM or Flash memory, and internal
regulator in low-power mode to minimize the regulator's operating current. In Lowpower run mode, the clock frequency and the number of enabled peripherals are both
limited.
•
Low-power sleep mode
This mode is achieved by entering Sleep mode with the internal voltage regulator in
low-power mode to minimize the regulator’s operating current. In Low-power sleep
mode, both the clock frequency and the number of enabled peripherals are limited; a
typical example would be to have a timer running at 32 kHz.
When wakeup is triggered by an event or an interrupt, the system reverts to the Run
mode with the regulator on.
Stop mode with RTC
The Stop mode achieves the lowest power consumption while retaining the RAM and
register contents and real time clock. All clocks in the VCORE domain are stopped, the
PLL, MSI RC, HSE crystal and HSI RC oscillators are disabled. The LSE or LSI is still
running. The voltage regulator is in the low-power mode.
Some peripherals featuring wakeup capability can enable the HSI RC during Stop
mode to detect their wakeup condition.
The device can be woken up from Stop mode by any of the EXTI line, in 3.5 µs, the
processor can serve the interrupt or resume the code. The EXTI line source can be any
GPIO. It can be the PVD output, the comparator 1 event or comparator 2 event
(if internal reference voltage is on), it can be the RTC alarm/tamper/timestamp/wakeup
events, the USB/USART/I2C/LPUART/LPTIMER wakeup events.
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DS10671 Rev 5
STM32L083xx
•
Functional overview
Stop mode without RTC
The Stop mode achieves the lowest power consumption while retaining the RAM and
register contents. All clocks are stopped, the PLL, MSI RC, HSI and LSI RC, HSE and
LSE crystal oscillators are disabled.
Some peripherals featuring wakeup capability can enable the HSI RC during Stop
mode to detect their wakeup condition.
The voltage regulator is in the low-power mode. The device can be woken up from Stop
mode by any of the EXTI line, in 3.5 µs, the processor can serve the interrupt or
resume the code. The EXTI line source can be any GPIO. It can be the PVD output, the
comparator 1 event or comparator 2 event (if internal reference voltage is on). It can
also be wakened by the USB/USART/I2C/LPUART/LPTIMER wakeup events.
•
Standby mode with RTC
The Standby mode is used to achieve the lowest power consumption and real time
clock. The internal voltage regulator is switched off so that the entire VCORE domain is
powered off. The PLL, MSI RC, HSE crystal and HSI RC oscillators are also switched
off. The LSE or LSI is still running. After entering Standby mode, the RAM and register
contents are lost except for registers in the Standby circuitry (wakeup logic, IWDG,
RTC, LSI, LSE Crystal 32 KHz oscillator, RCC_CSR register).
The device exits Standby mode in 60 µs when an external reset (NRST pin), an IWDG
reset, a rising edge on one of the three WKUP pins, RTC alarm (Alarm A or Alarm B),
RTC tamper event, RTC timestamp event or RTC Wakeup event occurs.
•
Standby mode without RTC
The Standby mode is used to achieve the lowest power consumption. The internal
voltage regulator is switched off so that the entire VCORE domain is powered off. The
PLL, MSI RC, HSI and LSI RC, HSE and LSE crystal oscillators are also switched off.
After entering Standby mode, the RAM and register contents are lost except for
registers in the Standby circuitry (wakeup logic, IWDG, RTC, LSI, LSE Crystal 32 KHz
oscillator, RCC_CSR register).
The device exits Standby mode in 60 µs when an external reset (NRST pin) or a rising
edge on one of the three WKUP pin occurs.
Note:
The RTC, the IWDG, and the corresponding clock sources are not stopped automatically by
entering Stop or Standby mode. The LCD is not stopped automatically by entering Stop
mode.
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36
Functional overview
STM32L083xx
Table 3. Functionalities depending on the operating power supply range
Functionalities depending on the operating power supply
range
Operating power supply
range(1)
DAC and ADC
operation
Dynamic voltage
scaling range
USB
VDD = 1.65 to 1.71 V
ADC only, conversion
time up to 570 ksps
Range 2 or
range 3
Not functional
VDD = 1.71 to 1.8 V(2)
ADC only, conversion
time up to 1.14 Msps
Range 1, range 2 or
range 3
Functional(3)
VDD = 1.8 to 2.0 V(2)
Conversion time up to
1.14 Msps
Range1, range 2 or
range 3
Functional(3)
VDD = 2.0 to 2.4 V
Conversion time up to
1.14 Msps
Range 1, range 2 or
range 3
Functional(3)
VDD = 2.4 to 3.6 V
Conversion time up to
1.14 Msps
Range 1, range 2 or
range 3
Functional(3)
1. GPIO speed depends on VDD voltage range. Refer to Table 62: I/O AC characteristics for more information
about I/O speed.
2. CPU frequency changes from initial to final must respect "fcpu initial
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