STM32L152-SK/IAR

STM32L151x6/8/B STM32L152x6/8/B Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3, 128KB Flash, 16KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC Datasheet - production data Features • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40°C to 85°C/105°C temperature range – 0.3 µA Standby mode (3 wakeup pins) – 0.9 µA Standby mode + RTC – 0.57 µA Stop mode (16 wakeup lines) – 1.2 µA Stop mode + RTC – 9 µA Low-power run mode – 214 µA/MHz Run mode – 10 nA ultra-low I/O leakage – < 8 µs wakeup time • Core: ARM® Cortex®-M3 32-bit CPU – From 32 kHz up to 32 MHz max – 1.25 DMIPS/MHz (Dhrystone 2.1) – Memory protection unit • Reset and supply management – Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds – Ultra-low-power POR/PDR – Programmable voltage detector (PVD) • Clock sources – 1 to 24 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – High Speed Internal 16 MHz factorytrimmed RC (+/- 1%) – Internal low-power 37 kHz RC – Internal multispeed low-power 65 kHz to 4.2 MHz – PLL for CPU clock and USB (48 MHz) • Pre-programmed bootloader – USART supported • Development support – Serial wire debug supported – JTAG and trace supported • Up to 83 fast I/Os (73 I/Os 5V tolerant), all mappable on 16 external interrupt vectors • Memories – Up to 128 Kbytes Flash memory with ECC – Up to 16 Kbytes RAM April 2016 This is information on a product in full production. LQFP100 14 × 14 mm UFBGA100 7 × 7 mm UFQFPN48 7 × 7 mm LQFP64 10 × 10 mm TFBGA64 5 × 5 mm LQFP48 7 × 7 mm – Up to 4 Kbytes of true EEPROM with ECC – 80-byte backup register • LCD Driver (except STM32L151x/6/8/B devices) for up to 8x40 segments – Support contrast adjustment – Support blinking mode – Step-up converter on board • Rich analog peripherals (down to 1.8 V) – 12-bit ADC 1 Msps up to 24 channels – 12-bit DAC 2 channels with output buffers – 2x ultra-low-power-comparators (window mode and wake up capability) • DMA controller 7x channels • 8x peripheral communication interfaces – 1x USB 2.0 (internal 48 MHz PLL) – 3x USARTs (ISO 7816, IrDA) – 2x SPIs 16 Mbit/s – 2x I2Cs (SMBus/PMBus) • 10x timers: 6x 16-bit with up to 4 IC/OC/PWM channels, 2x 16-bit basic timers, 2x watchdog timers (independent and window) • Up to 20 capacitive sensing channels supporting touchkey, linear and rotary touch sensors • CRC calculation unit, 96-bit unique ID Table 1. Device summary Reference Part number STM32L151x6/8/B STM32L151CB, STM32L151C8, STM32L151C6, STM32L151RB, STM32L151R8, STM32L151R6, STM32L151VB, STM32L151V8 STM32L152x6/8/B STM32L152CB, STM32L152C8, STM32L152C6, STM32L152RB, STM32L152R8, STM32L152R6, STM32L152VB, STM32L152V8 DocID17659 Rev 12 1/133 www.st.com Contents STM32L151x6/8/B STM32L152x6/8/B Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 2/133 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.2 Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.1 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.2 Shared peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.3 Common system strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.4 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2 ARM® Cortex®-M3 core with MPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 Reset and supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.3.4 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.5 Low power real-time clock and backup registers . . . . . . . . . . . . . . . . . . . 23 3.6 GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.7 Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.8 DMA (direct memory access) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.9 LCD (liquid crystal display) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.10 ADC (analog-to-digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.10.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.10.2 Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.11 DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.12 Ultra-low-power comparators and reference voltage . . . . . . . . . . . . . . . . 26 3.13 Routing interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.14 Touch sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.15 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B 3.16 Contents 3.15.1 General-purpose timers (TIM2, TIM3, TIM4, TIM9, TIM10 and TIM11) . 28 3.15.2 Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.15.3 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.15.4 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.15.5 Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.16.1 I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.16.2 Universal synchronous/asynchronous receiver transmitter (USART) . . 29 3.16.3 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.16.4 Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.17 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 30 3.18 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 6.1.7 Optional LCD power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.1.8 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 6.3.2 Embedded reset and power control block characteristics . . . . . . . . . . . 54 6.3.3 Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 56 6.3.4 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.3.5 Wakeup time from Low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 6.3.6 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 6.3.7 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 6.3.8 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 DocID17659 Rev 12 3/133 4 Contents 7 STM32L151x6/8/B STM32L152x6/8/B 6.3.9 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 6.3.10 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 6.3.11 Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 6.3.12 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.3.13 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 6.3.14 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.3.15 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.3.16 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 6.3.17 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 6.3.18 DAC electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 6.3.19 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 6.3.20 Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 6.3.21 LCD controller (STM32L152xx only) . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 7.1 LQFP100 14 x 14 mm, 100-pin low-profile quad flat package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 7.2 LQFP64 10 x 10 mm, 64-pin low-profile quad flat package information . 108 7.3 LQFP48 7 x 7 mm, 48-pin low-profile quad flat package information . . . . 111 7.4 UFQFPN48 7 x 7 mm, 0.5 mm pitch, package information . . . . . . . . . . .114 7.5 UFBGA100 7 x 7 mm, 0.5 mm pitch, ultra thin fine-pitch ball grid array package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117 7.6 TFBGA64 5 x 5 mm, 0.5 mm pitch, thin fine-pitch ball grid array package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 7.7 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 7.7.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 4/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B device features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Functionalities depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . 15 CPU frequency range depending on dynamic voltage scaling . . . . . . . . . . . . . . . . . . . . . . 16 Working mode-dependent functionalities (from Run/active down to standby) . . . . . . . . . . 17 Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 STM32L151x6/8/B and STM32L152x6/8/B pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . 37 Alternate function input/output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 54 Embedded internal reference voltage calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Current consumption in Run mode, code with data processing running from Flash. . . . . . 58 Current consumption in Run mode, code with data processing running from RAM . . . . . . 59 Current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Current consumption in Low power run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Current consumption in Low power sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Typical and maximum current consumptions in Stop mode . . . . . . . . . . . . . . . . . . . . . . . . 64 Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . . 66 Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 MSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Flash memory and data EEPROM characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Flash memory, data EEPROM endurance and data retention . . . . . . . . . . . . . . . . . . . . . . 78 EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 I2C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 DocID17659 Rev 12 5/133 6 List of tables Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. 6/133 STM32L151x6/8/B STM32L152x6/8/B SCL frequency (fPCLK1= 32 MHz, VDD = VDD_I2C = 3.3 V). . . . . . . . . . . . . . . . . . . . . . . . 88 SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 USB startup time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 USB: full speed electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 ADC clock frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Maximum source impedance RAIN max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Comparator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Comparator 2 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 LCD controller characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 LQPF100 14 x 14 mm, 100-pin low-profile quad flat package mechanical data . . . . . . . 106 LQFP64 10 x 10 mm, 64-pin low-profile quad flat package mechanical data. . . . . . . . . . 108 LQFP48 7 x 7 mm, 48-pin low-profile quad flat package mechanical data. . . . . . . . . . . . 112 UFQFPN48 7 x 7 mm, 0.5 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . 115 UFBGA100 7 x 7 mm, 0.5 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . 117 UFBGA100 7 x 7 mm, 0.5 mm pitch, recommended PCB design rules . . . . . . . . . . . . . . 118 TFBGA64 5 x 5 mm, 0.5 mm pitch, package mechanical data. . . . . . . . . . . . . . . . . . . . . 120 TFBGA64 5 x 5 mm, 0.5 mm pitch, recommended PCB design rules . . . . . . . . . . . . . . . 121 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B block diagram. . . . . . . . . . . . 13 Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 STM32L15xVx UFBGA100 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 STM32L15xVx LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 STM32L15xRx TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 STM32L15xRx LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 STM32L15xCx LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 STM32L15xCx UFQFPN48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Optional LCD power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 I2C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Maximum dynamic current consumption on VREF+ supply pin during ADC conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . . 98 Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . . 98 12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 LQFP100 14 x 14 mm, 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . 105 LQPF100 14 x 14 mm, 100-pin low-profile quad flat package recommended footprint . . 107 LQFP100 14 x 14 mm, 100-pin package top view example . . . . . . . . . . . . . . . . . . . . . . . 107 LQFP64 10 x 10 mm, 64-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . 108 LQFP64 10 x 10 mm, 64-pin low-profile quad flat package recommended footprint . . . . 109 LQFP64 10 x 10 mm, 64-pin low-profile quad flat package top view example . . . . . . . . . 110 LQFP48 7 x 7 mm, 48-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . 111 LQFP48 7 x 7 mm, 48-pin low-profile quad flat recommended footprint. . . . . . . . . . . . . . 112 LQFP48 7 x 7 mm, 48-pin low-profile quad flat package top view example . . . . . . . . . . . 113 UFQFPN48 7 x 7 mm, 0.5 mm pitch, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 UFQFPN48 7 x 7 mm, 0.5 mm pitch, package recommended footprint . . . . . . . . . . . . . . 115 UFQFPN48 7 x 7 mm, 0.5 mm pitch, package top view example . . . . . . . . . . . . . . . . . . 116 UFBGA100, 7 x 7 mm, 0.5 mm pitch, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 UFBGA100 7 x 7 mm, 0.5 mm pitch, package recommended footprint . . . . . . . . . . . . . . 118 UFBGA100 7 x 7 mm, 0.5 mm pitch, package top view example. . . . . . . . . . . . . . . . . . . 119 TFBGA64 5 x 5 mm, 0.5 mm pitch, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 DocID17659 Rev 12 7/133 8 List of figures Figure 48. Figure 49. Figure 50. 8/133 STM32L151x6/8/B STM32L152x6/8/B TFBGA64, 5 x 5 mm, 0.5 mm pitch, recommended footprint . . . . . . . . . . . . . . . . . . . . . . 121 TFBGA64 5 x 5 mm, 0.5 mm pitch, package top view example . . . . . . . . . . . . . . . . . . . . 122 Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B 1 Introduction Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32L151x6/8/B and STM32L152x6/8/B ultra-low-power ARM® Cortex®-M3 based microcontrollers product line. The ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B family includes devices in 3 different package types: from 48 to 100 pins. Depending on the device chosen, different sets of peripherals are included, the description below gives an overview of the complete range of peripherals proposed in this family. These features make the ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B microcontroller family suitable for a wide range of applications: • Medical and handheld equipment • Application control and user interface • PC peripherals, gaming, GPS and sport equipment • Alarm systems, Wired and wireless sensors, Video intercom • Utility metering This STM32L151x6/8/B and STM32L152x6/8/B datasheet should be read in conjunction with the STM32L1xxxx reference manual (RM0038). The document "Getting started with STM32L1xxxx hardware development” AN3216 gives a hardware implementation overview. Both documents are available from the STMicroelectronics website www.st.com. For information on the ARM® Cortex®-M3 core please refer to the Cortex®-M3 Technical Reference Manual, available from the www.arm.com website. Figure 1 shows the general block diagram of the device family. Caution: This datasheet does not apply to STM32L15xx6/8/B-A covered by a separate datasheet. DocID17659 Rev 12 9/133 48 Description 2 STM32L151x6/8/B STM32L152x6/8/B Description The ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B devices incorporate the connectivity power of the universal serial bus (USB) with the high-performance ARM® Cortex®-M3 32-bit RISC core operating at 32 MHz frequency (33.3 DMIPS), a memory protection unit (MPU), high-speed embedded memories (Flash memory up to 128 Kbytes and RAM up to 16 Kbytes) and an extensive range of enhanced I/Os and peripherals connected to two APB buses. All the devices offer a 12-bit ADC, 2 DACs and 2 ultra-low-power comparators, six generalpurpose 16-bit timers and two basic timers, which can be used as time bases. Moreover, the STM32L151x6/8/B and STM32L152x6/8/B devices contain standard and advanced communication interfaces: up to two I2Cs and SPIs, three USARTs and a USB. The STM32L151x6/8/B and STM32L152x6/8/B devices offer up to 20 capacitive sensing channels to simply add touch sensing functionality to any application. They also include a real-time clock and a set of backup registers that remain powered in Standby mode. Finally, the integrated LCD controller (except STM32L151x6/8/B devices) has a built-in LCD voltage generator that allows to drive up to 8 multiplexed LCDs with contrast independent of the supply voltage. The ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B devices operate from a 1.8 to 3.6 V power supply (down to 1.65 V at power down) with BOR and from a 1.65 to 3.6 V power supply without BOR option. It is available in the -40 to +85 °C temperature range, extended to 105°C in low power dissipation state. A comprehensive set of power-saving modes allows the design of low-power applications. 10/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B 2.1 Description Device overview Table 2. Ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B device features and peripheral counts Peripheral Flash (Kbytes) STM32L15xCx 32 64 128 STM32L15xRx 32 Data EEPROM (Kbytes) RAM (Kbytes) Timers Communication interfaces 10 16 10 10 Generalpurpose 6 Basic 2 SPI 2 I2C 2 USART 3 USB 1 12-bit synchronized ADC Number of channels Operating temperatures 16 10 16 83 1 14 channels 1 20 channels 1 24 channels 2 2 4x32 8x28 4x18 4x44 8x40 2 13 20 Max. CPU frequency Operating voltage 128 51 Comparator Capacitive sensing channels 64 37 12-bit DAC Number of channels LCD (STM32L152xx Only) COM x SEG 128 4 10 GPIOs Packages 64 STM32L15xVx 32 MHz 1.8 V to 3.6 V (down to 1.65 V at power-down) with BOR option 1.65 V to 3.6 V without BOR option Ambient temperatures: –40 to +85 °C Junction temperature: –40 to + 105 °C LQFP48, UFQFPN48 DocID17659 Rev 12 LQFP64, BGA64 LQFP100, BGA100 11/133 48 Description 2.2 STM32L151x6/8/B STM32L152x6/8/B Ultra-low-power device continuum The ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B devices are fully pin-to-pin and software compatible. Besides the full compatibility within the family, the devices are part of STMicroelectronics microcontrollers ultra-low-power strategy which also includes STM8L101xx and STM8L15xx devices. The STM8L and STM32L families allow a continuum of performance, peripherals, system architecture and features. They are all based on STMicroelectronics ultra-low leakage process. Note: The ultra-low-power STM32L and general-purpose STM32Fxxxx families are pin-to-pin compatible. The STM8L15xxx devices are pin-to-pin compatible with the STM8L101xx devices. Please refer to the STM32F and STM8L documentation for more information on these devices. 2.2.1 Performance All families incorporate highly energy-efficient cores with both Harvard architecture and pipelined execution: advanced STM8 core for STM8L families and ARM® Cortex®-M3 core for STM32L family. In addition specific care for the design architecture has been taken to optimize the mA/DMIPS and mA/MHz ratios. This allows the ultra-low-power performance to range from 5 up to 33.3 DMIPs. 2.2.2 Shared peripherals STM8L15xxx and STM32L1xxxx share identical peripherals which ensure a very easy migration from one family to another: 2.2.3 • Analog peripherals: ADC, DAC and comparators • Digital peripherals: RTC and some communication interfaces Common system strategy To offer flexibility and optimize performance, the STM8L15xx and STM32L1xxxx families use a common architecture: 2.2.4 • Same power supply range from 1.65 V to 3.6 V, (1.65 V at power down only for STM8L15xx devices) • Architecture optimized to reach ultra-low consumption both in low power modes and Run mode • Fast startup strategy from low power modes • Flexible system clock • Ultrasafe reset: same reset strategy including power-on reset, power-down reset, brownout reset and programmable voltage detector. Features ST ultra-low-power continuum also lies in feature compatibility: 12/133 • More than 10 packages with pin count from 20 to 144 pins and size down to 3 x 3 mm • Memory density ranging from 4 to 384 Kbytes DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B Functional overview Figure 1 shows the block diagram. Figure 1. Ultra-low-power STM32L151x6/8/B and STM32L152x6/8/B block diagram dZ^ ŽŵƉϭ KDWϮͺ/EͲͬ/Eн Λs ZD^ /Ŷƚ Ws sсϭ͘ϲϱsƚŽϯ͘ϲs s ^^ Z,^ WŽǁĞƌƌĞƐĞƚ Λs ,͗&ŵĂdžсϯϮD,nj EZ^d sZ&KhdWhd WKtZ ϭϮϴ ĂĐŬƵƉŝŶƚĞƌĨĂĐĞ , Ϯ ϴϯ& yd͘/d tϴdžϰϬ;ϰdžϰϰͿ ^'dž KDdž tt' Λs d/Dϲ ϭŚĂŶŶĞů d/DϭϬ ϭŚĂŶŶĞů d/Dϭϭ ^>͕^ ĂƐ& ^>͕^͕^DƵƐ͕WDƵƐ ĂƐ& h^ͺW h^ͺD ^/d/DZ^ d/Dϵ DK^/͕D/^K͕^ VDDA VESD(HBM) Electrostatic discharge voltage (human body model) Unit V mV V see Section 6.3.11 - 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. 2. VIN maximum must always be respected. Refer to Table 11 for maximum allowed injected current values. 3. Include VREF- pin. Table 11. Current characteristics Symbol IVDDΣ IVSSΣ IIO IINJ(PIN) (2) ΣIINJ(PIN) Ratings Max. Total current into VDD/VDDA power lines (source)(1) Total current out of VSS ground lines (sink)(1) 80 80 Output current sunk by any I/O and control pin 25 Output current sourced by any I/O and control pin - 25 Injected current on five-volt tolerant I/O(3) -5/+0 Injected current on any other pin (4) Total injected current (sum of all I/O and control Unit ±5 pins)(5) ± 25 mA 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. 2. Negative injection disturbs the analog performance of the device. See note in Section 6.3.17. 3. Positive current injection is not possible on these I/Os. A negative injection is induced by VIN VDD while a negative injection is induced by VIN < VSS. IINJ(PIN) must never be exceeded. Refer to Table 10: Voltage characteristics for the maximum allowed input voltage values. 5. When several inputs are submitted to a current injection, the maximum ΣIINJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values). 52/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 12. Thermal characteristics Symbol Ratings TSTG Storage temperature range Value Unit –65 to +150 °C 150 °C Maximum junction temperature TJ 6.3 Operating conditions 6.3.1 General operating conditions Table 13. General operating conditions Symbol Parameter Conditions Min Max Unit fHCLK Internal AHB clock frequency - 0 32 fPCLK1 Internal APB1 clock frequency - 0 32 fPCLK2 Internal APB2 clock frequency - 0 32 BOR detector disabled 1.65 3.6 BOR detector enabled, at power on 1.8 3.6 BOR detector disabled, after power on 1.65 3.6 1.65 3.6 1.8 3.6 –0.3 –0.3 0 –0.3 5.5 5.25 5.5 VDD+0.3 V - 339 mW –40 85 Low power dissipation –40 105 -40 °C ≤TA ≤105°C –40 105 VDD (1) VDDA Standard operating voltage Analog operating voltage (ADC and DAC not used) Analog operating voltage (ADC or DAC used) Input voltage on FT pins(3) VIN Must be the same voltage as VDD(2) 2.0 V ≤VDD ≤ 3.6 V 1.65 V ≤ VDD ≤ 2.0 V Input voltage on BOOT0 pin Input voltage on any other pin PD Power dissipation at TA = 85 °C(4) TA Temperature range TJ Junction temperature range BGA100 package Maximum power dissipation (5) MHz V V °C °C 1. When the ADC is used, refer to Table 54: ADC characteristics. 2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and operation. 3. To sustain a voltage higher than VDD+0.3 V, the internal pull-up/pull-down resistors must be disabled. 4. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJ max (see Table 12: Thermal characteristics on page 53). 5. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJ max (see Table 12: Thermal characteristics on page 53). DocID17659 Rev 12 53/133 104 Electrical characteristics 6.3.2 STM32L151x6/8/B STM32L152x6/8/B Embedded reset and power control block characteristics The parameters given in the following table are derived from the tests performed under the ambient temperature condition summarized in the following table. Table 14. Embedded reset and power control block characteristics Symbol Parameter VDD rise time rate tVDD(1) VDD fall time rate TRSTTEMPO(1) Reset temporization VPOR/PDR Power on/power down reset threshold VBOR0 Brown-out reset threshold 0 VBOR1 Brown-out reset threshold 1 VBOR2 Brown-out reset threshold 2 VBOR3 Brown-out reset threshold 3 VBOR4 Brown-out reset threshold 4 54/133 Conditions Min Typ Max BOR detector enabled 0 - ∞ BOR detector disabled 0 - 1000 BOR detector enabled 20 - ∞ BOR detector disabled 0 - 1000 VDD rising, BOR enabled - 2 3.3 0.4 0.7 1.6 Falling edge 1 1.5 1.65 Rising edge 1.3 1.5 1.65 Falling edge 1.67 1.7 1.74 Rising edge 1.69 1.76 1.8 Falling edge 1.87 1.93 1.97 Rising edge 1.96 2.03 2.07 Falling edge 2.22 2.30 2.35 Rising edge 2.31 2.41 2.44 Falling edge 2.45 2.55 2.60 Rising edge 2.54 2.66 2.7 Falling edge 2.68 2.8 2.85 Rising edge 2.78 2.9 2.95 VDD rising, BOR DocID17659 Rev 12 disabled(2) Unit µs/V ms V V STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 14. Embedded reset and power control block characteristics (continued) Symbol Parameter Conditions VPVD0 Programmable voltage detector threshold 0 VPVD1 PVD threshold 1 VPVD2 PVD threshold 2 VPVD3 PVD threshold 3 VPVD4 PVD threshold 4 VPVD5 PVD threshold 5 VPVD6 PVD threshold 6 Vhyst Hysteresis voltage Min Typ Max Falling edge 1.8 1.85 1.88 Rising edge 1.88 1.94 1.99 Falling edge 1.98 2.04 2.09 Rising edge 2.08 2.14 2.18 Falling edge 2.20 2.24 2.28 Rising edge 2.28 2.34 2.38 Falling edge 2.39 2.44 2.48 Rising edge 2.47 2.54 2.58 Falling edge 2.57 2.64 2.69 Rising edge 2.68 2.74 2.79 Falling edge 2.77 2.83 2.88 Rising edge 2.87 2.94 2.99 Falling edge 2.97 3.05 3.09 Rising edge 3.08 3.15 3.20 BOR0 threshold - 40 - All BOR and PVD thresholds excepting BOR0 - 100 - Unit V mV 1. Guaranteed by characterization results. 2. Valid for device version without BOR at power up. Please see option "T" in Ordering information scheme for more details. DocID17659 Rev 12 55/133 104 Electrical characteristics 6.3.3 STM32L151x6/8/B STM32L152x6/8/B Embedded internal reference voltage The parameters given in the following table are based on characterization results, unless otherwise specified. Table 15. Embedded internal reference voltage calibration values Calibration value name Description Memory address Raw data acquired at 0x1FF8 0078-0x1FF8 0079 temperature of 30 °C, VDDA= 3 V VREFINT_CAL Table 16. Embedded internal reference voltage Symbol Parameter Conditions Min Typ Max Unit VREFINT out(1) Internal reference voltage IREFINT Internal reference current consumption - - 1.4 2.3 µA TVREFINT Internal reference startup time - - 2 3 ms VVREF_MEAS VDDA and VREF+voltage during VREFINT factory measure - 2.99 3 3.01 V AVREF_MEAS Accuracy of factory-measured VREF value (2) Including uncertainties due to ADC and VDDA/VREF+ values - - ±5 mV TCoeff(3) Temperature coefficient –40 °C < TJ < +105 °C - 25 100 ppm/°C ACoeff(3) Long-term stability 1000 hours, T= 25 °C - - 1000 ppm VDDCoeff(3) Voltage coefficient 3.0 V < VDDA < 3.6 V - - 2000 ppm/V – 40 °C < TJ < +105 °C 1.202 1.224 1.242 V TS_vrefint(3)(4) ADC sampling time when reading the internal reference voltage - 5 10 - µs TADC_BUF(3) Startup time of reference voltage buffer for ADC - - - 10 µs IBUF_ADC(3) Consumption of reference voltage buffer for ADC - - 13.5 25 µA IVREF_OUT(3) VREF_OUT output current(5) - - - 1 µA CVREF_OUT(3) VREF_OUT output load - - - 50 pF Consumption of reference voltage buffer for VREF_OUT and COMP - - 730 1200 nA VREFINT_DIV1(3) 1/4 reference voltage - 24 25 26 VREFINT_DIV2(3) 1/2 reference voltage - 49 50 51 VREFINT_DIV3(3) 3/4 reference voltage - 74 75 76 ILPBUF(3) 1. Tested in production. 2. The internal VREF value is individually measured in production and stored in dedicated EEPROM bytes. 3. Guaranteed by characterization results. 4. Shortest sampling time can be determined in the application by multiple iterations. 5. To guarantee less than 1% VREF_OUT deviation. 56/133 DocID17659 Rev 12 % VREFINT STM32L151x6/8/B STM32L152x6/8/B 6.3.4 Electrical characteristics Supply current characteristics The current consumption is a function of several parameters and factors such as the operating voltage, ambient temperature, I/O pin loading, device software configuration, operating frequencies, I/O pin switching rate, program location in memory and executed binary code. The current consumption is measured as described in Figure 14: Current consumption measurement scheme. All Run-mode current consumption measurements given in this section are performed with a reduced code that gives a consumption equivalent to Dhrystone 2.1 code. The current consumption values are derived from the tests performed under ambient temperature TA=25°C and VDD supply voltage conditions summarized in Table 13: General operating conditions, unless otherwise specified. The MCU is placed under the following conditions: The MCU is placed under the following conditions: • VDD = 3.6 V • All I/O pins are configured in analog input mode. • All peripherals are disabled except when explicitly mentioned • The Flash memory access time, 64-bit access and prefetch is adjusted depending on fHCLK frequency and voltage range to provide the best CPU performance. • When the peripherals are enabled fAPB1 = fAPB2 = fAHB • When PLL is ON, the PLL inputs are equal to HSI = 16 MHz (if internal clock is used) or HSE = 16 MHz (if HSE bypass mode is used). • The HSE user clock applied to OSC_IN input follows the characteristics specified in Table 26: High-speed external user clock characteristics. DocID17659 Rev 12 57/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Table 17. Current consumption in Run mode, code with data processing running from Flash Max(1) Symbol Parameter Conditions Range 3, VCORE=1.2 V VOS[1:0] = 11 IDD (Run from Flash) Supply current in Run mode, code executed from Flash fHSE = fHCLK up to 16 MHz, included fHSE = fHCLK/2 above 16 MHz (PLL ON)(2) HSI clock source (16 MHz) MSI clock, 65 kHz MSI clock, 524 kHz MSI clock, 4.2 MHz Range 2, VCORE=1.5 V VOS[1:0] = 10 Typ Unit 1 MHz 270 400 400 400 2 MHz 470 600 600 600 4 MHz 890 1025 1025 1025 4 MHz 1 1.3 1.3 1.3 8 MHz 2 2.5 2.5 2.5 16 MHz 3.9 5 5 5 55 °C 85 °C 105 °C Range 1, VCORE=1.8 V VOS[1:0] = 01 8 MHz 2.16 3 3 3 16 MHz 4.8 5.5 5.5 5.5 32 MHz 9.6 11 11 11 Range 2, VCORE=1.5 V VOS[1:0] = 10 16 MHz 4 5 5 5 Range 1, VCORE=1.8 V VOS[1:0] = 01 32 MHz 9.4 11 11 11 65 kHz 0.05 0.085 0.09 0.1 524 kHz 0.15 0.185 0.19 0.2 4.2 MHz 0.9 1 1 1 Range 3, VCORE=1.2 V VOS[1:0] = 11 1. Guaranteed by characterization results, unless otherwise specified. 2. Oscillator bypassed (HSEBYP = 1 in RCC_CR register). 58/133 fHCLK DocID17659 Rev 12 µA mA STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 18. Current consumption in Run mode, code with data processing running from RAM Max(1) Symbol Parameter Conditions fHCLK Typ 1 MHz 200 300 300 300 2 MHz 380 500 500 500 4 MHz 720 860 860 860(3) 4 MHz 0.9 1 1 1 8 MHz 1.65 2 2 2 16 MHz 3.2 3.7 3.7 3.7 8 MHz 2 2.5 2.5 2.5 16 MHz 4 4.5 4.5 4.5 32 MHz 7.7 8.5 8.5 8.5 Range 2, VCORE=1.5 V VOS[1:0] = 10 16 MHz 3.3 3.8 3.8 3.8 Range 1, VCORE=1.8 V VOS[1:0] = 01 32 MHz 7.8 9.2 9.2 9.2 65 kHz 40 60 60 80 524 kHz 110 140 140 160 4.2 MHz 700 800 800 820 Range 3, VCORE=1.2 V VOS[1:0] = 11 Supply current in Run mode, IDD (Run code executed from from RAM, RAM) Flash switched off fHSE = fHCLK up to 16 MHz, included fHSE = fHCLK/2 above 16 MHz (PLL ON)(2) Range 2, VCORE=1.5 V VOS[1:0] = 10 Range 1, VCORE=1.8 V VOS[1:0] = 01 HSI clock source (16 MHz) MSI clock, 65 kHz Range 3, MSI clock, 524 kHz VCORE=1.2 V VOS[1:0] = 11 MSI clock, 4.2 MHz Unit 55 °C 85 °C 105 °C µA mA µA 1. Guaranteed by characterization results, unless otherwise specified. 2. Oscillator bypassed (HSEBYP = 1 in RCC_CR register). 3. Tested in production. DocID17659 Rev 12 59/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Table 19. Current consumption in Sleep mode Max(1) Symbol Parameter Conditions Range 3, VCORE=1.2 V VOS[1:0] = 11 fHSE = fHCLK up to Range 2, 16 MHz included, VCORE=1.5 V fHSE = fHCLK/2 above 16 MHz (PLL VOS[1:0] = 10 ON)(2) Supply current in Sleep mode, code executed from RAM, Flash switched HSI clock source OFF (16 MHz) 60/133 80 140 140 140 2 MHz 150 210 210 210 4 MHz 280 330 330 330(3) 4 MHz 280 400 400 400 8 MHz 450 550 550 550 16 MHz 900 1050 1050 1050 8 MHz 550 650 16 MHz 1050 1200 1200 1200 32 MHz 2300 2500 2500 2500 Range 2, VCORE=1.5 V VOS[1:0] = 10 16 MHz 1000 1100 1100 1100 Range 1, VCORE=1.8 V VOS[1:0] = 01 32 MHz 2300 2500 2500 2500 fHSE = fHCLK up to 16 MHz included, Range 2, fHSE = fHCLK/2 VCORE=1.5 V above 16 MHz (PLL VOS[1:0] = 10 ON)(2) HSI clock source (16 MHz) 1 MHz 650 Range 3, VCORE=1.2 V VOS[1:0] = 11 Supply current in Sleep mode, code executed from Flash Unit 55 °C 85 °C 105 °C 650 Range 3, MSI clock, 524 kHz VCORE=1.2 V VOS[1:0] = 11 MSI clock, 4.2 MHz (Sleep) Typ Range 1, VCORE=1.8 V VOS[1:0] = 01 MSI clock, 65 kHz IDD fHCLK 65 kHz 30 50 50 60 524 kHz 50 70 70 80 4.2 MHz 200 240 240 250 1 MHz 80 140 140 140 2 MHz 150 210 210 210 4 MHz 290 350 350 350 4 MHz 300 400 400 400 8 MHz 500 600 600 600 16 MHz 1000 1100 1100 1100 8 MHz Range 1, VCORE=1.8 V VOS[1:0] = 01 650 650 650 16 MHz 1050 1200 1200 1200 32 MHz 2300 2500 2500 2500 Range 2, VCORE=1.5 V VOS[1:0] = 10 16 MHz 1000 1100 1100 1100 Range 1, VCORE=1.8 V VOS[1:0] = 01 32 MHz 2300 2500 2500 2500 DocID17659 Rev 12 550 µA µA STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 19. Current consumption in Sleep mode (continued) Max(1) Symbol Parameter IDD (Sleep) Conditions Supply MSI clock, 65 kHz current in MSI clock, 524 kHz Sleep Range 3, mode, VCORE=1.2V VOS[1:0] = 11 code MSI clock, 4.2 MHz executed from Flash fHCLK Typ Unit 65 kHz 40 70 70 80 524 kHz 60 90 90 100 55 °C 85 °C 105 °C µA 4.2 MHz 210 250 250 260 1. Guaranteed by characterization results, unless otherwise specified. 2. Oscillator bypassed (HSEBYP = 1 in RCC_CR register) 3. Tested in production DocID17659 Rev 12 61/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Table 20. Current consumption in Low power run mode Symbol Parameter Conditions All peripherals OFF, code executed from RAM, Flash switched OFF, VDD from 1.65 V to 3.6 V IDD (LP Run) Supply current in Low power run mode MSI clock, 65 kHz fHCLK = 65 kHz MSI clock, 131 kHz fHCLK = 131 kHz MSI clock, 65 kHz fHCLK = 32 kHz All peripherals OFF, code executed from Flash, VDD from 1.65 V to 3.6 V IDD Max (LP Run)(2) MSI clock, 65 kHz fHCLK = 32 kHz Max allowed VDD from current in 1.65 V to Low power 3.6 V run mode MSI clock, 65 kHz fHCLK = 65 kHz MSI clock, 131 kHz fHCLK = 131 kHz Typ TA = -40 °C to 25 °C Max (1) 9 12 TA = 85 °C 17.5 24 TA = 105 °C 31 46 TA = -40 °C to 25 °C 14 17 TA = 85 °C 22 29 TA = 105 °C 35 51 TA = -40 °C to 25 °C 37 42 TA = 55 °C 37 42 TA = 85 °C 37 42 TA = 105 °C 48 65 TA = -40 °C to 25 °C 24 32 TA = 85 °C 33 42 TA = 105 °C 48 64 TA = -40 °C to 25 °C 31 40 TA = 85 °C 40 48 TA = 105 °C 54 70 TA = -40 °C to 25 °C 48 58 TA = 55 °C 54 63 TA = 85 °C 56 65 TA = 105 °C 70 90 - 200 - - 1. Guaranteed by characterization results, unless otherwise specified. 2. This limitation is related to the consumption of the CPU core and the peripherals that are powered by the regulator. Consumption of the I/Os is not included in this limitation. 62/133 DocID17659 Rev 12 Unit µA STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 21. Current consumption in Low power sleep mode Symbol Parameter Conditions MSI clock, 65 kHz fHCLK = 32 kHz Flash OFF MSI clock, 65 kHz fHCLK = 32 kHz Flash ON All peripherals OFF, VDD MSI clock, 65 kHz from 1.65 V f HCLK = 65 kHz, to 3.6 V Flash ON IDD (LP Sleep) Typ TA = -40 °C to 25 °C MSI clock, 65 kHz fHCLK = 32 kHz TIM9 and USART1 enabled, Flash ON, VDD from 1.65 V to 3.6 V MSI clock, 65 kHz fHCLK = 65 kHz TA = 85 °C 22 27 TA = 105 °C 31 39 TA = -40 °C to 25 °C 18 26 TA = 85 °C 23 28 TA = 105 °C 31 40 22 30 24 32 26 34 34 45 TA = -40 °C to 25 °C 17.5 25 TA = 85 °C 22 27 TA = 105 °C 31 39 TA = -40 °C to 25 °C 18 26 TA = 85 °C 23 28 TA = 105 °C 31 40 TA = -40 °C to 25 °C 22 30 24 32 26 34 34 45 - 200 MSI clock, 131 kHz TA = 55 °C fHCLK = 131 kHz TA = 85 °C - - Unit 25 TA = 105 °C Max allowed VDD from IDD Max current in 1.65 V to (LP Sleep) Low power 3.6 V Sleep mode (1) TA = -40 °C to 25 °C 17.5 TA = -40 °C to 25 °C MSI clock, 131 kHz T = 55 °C A fHCLK = 131 kHz, T A = 85 °C Flash ON TA = 105 °C Supply current in Low power sleep mode 4.4 Max µA 1. Guaranteed by characterization results, unless otherwise specified. DocID17659 Rev 12 63/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Table 22. Typical and maximum current consumptions in Stop mode Symbol Parameter Typ Max TA = -40°C to 25°C VDD = 1.8 V 1.2 2.75 TA = -40°C to 25°C 1.4 4 TA = 55°C 2.6 6 TA= 85°C 4.8 10 TA = 105°C 10.2 23 TA = -40°C to 25°C 3.3 6 4.5 8 6.6 12 TA = 105°C 13.6 27 TA = -40°C to 25°C 7.7 10 8.6 12 10.7 16 TA = 105°C 19.8 40 TA = -40°C to 25°C 1.6 4 TA = 55°C 2.7 6 TA= 85°C 4.8 10 TA = 105°C 10.3 23 TA = -40°C to 25°C 3.6 6 TA = 55°C 4.6 8 TA= 85°C 6.7 12 TA = 105°C 10.9 23 TA = -40°C to 25°C 7.6 10 8.6 12 10.7 16 19.8 40 Conditions LCD OFF RTC clocked by LSI, regulator in LP mode, HSI and HSE OFF (no independent watchdog) (1) LCD ON T = 55°C A (static duty)(3) TA= 85°C LCD ON T = 55°C A (1/8 duty)(4) TA= 85°C Supply current IDD (Stop in Stop mode with RTC) with RTC enabled LCD OFF RTC clocked by LSE external clock (32.768 LCD ON kHz), regulator in LP (static mode, HSI and HSE duty)(3) OFF (no independent watchdog) LCD ON T = 55°C A (1/8 duty)(4) TA= 85°C TA = 105°C RTC clocked by LSE (no independent watchdog)(5) 64/133 LCD OFF DocID17659 Rev 12 (1)(2) TA = -40°C to 25°C 1.45 VDD = 1.8 V - TA = -40°C to 25°C VDD = 3.0 V 1.9 - TA = -40°C to 25°C VDD = 3.6 V 2.2 - Unit µA STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 22. Typical and maximum current consumptions in Stop mode (continued) Symbol Parameter Typ Max TA = -40°C to 25°C 1.1 2.2 TA = -40°C to 25°C 0.5 0.9 TA = 55°C 1.9 5 TA= 85°C 3.7 8 TA = 105°C 8.9 20(6) 2 - 1.45 - Conditions Regulator in LP mode, HSI and HSE OFF, independent watchdog and LSI enabled Supply current in Stop mode IDD (Stop) (RTC Regulator in LP mode, LSI, HSI disabled) and HSE OFF (no independent watchdog) RMS (root MSI = 4.2 MHz mean square) MSI = 1.05 MHz supply current IDD (WU during wakeup from Stop) time when MSI = 65 kHz(7) exiting from Stop mode (1) VDD = 3.0 V TA = -40°C to 25°C Unit (1)(2) µA mA 1.45 - 1. The typical values are given for VDD = 3.0 V and max values are given for VDD = 3.6 V, unless otherwise specified. 2. Guaranteed by characterization results, unless otherwise specified 3. LCD enabled with external VLCD, static duty, division ratio = 256, all pixels active, no LCD connected 4. LCD enabled with external VLCD, 1/8 duty, 1/3 bias, division ratio = 64, all pixels active, no LCD connected. 5. Based on characterization done with a 32.768 kHz crystal (MC306-G-06Q-32.768, manufacturer JFVNY) with two 6.8pF loading capacitors. 6. Tested in production 7. When MSI = 64 kHz, the RMS current is measured over the first 15 µs following the wakeup event. For the remaining time of the wakeup period, the current is similar to the Run mode current. DocID17659 Rev 12 65/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Table 23. Typical and maximum current consumptions in Standby mode Symbol Parameter RTC clocked by LSI (no independent watchdog) IDD (Standby with RTC) Supply current in Standby mode with RTC enabled RTC clocked by LSE (no independent watchdog)(3) Independent watchdog and LSI enabled IDD (Standby) Supply current in Standby mode with RTC disabled Independent watchdog and LSI OFF (1)(2) TA = -40 °C to 25 °C VDD = 1.8 V 0.9 - TA = -40 °C to 25 °C 1.1 1.8 TA = 55 °C 1.42 2.5 TA= 85 °C 1.87 3 TA = 105 °C 2.78 5 TA = -40 °C to 25 °C VDD = 1.8 V 1 - TA = -40 °C to 25 °C 1.33 2.9 TA = 55 °C 1.59 3.4 TA= 85 °C 2.01 4.3 TA = 105 °C 3.27 6.3 TA = -40 °C to 25 °C 1.1 1.6 TA = -40 °C to 25 °C 0.3 0.55 TA = 55 °C 0.5 0.8 TA = 85 °C 1 1.7 2.5 4(4) 1 - TA = 105 °C IDD (WU from Standby) RMS supply current during wakeup time when exiting from Standby mode - Max Typ(1) Conditions VDD = 3.0 V TA = -40 °C to 25 °C Unit µA 1. The typical values are given for VDD = 3.0 V and max values are given for VDD = 3.6 V, unless otherwise specified. 2. Guaranteed by characterization results, unless otherwise specified. 3. Based on characterization done with a 32.768 kHz crystal (MC306-G-06Q-32.768, manufacturer JFVNY) with two 6.8pF loading capacitors. 4. Tested in production. On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in the following table. The MCU is placed under the following conditions: 66/133 • all I/O pins are in input mode with a static value at VDD or VSS (no load) • all peripherals are disabled unless otherwise mentioned • the given value is calculated by measuring the current consumption – with all peripherals clocked off – with only one peripheral clocked on DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 24. Peripheral current consumption(1) Typical consumption, VDD = 3.0 V, TA = 25 °C Peripheral TIM2 13 10.5 8 10.5 TIM3 14 12 9 12 TIM4 12.5 10.5 8 11 TIM6 5.5 4.5 3.5 4.5 TIM7 5.5 5 3.5 4.5 LCD 5.5 5 3.5 5 4 3.5 2.5 3.5 5.5 5 4 5 USART2 9 8 5.5 8.5 USART3 10.5 9 6 8 I2C1 8.5 7 5.5 7.5 I2C2 8.5 7 5.5 6.5 USB 12.5 10 6.5 10 PWR 4.5 4 3 3.5 DAC 9 7.5 6 7 4.5 4 3.5 4.5 SYSCFG & RI 3 2.5 2 2.5 TIM9 9 7.5 6 7 TIM10 6.5 5.5 4.5 5.5 TIM11 7 6 4.5 5.5 ADC(2) 11.5 9.5 8 9 SPI1 5 4.5 3 4 USART1 9 7.5 6 7.5 WWDG APB1 SPI2 COMP APB2 Range 2, Range 3, Range 1, Low power VCORE=1.8 V VCORE=1.5 V VCORE=1.2 V sleep and run VOS[1:0] = 01 VOS[1:0] = 10 VOS[1:0] = 11 DocID17659 Rev 12 Unit µA/MHz (fHCLK) µA/MHz (fHCLK) 67/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Table 24. Peripheral current consumption(1) (continued) Typical consumption, VDD = 3.0 V, TA = 25 °C Peripheral AHB Range 2, Range 3, Range 1, Low power VCORE=1.8 V VCORE=1.5 V VCORE=1.2 V sleep and run VOS[1:0] = 01 VOS[1:0] = 10 VOS[1:0] = 11 GPIOA 5 4.5 3.5 4 GPIOB 5 4.5 3.5 4.5 GPIOC 5 4.5 3.5 4.5 GPIOD 5 4.5 3.5 4.5 GPIOE 5 4.5 3.5 4.5 GPIOH 4 4 3 3.5 CRC 1 0.5 0.5 0.5 FLASH 13 11.5 9 18.5 DMA1 12 10 8 10.5 166 138 106 130 All enabled IDD (RTC) 0.47 IDD (LCD) 3.1 IDD (ADC)(3) 340 IDD (COMP1) 0.16 IDD (COMP2) µA/MHz (fHCLK) 1450 (4) IDD (DAC) Unit Slow mode 2 Fast mode 5 IDD (PVD / BOR)(5) 2.6 IDD (IWDG) 0.25 µA 1. Data based on differential IDD measurement between all peripherals OFF an one peripheral with clock enabled, in the following conditions: fHCLK = 32 MHz (Range 1), fHCLK = 16 MHz (Range 2), fHCLK = 4 MHz (Range 3), fHCLK = 64kHz (Low power run/sleep), fAPB1 = fHCLK, fAPB2 = fHCLK, default prescaler value for each peripheral. The CPU is in Sleep mode in both cases. No I/O pins toggling. 2. HSI oscillator is OFF for this measure. 3. Data based on a differential IDD measurement between ADC in reset configuration and continuous ADC conversion (HSI consumption not included). 4. Data based on a differential IDD measurement between DAC in reset configuration and continuous DAC conversion of VDD/2. DAC is in buffered mode, output is left floating. 5. Including supply current of internal reference voltage. 68/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B 6.3.5 Electrical characteristics Wakeup time from Low power mode The wakeup times given in the following table are measured with the MSI RC oscillator. The clock source used to wake up the device depends on the current operating mode: • Sleep mode: the clock source is the clock that was set before entering Sleep mode • Stop mode: the clock source is the MSI oscillator in the range configured before entering Stop mode • Standby mode: the clock source is the MSI oscillator running at 2.1 MHz All timings are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 13. Table 25. Low-power mode wakeup timings Symbol Parameter tWUSLEEP Wakeup from Sleep mode tWUSLEEP_LP Wakeup from Low power sleep mode fHCLK = 262 kHz tWUSTDBY Typ Max(1) Unit fHCLK = 32 MHz 0.36 - fHCLK = 262 kHz Flash enabled 32 - fHCLK = 262 kHz Flash switched OFF 34 - fHCLK = fMSI = 4.2 MHz 8.2 - fHCLK = fMSI = 4.2 MHz Voltage Range 1 and 2 8.2 9.3 fHCLK = fMSI = 4.2 MHz Voltage Range 3 7.8 11.2 fHCLK = fMSI = 2.1 MHz 10 12 fHCLK = fMSI = 1.05 MHz 15.5 20 fHCLK = fMSI = 524 kHz 29 35 fHCLK = fMSI = 262 kHz 53 63 fHCLK = fMSI = 131 kHz 105 118 fHCLK = MSI = 65 kHz 210 237 Wakeup from Standby mode FWU bit = 1 fHCLK = MSI = 2.1 MHz 50 103 Wakeup from Standby mode FWU bit = 0 fHCLK = MSI = 2.1 MHz 2.5 3.2 Wakeup from Stop mode, regulator in Run mode tWUSTOP Conditions Wakeup from Stop mode, regulator in low power mode µs ms 1. Guaranteed by characterization results, unless otherwise specified DocID17659 Rev 12 69/133 104 Electrical characteristics 6.3.6 STM32L151x6/8/B STM32L152x6/8/B External clock source characteristics High-speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal has to respect the I/O characteristics in Section 6.3.13. However, the recommended clock input waveform is shown in Figure 15: High-speed external clock source AC timing diagram. Table 26. High-speed external user clock characteristics(1) Symbol fHSE_ext Parameter User external clock source frequency Conditions Min CSS is on or PLL is used 1 CSS is off, PLL not used 0 Typ Max Unit 8 32 MHz VHSEH OSC_IN input pin high level voltage 0.7VDD - VDD VHSEL OSC_IN input pin low level voltage VSS - 0.3VDD 12 - - - - 20 - - 2.6 - pF - 45 - 55 % VSS ≤VIN ≤VDD - - ±1 µA tw(HSEH) tw(HSEL) OSC_IN high or low time tr(HSE) tf(HSE) OSC_IN rise or fall time Cin(HSE) - ns OSC_IN input capacitance DuCy(HSE) Duty cycle IL V OSC_IN Input leakage current 1. Guaranteed by design. Figure 15. High-speed external clock source AC timing diagram WZ+6(+ 9+6(+  9+6(/  WU+6( WI+6( WZ+6(/ W 7+6( 069 70/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Low-speed external user clock generated from an external source The characteristics given in the following table result from tests performed using a lowspeed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 13. Table 27. Low-speed external user clock characteristics(1) Symbol Parameter Conditions fLSE_ext User external clock source frequency VLSEH OSC32_IN input pin high level voltage VLSEL OSC32_IN input pin low level voltage tw(LSEH) tw(LSEL) OSC32_IN high or low time tr(LSE) tf(LSE) OSC32_IN rise or fall time CIN(LSE) Typ Max Unit 1 32.768 1000 kHz 0.7VDD - VDD V - VSS - 0.3VDD 465 - ns - - 10 - - 0.6 - pF - 45 - 55 % VSS ≤VIN ≤VDD - - ±1 µA OSC32_IN input capacitance DuCy(LSE) Duty cycle IL Min OSC32_IN Input leakage current 1. Guaranteed by design. Figure 16. Low-speed external clock source AC timing diagram WZ/6(+ 9/6(+  9/6(/  WU/6( WI/6( W WZ/6(/ 7/6( 069 High-speed external clock generated from a crystal/ceramic resonator The high-speed external (HSE) clock can be supplied with a 1 to 24 MHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 28. In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup stabilization time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). DocID17659 Rev 12 71/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Table 28. HSE oscillator characteristics(1)(2) Symbol Parameter Conditions fOSC_IN Oscillator frequency - RF Feedback resistor C Recommended load capacitance versus equivalent serial resistance of the crystal (RS)(3) IHSE IDD(HSE) gm tSU(HSE) (4) Min Typ HSE oscillator power consumption Oscillator transconductance Startup time Unit 24 MHz 200 - kΩ 1 - HSE driving current Max RS = 30 Ω - 20 - pF VDD= 3.3 V, VIN = VSS with 30 pF load - - 3 mA C = 20 pF fOSC = 16 MHz - - 2.5 (startup) 0.7 (stabilized) mA C = 10 pF fOSC = 16 MHz - - 2.5 (startup) 0.46 (stabilized) Startup 3.5 - - mA /V VDD is stabilized - 1 - ms 1. Resonator characteristics given by the crystal/ceramic resonator manufacturer. 2. Guaranteed by characterization results. 3. The relatively low value of the RF resistor offers a good protection against issues resulting from use in a humid environment, due to the induced leakage and the bias condition change. However, it is recommended to take this point into account if the MCU is used in tough humidity conditions. 4. tSU(HSE) is the startup time measured from the moment it is enabled (by software) to a stabilized 8 MHz oscillation is reached. This value is measured for a standard crystal resonator and it can vary significantly with the crystal manufacturer. For CL1 and CL2, it is recommended to use high-quality external ceramic capacitors in the 5 pF to 25 pF range (typ.), designed for high-frequency applications, and selected to match the requirements of the crystal or resonator (see Figure 17). CL1 and CL2 are usually the same size. The crystal manufacturer typically specifies a load capacitance which is the series combination of CL1 and CL2. PCB and MCU pin capacitance must be included (10 pF can be used as a rough estimate of the combined pin and board capacitance) when sizing CL1 and CL2. Refer to the application note AN2867 “Oscillator design guide for ST microcontrollers” available from the ST website www.st.com. 72/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Figure 17. HSE oscillator circuit diagram I+6(WRFRUH 5P 5) &2 /P &/ 26&B,1 &P JP 5HVRQDWRU &RQVXPSWLRQ FRQWURO 5HVRQDWRU 670 26&B287 &/ DLE 1. REXT value depends on the crystal characteristics. Low-speed external clock generated from a crystal/ceramic resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 29. In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup stabilization time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 29. LSE oscillator characteristics (fLSE = 32.768 kHz)(1) Symbol Parameter Conditions Min Typ Max Unit fLSE Low speed external oscillator frequency - - 32.768 - kHz RF Feedback resistor - - 1.2 - MΩ C(2) Recommended load capacitance versus equivalent serial resistance of the crystal (RS)(3) RS = 30 kΩ - 8 - pF ILSE LSE driving current VDD = 3.3 V, VIN = VSS - - 1.1 µA VDD = 1.8 V - 450 - VDD = 3.0 V - 600 - VDD = 3.6V - 750 - - 3 - - µA/V VDD is stabilized - 1 - s IDD (LSE) gm LSE oscillator current consumption Oscillator transconductance tSU(LSE)(4) Startup time nA 1. Guaranteed by characterization results. 2. Refer to the note and caution paragraphs below the table, and to the application note AN2867 “Oscillator design guide for ST microcontrollers”. 3. The oscillator selection can be optimized in terms of supply current using an high quality resonator with small RS value for example MSIV-TIN32.768kHz. Refer to crystal manufacturer for more details. DocID17659 Rev 12 73/133 104 Electrical characteristics 4. STM32L151x6/8/B STM32L152x6/8/B tSU(LSE) is the startup time measured from the moment it is enabled (by software) to a stabilized 32.768 kHz oscillation is reached. This value is measured for a standard crystal resonator and it can vary significantly with the crystal manufacturer. Note: For CL1 and CL2, it is recommended to use high-quality ceramic capacitors in the 5 pF to 15 pF range selected to match the requirements of the crystal or resonator (see Figure 18 ). CL1 and CL2, are usually the same size. The crystal manufacturer typically specifies a load capacitance which is the series combination of CL1 and CL2. Load capacitance CL has the following formula: CL = CL1 x CL2 / (CL1 + CL2) + Cstray where Cstray is the pin capacitance and board or trace PCB-related capacitance. Typically, it is between 2 pF and 7 pF. Caution: To avoid exceeding the maximum value of CL1 and CL2 (15 pF) it is strongly recommended to use a resonator with a load capacitance CL ≤ 7 pF. Never use a resonator with a load capacitance of 12.5 pF. Example: if a resonator is chosen with a load capacitance of CL = 6 pF and Cstray = 2 pF, then CL1 = CL2 = 8 pF. Figure 18. Typical application with a 32.768 kHz crystal 5HVRQDWRUZLWK LQWHJUDWHGFDSDFLWRUV &/ I/6( 26&B,1 N+] UHVRQDWRU 5) 26&B287 %LDV FRQWUROOHG JDLQ 670/[[ &/ DLE 74/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B 6.3.7 Electrical characteristics Internal clock source characteristics The parameters given in the following table are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 13. High-speed internal (HSI) RC oscillator Table 30. HSI oscillator characteristics Symbol fHSI TRIM (1)(2) Parameter Conditions Min Typ Max Unit Frequency VDD = 3.0 V - 16 - MHz HSI user-trimmed resolution Trimming code is not a multiple of 16 - ± 0.4 0.7 % Trimming code is a multiple of 16 - Accuracy of the ACCHSI(2) factory-calibrated HSI oscillator - ± 1.5 % VDDA = 3.0 V, TA = 25 °C -1(3) - 1(3) % VDDA = 3.0 V, TA = 0 to 55 °C -1.5 - 1.5 % VDDA = 3.0 V, TA = -10 to 70 °C -2 - 2 % VDDA = 3.0 V, TA = -10 to 85 °C -2.5 - 2 % VDDA = 3.0 V, TA = -10 to 105 °C -4 - 2 % VDDA = 1.65 V to 3.6 V TA = -40 to 105 °C -4 - 3 % tSU(HSI)(2) HSI oscillator startup time - - 3.7 6 µs IDD(HSI)(2) HSI oscillator power consumption - - 100 140 µA 1. The trimming step differs depending on the trimming code. It is usually negative on the codes which are multiples of 16 (0x00, 0x10, 0x20, 0x30...0xE0). 2. Guaranteed by characterization results. 3. Tested in production. Low-speed internal (LSI) RC oscillator Table 31. LSI oscillator characteristics Symbol Parameter Min Typ Max Unit fLSI(1) LSI frequency 26 38 56 kHz DLSI(2) LSI oscillator frequency drift 0°C ≤TA ≤ 85°C -10 - 4 % LSI oscillator startup time - - 200 µs LSI oscillator power consumption - 400 510 nA tsu(LSI)(3) IDD(LSI) (3) 1. Tested in production. 2. This is a deviation for an individual part, once the initial frequency has been measured. 3. Guaranteed by design. DocID17659 Rev 12 75/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Multi-speed internal (MSI) RC oscillator Table 32. MSI oscillator characteristics Symbol Condition Typ Max MSI range 0 65.5 - MSI range 1 131 - MSI range 2 262 - MSI range 3 524 - MSI range 4 1.05 - MSI range 5 2.1 - MSI range 6 4.2 - Frequency error after factory calibration - ±0.5 - % DTEMP(MSI)(1) MSI oscillator frequency drift 0 °C ≤TA ≤85 °C - ±3 - % DVOLT(MSI)(1) MSI oscillator frequency drift 1.65 V ≤VDD ≤3.6 V, TA = 25 °C - - 2.5 %/V MSI range 0 0.75 - MSI range 1 1 - MSI range 2 1.5 - MSI range 3 2.5 - MSI range 4 4.5 - MSI range 5 8 - MSI range 6 15 - MSI range 0 30 - MSI range 1 20 - MSI range 2 15 - MSI range 3 10 - MSI range 4 6 - MSI range 5 5 - MSI range 6, Voltage range 1 and 2 3.5 - MSI range 6, Voltage range 3 5 - fMSI ACCMSI IDD(MSI)(2) tSU(MSI) 76/133 Parameter Frequency after factory calibration, done at VDD= 3.3 V and TA = 25 °C MSI oscillator power consumption MSI oscillator startup time DocID17659 Rev 12 Unit kHz MHz µA µs STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Table 32. MSI oscillator characteristics (continued) Symbol tSTAB(MSI)(2) fOVER(MSI) Parameter Condition MSI oscillator stabilization time MSI oscillator frequency overshoot Typ Max MSI range 0 - 40 MSI range 1 - 20 MSI range 2 - 10 MSI range 3 - 4 MSI range 4 - 2.5 MSI range 5 - 2 MSI range 6, Voltage range 1 and 2 - 2 MSI range 3, Voltage Range 3 - 3 Any range to range 5 - 4 Any range to range 6 - Unit µs MHz 6 1. This is a deviation for an individual part, once the initial frequency has been measured. 2. Guaranteed by characterization results. 6.3.8 PLL characteristics The parameters given in Table 33 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 13. Table 33. PLL characteristics Value Symbol Parameter Unit Min Typ Max(1) PLL input clock(2) 2 - 24 MHz PLL input clock duty cycle 45 - 55 % fPLL_OUT PLL output clock 2 - 32 MHz tLOCK Worst case PLL lock time PLL input = 2 MHz PLL VCO = 96 MHz - 100 130 µs Jitter Cycle-to-cycle jitter - - ± 600 ps IDDA(PLL) Current consumption on VDDA - 220 450 IDD(PLL) Current consumption on VDD - 120 150 fPLL_IN µA 1. Guaranteed by characterization results. 2. Take care of using the appropriate multiplier factors so as to have PLL input clock values compatible with the range defined by fPLL_OUT. DocID17659 Rev 12 77/133 104 Electrical characteristics 6.3.9 STM32L151x6/8/B STM32L152x6/8/B Memory characteristics The characteristics are given at TA = -40 to 105 °C unless otherwise specified. RAM memory Table 34. RAM and hardware registers Symbol VRM Parameter Data retention Conditions mode(1) STOP mode (or RESET) Min Typ Max Unit 1.65 - - V 1. Minimum supply voltage without losing data stored in RAM (in Stop mode or under Reset) or in hardware registers (only in Stop mode). Flash memory and data EEPROM Table 35. Flash memory and data EEPROM characteristics Symbol Parameter VDD Operating voltage Read / Write / Erase tprog Programming / erasing time for byte / word / double word / halfpage Average current during whole program/erase operation IDD Maximum current (peak) during program/erase operation Max(1) Unit Conditions Min Typ - 1.65 - 3.6 Erasing - 3.28 3.94 Programming - 3.28 3.94 - 300 - µA - 1.5 2.5 mA V ms TA = 25 °C, VDD = 3.6 V 1. Guaranteed by design. Table 36. Flash memory, data EEPROM endurance and data retention Value Symbol NCYC(2) Parameter Cycling (erase / write) Program memory Cycling (erase / write) EEPROM data memory Data retention (program memory) after 10 kcycles at TA = 85 °C tRET (2) Data retention (EEPROM data memory) after 300 kcycles at TA = 85 °C Data retention (program memory) after 10 kcycles at TA = 105 °C Data retention (EEPROM data memory) after 300 kcycles at TA = 105 °C Conditions TA = -40°C to 105 °C 10 - - 300 - - 30 - - 30 - - 10 - - 10 - - Unit kcycles TRET = +85 °C years TRET = +105 °C 1. Guaranteed by characterization results. 2. Characterization is done according to JEDEC JESD22-A117. 78/133 Min(1) Typ Max DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B 6.3.10 Electrical characteristics EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs. The failure is indicated by the LEDs: • Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard. • FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and VSS through a 100 pF capacitor, until a functional disturbance occurs. This test is compliant with the IEC 61000-4-4 standard. A device reset allows normal operations to be resumed. The test results are given in Table 37. They are based on the EMS levels and classes defined in application note AN1709. Table 37. EMS characteristics Symbol Parameter Conditions VFESD VDD = 3.3 V, LQFP100, TA = +25 °C, Voltage limits to be applied on any I/O pin to fHCLK = 32 MHz induce a functional disturbance conforms to IEC 61000-4-2 VEFTB Fast transient voltage burst limits to be applied through 100 pF on VDD and VSS pins to induce a functional disturbance Level/ Class VDD = 3.3 V, LQFP100, TA = +25 °C, fHCLK = 32 MHz conforms to IEC 61000-4-4 2B 4A Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. Software recommendations The software flowchart must include the management of runaway conditions such as: • Corrupted program counter • Unexpected reset • Critical data corruption (control registers...) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the oscillator pins for 1 second. DocID17659 Rev 12 79/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Electromagnetic Interference (EMI) The electromagnetic field emitted by the device are monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with IEC 61967-2 standard which specifies the test board and the pin loading. Table 38. EMI characteristics Max vs. frequency range Symbol SEMI 6.3.11 Parameter Peak level Conditions VDD = 3.3 V, TA = 25 °C, LQFP100 package compliant with IEC 61967-2 Monitored frequency band 4 MHz 16 MHz voltage Range 3 voltage Range 2 32 MHz voltage Range 1 0.1 to 30 MHz 3 -6 -5 30 to 130 MHz 18 4 -7 130 MHz to 1GHz 15 5 -7 SAE EMI Level 2.5 2 1 Unit dBµV - Electrical sensitivity characteristics Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test conforms to the JESD22-A114/C101 standard. Table 39. ESD absolute maximum ratings Symbol Ratings Conditions Packages Class Maximum value(1) VESD(HBM) Electrostatic discharge voltage TA = +25 °C, conforming to (human body model) JESD22-A114 All 2 2000 VESD(CDM) Electrostatic discharge voltage TA = +25 °C, conforming to (charge device model) JESD22-C101 All III 500 1. Guaranteed by characterization results. 80/133 DocID17659 Rev 12 Unit V STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage is applied to each power supply pin • A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78A IC latch-up standard. Table 40. Electrical sensitivities Symbol LU 6.3.12 Parameter Static latch-up class Conditions Class TA = +105 °C conforming to JESD78A II level A I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard pins) should be avoided during normal product operation. However, in order to give an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens, susceptibility tests are performed on a sample basis during device characterization. Functional susceptibility to I/O current injection While a simple application is executed on the device, the device is stressed by injecting current into the I/O pins programmed in floating input mode. While current is injected into the I/O pin, one at a time, the device is checked for functional failures. The failure is indicated by an out of range parameter: ADC error, out of spec current injection on adjacent pins or other functional failure (for example reset, oscillator frequency deviation, LCD levels, etc.). The test results are given in Table 41. Table 41. I/O current injection susceptibility Functional susceptibility Symbol IINJ Note: Description Negative injection Positive injection Injected current on all 5 V tolerant (FT) pins -5 +0 Injected current on any other pin -5 +5 Unit mA It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative currents. DocID17659 Rev 12 81/133 104 Electrical characteristics 6.3.13 STM32L151x6/8/B STM32L152x6/8/B I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 42 are derived from tests performed under conditions summarized in Table 13. All I/Os are CMOS and TTL compliant. Table 42. I/O static characteristics Symbol Parameter VIL Input low level voltage VIH Input high level voltage Vhys Ilkg RPU Conditions - FT I/O I/O pin capacitance - 0.7 VDD - Max 10% 0.3VDD - - - - VDD(3) - VSS ≤VIN ≤VDD I/Os with LCD - - ±50 VSS ≤VIN ≤VDD I/Os with analog switches - - ±50 VSS ≤VIN ≤VDD I/Os with analog switches and LCD - - ±50 VSS ≤VIN ≤VDD I/Os with USB - - TBD FT I/O VDD ≤VIN ≤5V - - TBD VSS ≤VIN ≤VDD Standard I/Os - - ±50 VIN = VSS 30 45 60 kΩ VIN = VDD 30 45 60 kΩ - 5 - pF - - 1. Tested in production 2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization. 3. With a minimum of 200 mV. Based on characterization results. 4. With a minimum of 100 mV. Based on characterization results. 5. The max. value may be exceeded if negative current is injected on adjacent pins. 6. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order). 82/133 V - (6) 5% VDD (4) Unit (1) FT I/O Weak pull-up equivalent resistor(6)(1) CIO Typ - Standard I/O Input leakage current (5) Weak pull-down equivalent resistor - Standard I/O I/O Schmitt trigger voltage hysteresis(2) RPD Min DocID17659 Rev 12 nA STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with the non-standard VOL/VOH specifications given in Table 43. In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.2: • The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating IVDDΣ (see Table 11). • The sum of the currents sunk by all the I/Os on VSS plus the maximum Run consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating IVSSΣ (see Table 11). Output voltage levels Unless otherwise specified, the parameters given in Table 43 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 13. All I/Os are CMOS and TTL compliant. Table 43. Output voltage characteristics Symbol Parameter VOL(1)(2) Output low level voltage for an I/O pin VOH(3)(2) Output high level voltage for an I/O pin VOL (1)(4) Output low level voltage for an I/O pin VOH (3)(4) Output high level voltage for an I/O pin VOL(1)(4) Output low level voltage for an I/O pin VOH(3)(4) Output high level voltage for an I/O pin Conditions Min Max IIO = 8 mA 2.7 V < VDD < 3.6 V - 0.4 2.4 - - 0.45 VDD-0.45 - - 1.3 VDD-1.3 - IIO = 4 mA 1.65 V < VDD < 2.7 V IIO = 20 mA 2.7 V < VDD < 3.6 V Unit V 1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 11 and the sum of IIO (I/O ports and control pins) must not exceed IVSS. 2. Tested in production. 3. The IIO current sourced by the device must always respect the absolute maximum rating specified in Table 11 and the sum of IIO (I/O ports and control pins) must not exceed IVDD. 4. Guaranteed by characterization results. DocID17659 Rev 12 83/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 19 and Table 44, respectively. Unless otherwise specified, the parameters given in Table 44 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 13. Table 44. I/O AC characteristics(1) OSPEEDRx [1:0] bit value(1) Symbol Parameter fmax(IO)out Maximum frequency(3) tf(IO)out tr(IO)out Output rise and fall time fmax(IO)out Maximum frequency(3) tf(IO)out tr(IO)out Output rise and fall time Fmax(IO)out Maximum frequency(3) tf(IO)out tr(IO)out Output rise and fall time Fmax(IO)out Maximum frequency(3) tf(IO)out tr(IO)out Output rise and fall time tEXTIpw Pulse width of external signals detected by the EXTI controller 00 01 10 11 - Conditions Min Max(2) CL = 50 pF, VDD = 2.7 V to 3.6 V - 400 CL = 50 pF, VDD = 1.65 V to 2.7 V - 400 CL = 50 pF, VDD = 2.7 V to 3.6 V - 625 CL = 50 pF, VDD = 1.65 V to 2.7 V - 625 CL = 50 pF, VDD = 2.7 V to 3.6 V - 2 CL = 50 pF, VDD = 1.65 V to 2.7 V - 1 CL = 50 pF, VDD = 2.7 V to 3.6 V - 125 CL = 50 pF, VDD = 1.65 V to 2.7 V - 250 CL = 50 pF, VDD = 2.7 V to 3.6 V - 10 CL = 50 pF, VDD = 1.65 V to 2.7 V - 2 CL = 50 pF, VDD = 2.7 V to 3.6 V - 25 CL = 50 pF, VDD = 1.65 V to 2.7 V - 125 CL = 50 pF, VDD = 2.7 V to 3.6 V - 50 CL = 50 pF, VDD = 1.65 V to 2.7 V - 8 CL = 30 pF, VDD = 2.7 V to 3.6 V - 5 CL = 50 pF, VDD = 1.65 V to 2.7 V - 30 - 8 3. The maximum frequency is defined in Figure 19. 84/133 DocID17659 Rev 12 kHz ns MHz ns MHz ns MHz ns - 1. The I/O speed is configured using the OSPEEDRx[1:0] bits. Refer to the STM32L151x6/8/B and STM32L152x6/8/B reference manual for a description of GPIO Port configuration register. 2. Guaranteed by design. Unit STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics Figure 19. I/O AC characteristics definition       %84%2.!, /54054 /.P& TR)/ OUT TF)/ OUT 4 -AXIMUMFREQUENCYISACHIEVEDIFT RTF ” 4ANDIFTHEDUTYCYCLEIS  WHENLOADEDBYP& 6.3.14 AIC NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 45). Unless otherwise specified, the parameters given in Table 45 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 13. Table 45. NRST pin characteristics Symbol VIL(NRST) (1) Parameter Conditions Min Typ NRST input low level voltage - - - - 1.4 - IOL = 2 mA 2.7 V < VDD < 3.6 V - - IOL = 1.5 mA 1.65 V < VDD < 2.7 V - - - - 10%VDD(2) Weak pull-up equivalent resistor(3) VIN = VSS 30 45 60 kΩ NRST input filtered pulse - - - 50 ns NRST input not filtered pulse - 350 - VIH(NRST)(1) NRST input high level voltage VOL(NRST) (1) Vhys(NRST)(1) RPU VF(NRST)(1) VNF(NRST) (1) NRST output low level voltage NRST Schmitt trigger voltage hysteresis Max Unit 0.8 V 0.4 mV ns 1. Guaranteed by design. 2. 200 mV minimum value 3. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance is around 10%. DocID17659 Rev 12 85/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Figure 20. Recommended NRST pin protection ([WHUQDOUHVHWFLUFXLW 1567 9'' 538 ,QWHUQDOUHVHW )LOWHU —) 670/[[ DLE 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 45. Otherwise the reset will not be taken into account by the device. 6.3.15 TIM timer characteristics The parameters given in Table 46 are guaranteed by design. Refer to Section 6.3.13: I/O port characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 46. TIMx(1) characteristics Symbol tres(TIM) fEXT ResTIM tCOUNTER Parameter Conditions Min Max Unit - 1 - tTIMxCLK fTIMxCLK = 32 MHz 31.25 - ns Timer external clock frequency on CH1 to CH4 f TIMxCLK = 32 MHz 0 fTIMxCLK/2 MHz 0 16 MHz Timer resolution - - 16 bit 16-bit counter clock period when internal clock is selected (timer’s prescaler disabled) - 1 65536 tTIMxCLK 2048 µs Timer resolution time tMAX_COUNT Maximum possible count fTIMxCLK = 32 MHz 0.0312 - - 65536 × 65536 tTIMxCLK fTIMxCLK = 32 MHz - 134.2 s 1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers. 86/133 DocID17659 Rev 12 STM32L151x6/8/B STM32L152x6/8/B 6.3.16 Electrical characteristics Communication interfaces I2C interface characteristics The STM32L151x6/8/B and STM32L152x6/8/B product line I2C interface meets the requirements of the standard I2C communication protocol with the following restrictions: SDA and SCL are not “true” open-drain I/O pins. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but is still present. The I2C characteristics are described in Table 47. Refer also to Section 6.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (SDA and SCL). Table 47. I2C characteristics Standard mode I2C(1) Symbol Fast mode I2C(1)(2) Parameter Unit Min Max Min Max tw(SCLL) SCL clock low time 4.7 - 1.3 - tw(SCLH) SCL clock high time 4.0 - 0.6 - tsu(SDA) SDA setup time 250 - 100 - th(SDA) SDA data hold time 0 - 0 900(3) tr(SDA) tr(SCL) SDA and SCL rise time - 1000 20 + 0.1Cb 300 tf(SDA) tf(SCL) SDA and SCL fall time - 300 - 300 th(STA) Start condition hold time 4.0 - 0.6 - tsu(STA) Repeated Start condition setup time 4.7 - 0.6 - tsu(STO) Stop condition setup time 4.0 - 0.6 - μs tw(STO:STA) Stop to Start condition time (bus free) 4.7 - 1.3 - μs Cb Capacitive load for each bus line - 400 - 400 pF µs ns µs 1. Guaranteed by design. 2. fPCLK1 must be at least 2 MHz to achieve standard mode I²C frequencies. It must be at least 4 MHz to achieve fast mode I²C frequencies. It must be a multiple of 10 MHz to reach the 400 kHz maximum I²C fast mode clock. 3. The maximum Data hold time has only to be met if the interface does not stretch the low period of SCL signal. DocID17659 Rev 12 87/133 104 Electrical characteristics STM32L151x6/8/B STM32L152x6/8/B Figure 21. I2C bus AC waveforms and measurement circuit sͺ/Ϯ sͺ/Ϯ ZW ZW ^dDϯϮ>ϭdždž Z^ ^ /ϮďƵƐ Z^ ^> ^ dZdZWd ^ dZd ^ dZd ƚƐƵ;^dͿ ^ ƚĨ;^Ϳ ƚƌ;^Ϳ ƚŚ;^dͿ ƚƐƵ;^Ϳ ƚǁ;^Ϳ ƚŚ;^Ϳ ƚƐƵ;^d͗^dKͿ ^ dKW ^> ƚƌ;^