STM6825

STM6321/6322 STM6821/6822/6823/6824/6825 5-Pin Supervisor with Watchdog Timer and Push-button Reset PRELIMINARY DATA FEATURES SUMMARY ■ ■ ■ ■ ■ ■ ■ ■ ■ PRECISION VCC MONITORING OF 5V, 3.3V, 3V, OR 2.5V POWER SUPPLIES – STM6xxxL – STM6xxxM – STM6xxxT – STM6xxxS – STM6xxxR – STM6xxxZ RST OUTPUTS (ACTIVE-LOW, PUSH-PULL OR OPEN DRAIN) RST OUTPUTS (ACTIVE-HIGH, PUSHPULL) 200ms (TYP) trec WATCHDOG TIMER - 1.6sec (TYP) MANUAL RESET INPUT (MR) LOW SUPPLY CURRENT - 3µA (TYP) GUARANTEED RST (RST) ASSERTION DOWN TO VCC = 1.0V OPERATING TEMPERATURE: –40°C to 85°C (Industrial Grade) Figure 1. Package SOT23-5 (WY) Table 1. Device Options Part Number STM6321 STM6322 STM6821 STM6822 STM6823 STM6824 STM6825 ✔ ✔ ✔ ✔ ✔ Watchdog Input ✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔ Manual Reset Input Reset Output Active-Low (Push-pull) Active-High (Push-pull) ✔ ✔ ✔ ✔ Active-Low (Open Drain) ✔ ✔ December 2004 1/21 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. STM6321/6322/6821/6822/6823/6824/6825 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 1. Device Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. Logic Diagram (STM6821/6822/6823). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 3. Logic Diagram (STM6321/6322/6824/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 4. STM6821/6822/6823 SOT23-5 Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 5. STM6321/6322/6824/6825 SOT23-5 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Active-Low, Push-pull Reset Output (RST) - STM6822/6823/6824/6825 . . . . . . . . . . . . . . . . . . . . . 5 Active-Low, Open Drain Reset Output (RST) - STM6321/6322/6822 . . . . . . . . . . . . . . . . . . . . . . . . 5 Push-button Reset Input (MR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Watchdog Input (WDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Active-High Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 6. Block Diagram (STM6xxx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 7. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Open Drain RST Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 8. STM6321/6322/6822 Open Drain RST Output with Multiple Supplies . . . . . . . . . . . . . . . 7 Push-button Reset Input (STM6322/6821/6822/6823/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Watchdog Input (STM6321/6821/6822/6823/6824) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Watchdog Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Ensuring a Valid Reset Output Down to VCC = 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Interfacing to Microprocessors with Bi-directional Reset Pins . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 9. Ensuring RST Valid to VCC = 0, (Active-Low Push-pull Outputs) . . . . . . . . . . . . . . . . . . . 8 Figure 10.Ensuring RST Valid to VCC = 0, (Active-High, Push-pull Outputs) . . . . . . . . . . . . . . . . . . 8 Figure 11.Interfacing to Microprocessors with Bi-directional Reset I/O . . . . . . . . . . . . . . . . . . . . . . . 8 TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 12.VCC-to-Reset Output Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 13.Supply Current vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 14.MR-to-Reset Output Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 15.Normalized Power-up trec vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 16.Normalized Reset Threshold Voltage vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 17.Normalized Power-up Watchdog Time-Out Period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 18.Voltage Output Low vs. ISINK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 19.Voltage Output High vs. ISOURCE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/21 STM6321/6322/6821/6822/6823/6824/6825 Figure 20.Maximum Transient Duration vs. Reset Threshold Overdrive. . . . . . . . . . . . . . . . . . . . . 13 MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 5. Operating and AC Measurement Conditions . . . . . Figure 21.AC Testing Input/Output Waveforms. . . . . . . . . . . Figure 22.MR Timing Waveform . . . . . . . . . . . . . . . . . . . . . . Figure 23.Watchdog Timing . . . . . . . . . . . . . . . . . . . . . . . . . Table 6. DC and AC Characteristics . . . . . . . . . . . . . . . . . . ...... ...... ...... ...... ...... ....... ....... ....... ....... ....... ...... ...... ...... ...... ...... ...... ...... ...... ...... ...... . . . . 15 . . . . 15 . . . . 15 . . . . 15 . . . . 16 PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 24.SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Drawing . . . . . . . . . . 18 Table 7. SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Data . . . . . . . . . . . . . 18 PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 8. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 9. Marking Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 10. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3/21 STM6321/6322/6821/6822/6823/6824/6825 SUMMARY DESCRIPTION The STM6xxx Supervisors are self-contained devices which provide microprocessor supervisory functions. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid VCC condition occurs, the reset output (RST) is forced low (or high in the case of RST). These devices also offer a watchdog timer (except for STM6322/6825) and/ or a push-button (MR) reset input. These devices are available in a standard 5-pin SOT23 package. Figure 2. Logic Diagram (STM6821/6822/6823) VCC Table 2. Signal Names MR WDI RST Push-button Reset Input Watchdog Input Active-Low Reset Output Active-High Reset Output Supply Voltage Ground WDI STM6XXX MR RST (RST)(1) RST VCC VSS VSS AI09128 Figure 4. STM6821/6822/6823 SOT23-5 Connections SOT23-5 Note: 1. For STM6821 only. RST (1) (RST) VSS (2) Figure 3. Logic Diagram (STM6321/6322/6824/ 6825) VCC MR 1 2 3 5 4 VCC WDI AI09130 Note: 1. Push-pull only. 2. Open Drain for STM6822. Figure 5. STM6321/6322/6824/6825 SOT23-5 Connections RST (WDI)(1) MR STM6XXX RST RST(1) VSS RST(2) VSS SOT23-5 1 2 3 5 4 VCC MR (WDI)(3) AI09131 AI09129 Note: 1. Open Drain for STM6321/6322. 2. Push-pull only. 3. For STM6321/6824 Note: 1. For STM6321/6824 4/21 STM6321/6322/6821/6822/6823/6824/6825 Pin Descriptions Active-Low, Push-pull Reset Output (RST) STM6822/6823/6824/6825. Pulses low when triggered, and stays low whenever VCC is below the reset threshold or when MR is a logic low. It remains low for trec after either VCC rises above the reset threshold, the watchdog triggers a reset, or MR goes from low to high. Active-Low, Open Drain Reset Output (RST) STM6321/6322/6822. Pulses low when triggered, and stays low whenever VCC is below the reset threshold or when MR is a logic low. It remains low for trec after either VCC rises above the reset threshold, the watchdog triggers a reset, or MR goes from low to high. Connect a pull-up resistor to supply voltage. Push-button Reset Input (MR ). A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low and for trec after MR returns high. This active-low input has an internal 52kΩ pull-up. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused. Watchdog Input (WDI). If WDI remains high or low for at least 1.6sec, the internal watchdog timer expires and reset is asserted. The internal watchdog timer clears while reset is asserted or when WDI sees a rising or falling edge. The watchdog function CAN be disabled if WDI is left unconnected or is connected to a tri-state buffer output. Active-High Reset Output. Active-high, pushpull reset output; inverse of RST. Table 3. Pin Functions Pin STM6822 STM6823 1 3 4 – 5 2 STM6821 – 3 4 1 5 2 STM6321 STM6824 1 – 4 3 5 2 STM6322 STM6825 1 4 – 3 5 2 RST MR WDI RST VCC VSS Active-Low Reset Output Push-button Reset Input Watchdog Input Active-High Reset Output Supply Voltage Ground Name Function Figure 6. Block Diagram (STM6xxx) WDI(1) VCC VCC MR(2) AI09132 WDI Transitional Detector WATCHDOG TIMER trec Generator RST (RST)(3) RST(4) VRST COMPARE Note: 1. 2. 3. 4. For STM6321/6821/6822/6823/6824 For STM6322/6821/6822/6823/6825 For STM6821/ (RST output only) For STM6321/6322/6824/6825 (both RST and RST outputs) 5/21 STM6321/6322/6821/6822/6823/6824/6825 Figure 7. Hardware Hookup VCC VCC 0.1µF STM6XXX From Microprocessor WDI (1) Push-button MR(2) RST (RST)(3) RST (4) To Microprocessor Reset To Microprocessor Reset AI09133 Note: 1. 2. 3. 4. For STM6321/6821/6822/6823/6824 For STM6322/6821/6822/6823/6825 For STM6821/ (RST output only) For STM6321/6322/6824/6825 (both RST and RST outputs) 6/21 STM6321/6322/6821/6822/6823/6824/6825 OPERATION Reset Output The STM6xxx Supervisor asserts a reset signal to the MCU whenever VCC goes below the reset threshold (VRST), a watchdog time-out occurs, or when the Push-button Reset Input (MR ) is taken low. Reset is guaranteed valid for VCC < VRST down to VCC =1V for TA = 0°C to 85°C. During power-up, once VCC exceeds the reset threshold an internal timer keeps reset low for the reset time-out period, trec. After this interval reset is de-asserted. Each time RST is asserted, it stays low for at least the reset time-out period (trec). Any time VCC goes below the reset threshold the internal timer clears. The reset timer starts when VCC returns above the reset threshold. Open Drain RST Output The STM6321/6322/6822 have an active-low, open drain reset output. This output structure will sink current when RST is asserted. Connect a pullup resistor from RST to any supply voltage up to 6V (see Figure 8.). Select a resistor value large enough to register a logic low, and small enough to register a logic high while supplying all input current and leakage paths connected to the reset output line. A 10kΩ pull-up resistor is sufficient in most applications. Figure 8. STM6321/6322/6822 Open Drain RST Output with Multiple Supplies 3.3V 5.0V VCC STM6XXX MR WDI(2) RST(3) RST GND AI09137 (1) 10k 5V System Note: 1. STM6322/6822 2. STM6321/6822 3. STM6321/6322 Push-button Reset Input (STM6322/6821/6822/ 6823/6825) A logic low on MR asserts reset. Reset remains asserted while MR is low, and for trec (see Figure 22., page 15) after it returns high. The MR input has an internal 52kΩ pull-up resistor, allowing it to be left open if not used. This input can be driven with TTL/CMOS-logic levels or with open-drain/ collector outputs. Connect a normally open momentary switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long cables or the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. MR may float, or be tied to VCC when not used. Watchdog Input (STM6321/6821/6822/6823/ 6824) The watchdog timer can be used to detect an outof-control MCU. If the MCU does not toggle the Watchdog Input (WDI) within tWD (1.6sec), the reset is asserted. The internal watchdog timer is cleared by either: 1. a reset pulse, or 2. by toggling WDI (high-to-low or low-to-high), which can detect pulses as short as 50ns. The timer remains cleared and does not count for as long as reset is asserted. As soon as reset is released, the timer starts counting. Note: The watchdog function may be disabled by floating WDI or tri-stating the driver connected to WDI. When tri-stated or disconnected, the maximum allowable leakage current is 10uA and the maximum allowable load capacitance is 200pF. Applications Information Watchdog Input Current. The WDI input is internally driven through a buffer and series resistor from the watchdog counter. For minimum watchdog input current (minimum overall power consumption), leave WDI low for the majority of the watchdog time-out period. When high, WDI can draw as much as 160µA. Pulsing WDI high at a low duty cycle will reduce the effect of the large input current. When WDI is left unconnected, the watchdog timer is serviced within the watchdog time-out period by a low-high-low pulse from the counter chain. 7/21 STM6321/6322/6821/6822/6823/6824/6825 Ensuring a Valid Reset Output Down to VCC = 0V. The STM6xxx Supervisors are guaranteed to operate properly down to VCC = 1V. In applications that require valid reset levels down to VCC = 0, a pull-down resistor to active-low outputs (push/pull only, see Figure 9.) and a pull-up resistor to active-high outputs (push/pull only, see Figure 10.) will ensure that the reset line is valid while the reset output can no longer sink or source current. This scheme does not work with the open drain outputs of the STM6321/6322/6822. The resistor value used is not critical, but it must be large enough not to load the reset output when VCC is above the reset threshold. For most applications, 100kΩ is adequate. Interfacing to Microprocessors with Bidirectional Reset Pins Microprocessors with bi-directional reset pins can contend with the STM6321/6322/6821/6822/6823/ 6824/6825 reset output. For example, if the reset output is driven high and the microprocessor wants to pull it low, signal contention will result. To prevent this from occurring, connect a 4.7kΩ resistor between the reset output and the microprocessor’s reset I/O as in Figure 11.. Figure 9. Ensuring RST Valid to VCC = 0, (Active-Low Push-pull Outputs) STM6XXX VCC GND RST R1 AI09138 VCC Figure 10. Ensuring RST Valid to VCC = 0, (Active-High, Push-pull Outputs) STM6XXX VCC GND RST VCC R1 AI09139 Note: This configuration does not work on open drain outputs of the STM6321/6322/6822. Figure 11. Interfacing to Microprocessors with Bi-directional Reset I/O Buffered Reset to other System Components VCC STM6XXX 4.7k RST RST VCC Microprocessor GND GND AI09135 8/21 STM6321/6322/6821/6822/6823/6824/6825 TYPICAL OPERATING CHARACTERISTICS Figure 12. VCC-to-Reset Output Delay vs. Temperature 35 30 Reset Output Delay (µs) 25 20 15 10 5 0 –40 –20 0 20 40 60 80 AI09627a Temperature (˚C) Figure 13. Supply Current vs. Temperature 7 6 Supply Current (µA) 5 4 3 2 1 0 –40 VCC = 3V VCC = 5V –20 0 20 40 60 80 AI09628a Temperature (˚C) 9/21 STM6321/6322/6821/6822/6823/6824/6825 Figure 14. MR-to-Reset Output Delay vs. Temperature 600 Reset Output Delay (ns) 500 400 300 200 100 0 –40 –20 0 20 40 60 80 AI09669 Temperature (˚C) Figure 15. Normalized Power-up trec vs. Temperature 1.05 Normalized Power-up trec 1.04 1.03 1.02 1.01 1.00 0.99 –40 –20 0 20 40 60 80 AI09670 Temperature (˚C) 10/21 STM6321/6322/6821/6822/6823/6824/6825 Figure 16. Normalized Reset Threshold Voltage vs. Temperature 1.05 1.04 Normalized Reset Threshold Voltage 1.03 1.02 1.01 1.00 0.99 0.98 0.97 0.96 0.95 –40 –20 0 20 40 60 80 AI09631a Temperature (˚C) Figure 17. Normalized Power-up Watchdog Time-Out Period Normalized Watchdog Time-out Period 1.05 1.04 1.03 1.02 1.01 1.00 0.99 –40 –20 0 20 40 60 80 AI09671 Temperature (˚C) 11/21 STM6321/6322/6821/6822/6823/6824/6825 Figure 18. Voltage Output Low vs. ISINK 0.35 0.30 0.25 VOUT (V) 0.20 VCC = 2.9V 0.15 0.10 0.05 0.00 0 1 2 3 4 5 6 AI09634a ISINK (mA) Figure 19. Voltage Output High vs. ISOURCE 2.92 2.90 2.88 2.86 VOUT (V) 2.84 VCC = 2.9V 2.82 2.80 2.78 2.76 2.74 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 AI09635a ISOURCE (mA) 12/21 STM6321/6322/6821/6822/6823/6824/6825 Figure 20. Maximum Transient Duration vs. Reset Threshold Overdrive 35 30 Transient Duration (µs) 25 20 15 10 5 0 0 20 40 60 80 100 120 140 160 180 200 AI09637a S Z L Reset Threshold Overdrive (mV) 13/21 STM6321/6322/6821/6822/6823/6824/6825 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not imTable 4. Absolute Maximum Ratings Symbol TSTG TSLD(1) VIO VCC IO PD Parameter Storage Temperature (VCC Off) Lead Solder Temperature for 10 seconds Input or Output Voltage Supply Voltage Output Current Power Dissipation Value –55 to 150 260 –0.3 to VCC +0.3 –0.3 to 7.0 20 320 Unit °C °C V V mA mW plied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Note: 1. Reflow at peak temperature of 255°C to 260°C for < 30 seconds (total thermal budget not to exceed 180°C for between 90 to 150 seconds). 14/21 STM6321/6322/6821/6822/6823/6824/6825 DC AND AC PARAMETERS This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the Measurement Conditions summarized in Table 5., Operating and AC Measurement Conditions. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. Table 5. Operating and AC Measurement Conditions Parameter VCC Supply Voltage Ambient Operating Temperature (TA) Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages STM6xxx 1.0 to 5.5 –40 to 85 ≤5 0.2 to 0.8VCC 0.3 to 0.7VCC Unit V °C ns V V Figure 21. AC Testing Input/Output Waveforms 0.8VCC 0.7VCC 0.3VCC AI02568 0.2VCC Figure 22. MR Timing Waveform MR tMLRL RST (1) tMLMH trec AI07837a Note: 1. RST for STM6322/6821/6825. Figure 23. Watchdog Timing VCC RST trec WDI tWD AI09136 15/21 STM6321/6322/6821/6822/6823/6824/6825 Table 6. DC and AC Characteristics Sym VCC Alternative Description Operating Voltage VCC Supply Current (MR and WDI unconnected) VCC Supply Current (MR unconnected; STM6322/6825) Input Leakage Current ILI Input Leakage Current (WDI)(3) Open Drain Reset Output Leakage Current Input High Voltage (MR) Input High Voltage (WDI)(4) Input Low Voltage (MR) Input Low Voltage (WDI)(4) T/S/R/Z (VCC < 3.6V) L/M (VCC < 5.5V) T/S/R/Z (VCC < 3.6V) L/M (VCC < 5.5V) 0V = VIN = VCC WDI = VCC, time average WDI = GND, time average VCC > VRST, Reset not asserted VRST > 4.0V VRST < 4.0V VRST (max) < VCC < 5.5V VRST > 4.0V VRST < 4.0V VRST (max) < VCC < 5.5V VCC ≥ 1.0V, ISINK = 50µA, Reset asserted Output Low Voltage (RST; Push-pull or Open Drain) VOL VCC ≥ 1.2V, ISINK = 100µA, Reset asserted VCC ≥ 2.7V, ISINK = 1.2mA, Reset asserted VCC ≥ 4.5V, ISINK = 3.2mA, Reset asserted Output Low Voltage (RST; Push-pull Only) VCC ≥ 2.7V, ISINK = 1.2mA, Reset not asserted VCC ≥ 4.5V, ISINK = 3.2mA, Reset not asserted VCC ≥ 2.7V, ISOURCE = 500µA, Reset not asserted VCC ≥ 4.5V, ISOURCE = 800µA , Reset not asserted VCC ≥ 1.0V, ISOURCE = 1µA, Reset asserted (0°C to 85°C) Output High Voltage (RST) VCC ≥ 1.5V, ISOURCE = 100µA, Reset asserted VCC ≥ 2.55V, ISOURCE = 500µA, Reset asserted VCC ≥ 4.25V, ISOURCE = 800µA, Reset asserted 0.8VCC 0.8VCC 0.8VCC 0.8VCC 0.8VCC 0.8VCC –20 –1 2.0 0.7VCC 0.7VCC 0.8 0.3VCC 0.3VCC 0.3 0.3 0.3 0.4 0.3 0.4 –1 120 –15 +1 Test Condition(1) Min 1.2(2) 4 6 3 3 Typ Max 5.5 12 17 8 12 +1 160 Unit V µA µA µA µA µA µA µA µA V V V V V V V V V V V V V V V V V V ICC ILO VIH VIH VIL VIL Output High Voltage (RST) VOH 16/21 STM6321/6322/6821/6822/6823/6824/6825 Sym Alternative Description Test Condition(1) Min Typ Max Unit Reset Thresholds STM6xxxL 25°C –40 to 85°C 25°C –40 to 85°C 25°C –40 to 85°C 25°C –40 to 85°C 25°C –40 to 85°C 25°C –40 to 85°C 4.561 4.514 4.314 4.270 3.040 3.000 2.890 2.857 2.590 2.564 2.280 2.250 10 5 20 140 200 40 280 2.320 2.630 2.930 3.080 4.390 4.630 4.699 4.746 4.446 4.490 3.110 3.150 2.960 3.000 2.660 2.696 2.350 2.380 V V V V V V V V V V V V mV mV µs ms ppm/ °C STM6xxxM STM6xxxT VRST(5) Reset Threshold STM6xxxS STM6xxxR STM6xxxZ(6) Reset Threshold Hysteresis VCC to RST Delay (VRST – VCC = 100mV, VCC falling at 1mV/µs) trec Reset Pulse Width Reset Threshold Temperature Coefficient Push-button Reset Input tMLMH tMLRL tMR tMRD MR Pulse Width MR to RST Output Delay MR Glitch Immunity MR Pull-up Resistor Watchdog Timer tWD Watchdog Timeout Period WDI Pulse Width L/M versions T/S/R/Z versions 1 500 100 35 52 75 µs ns ns kΩ 1.12 50 1.60 2.24 s ns Note: 1. Valid for Ambient Operating Temperature: T A = –40 to 85°C; VCC = 4.5V to 5.5V for “L/M” versions; VCC = 2.7V to 3.6V for “T/S/R” versions; and VCC = 2.1V to 2.75V for “Z” version (except where noted). 2. VCC (min) = 1.0V for TA = 0°C to +85°C. 3. WDI input is designed to be driven by a three-state output device. To float WDI, the “high-impedance mode” of the output device must have a maximum leakage current of 10µA and a maximum output capacitance of 200pF. The output device must also be able to source and sink at least 200µA when active. 4. WDI is internally serviced within the watchdog period if WDI is left unconnected. 5. The leakage current measured on the RST pin is tested with the reset asserted (output high impedance). 6. Contact local sales office for availability. 17/21 STM6321/6322/6821/6822/6823/6824/6825 PACKAGE MECHANICAL Figure 24. SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Drawing E E1 B 0.15 M CAB A1 e/2 e D 0.20 M CAB A 4X C 0.10 C A2 A 5X b C θ L1 C L SOT23-5b Note: Drawing is not to scale. Table 7. SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Data mm Symb Typ A A1 A2 b C D E E1 e e/2 L L1 α N 1.20 – 1.05 0.40 0.15 2.90 2.80 1.60 1.90 0.95 0.60 0.35 – Min 0.90 – 0.90 0.35 0.09 2.80 2.60 1.50 – – 0.55 0.10 0° 5 Max 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 – – 0.63 0.60 10° Typ 0.047 – 0.041 0.016 0.006 0.114 0.110 0.063 0.075 0.037 0.024 0.014 – Min 0.035 – 0.035 0.014 0.004 0.110 0.102 0.059 – – 0.022 0.004 0° 5 Max 0.057 0.006 0.051 0.020 0.008 0.118 0.118 0.069 – – 0.025 0.024 10° inches 18/21 STM6321/6322/6821/6822/6823/6824/6825 PART NUMBERING Table 8. Ordering Information Scheme Example: STM6xxx L M 6 E Device Type STM6xxx Reset Threshold Voltage L: VRST = 4.514V to 4.746V M: VRST = 4.270V to 4.490V T: VRST = 3.000V to 3.150V S: VRST = 2.850V to 3.000V R: VRST = 2.564V to 2.696V Z: VRST = 2.250V to 2.380V(1) Package WY = SOT23-5 Temperature Range 6 = –40 to 85°C Shipping Method E = Tubes (Pb-Free - ECO PACK®) PACK®) F = Tape & Reel (Pb-Free - ECO Note: 1. Contact local sales office for availability. For other options, or for more information on any aspect of this device, please contact the ST Sales Office nearest you. Table 9. Marking Description Part Number STM6321 STM6322 STM6821 STM6822 STM6823 STM6824 STM6825 Note: 1. Where “X” = L, M, T, S, R, or Z. Reset Threshold Topside Marking(1) 321X L: VRST = 4.63V M: VRST = 4.39V T: VRST = 3.08V S: VRST = 2.93V R: VRST = 2.63V Z: VRST = 2.32V 322X 821X 822X 823X 824X 825X 19/21 STM6321/6322/6821/6822/6823/6824/6825 REVISION HISTORY Table 10. Document Revision History Date August 25, 2004 15-Dec-04 Version 1.0 2.0 First Draft Update characteristics (Figure 12, 13, 14; Table 6, 8) Revision Details 20/21 STM6321/6322/6821/6822/6823/6824/6825 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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