STN2NE10L
N-channel 100V - 0.33Ω -2A - SOT-223 STripFET™ Power MOSFET
General features
Type STN2NE10L
■ ■ ■ ■
VDSS (@Tjmax) 100V
RDS(on) ID(on) x RDS(on)max, ID=1A Min. 1 Typ. 3 345 45 20 10 5 4 14 Max. Unit S pF pF pF nC nC nC
VDS =25V, f=1 MHz, VGS=0
VDD=80V, ID = 7A VGS =5V (see Figure 13)
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
Table 6.
Symbol td(on) tr td(off) tf tr(Voff) tf tc 4/12
Switching times
Parameter Turn-on delay time rise time Test conditions VDD=50 V, ID=3.5A, RG=4.7Ω, VGS=5V (see Figure 14) VDD=50 V, ID=3.5A, RG=4.7Ω, VGS=5V (see Figure 14) VDD=80 V, ID=7A, RG=4.7Ω, VGS=5V (see Figure 14) Min. Typ. 7 17 Max. Unit ns ns
Turn-off-delay time fall time Off-voltage Rise Time Fall Time Cross-over Time
22 8 8 9 19
ns ns ns ns ns
STN2NE10L
Electrical characteristics
Table 7.
Symbol ISD ISDM
(1)
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=2A, VGS=0 ISD=7 A, di/dt = 100A/µs, VDD=30 V, Tj=150°C 75 190 5 Test conditions Min. Typ. Max 2 8 1.5 Unit A A V ns nC A
VSD(2) trr Qrr IRRM
1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration=300µs, duty cycle 1.5%
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Electrical characteristics
STN2NE10L
2.1
Figure 1.
Electrical characteristics (curves)
Safe operating area Figure 2. Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
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STN2NE10L Figure 7. Gate charge vs. gate-source voltage Figure 8.
Electrical characteristics Capacitance variations
Figure 9.
Normalized gate threshold voltage vs. temperature
Figure 10. Normalized on resistance vs. temperature
Figure 11. Source-drain diode forward characteristics
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Test circuit
STN2NE10L
3
Test circuit
Figure 13. Gate charge test circuit
Figure 12. Switching times test circuit for resistive load
Figure 14. Test circuit for inductive load Figure 15. Unclamped Inductive load test switching and diode recovery times circuit
Figure 16. Unclamped inductive waveform
Figure 17. Switching time waveform
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STN2NE10L
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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Package mechanical data
STN2NE10L
SOT-223 MECHANICAL DATA
mm MIN. a b c d e1 e4 f g l1 l2 L 2.9 0.67 6.7 3.5 6.3 3 0.7 7 3.5 6.5 2.27 4.57 0.2 0.63 1.5 TYP. 2.3 4.6 0.4 0.65 1.6 MAX. 2.33 4.63 0.6 0.67 1.7 0.32 3.1 0.73 7.3 3.7 6.7 114.2 26.4 263.8 137.8 248 118.1 27.6 275.6 137.8 255.9 MIN. 89.4 179.9 7.9 24.8 59.1 mils TYP. 90.6 181.1 15.7 25.6 63 MAX. 91.7 182.3 23.6 26.4 66.9 12.6 122.1 28.7 287.4 145.7 263.8
DIM.
L
l2
e1
a b f
d c e4
C
l1
B
C
E
g
P008B
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STN2NE10L
Revision history
5
Revision history
Table 8.
Date 19-Oct-2005 05-March-2006 19-Sep-2006 01-Feb-2007
Revision history
Revision 2 3 4 5 Preliminary datasheet Modified value on Table 4 New template, no content change Typo mistake on Table 1. Changes
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STN2NE10L
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