STN4NE03L

® STN4NE03L N - CHANNEL 30V - 0.037Ω - 4A - SOT-223 STripFET™ POWER MOSFET TYPE ST N4NE03L s s s s s V DSS 30 V R DS(on) < 0.05 Ω ID 4A TYPICAL RDS(on) = 0.037 Ω EXCEPTIONAL dv/dt CAPABILITY AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION 2 3 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique ” Single Feature Size™ ” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS DC MOTOR CONTROL (DISK DRIVES, etc.) s DC-DC & DC-AC CONVERTERS s SYNCHRONOUS RECTIFICATION s POWER MANAGEMENT IN BATTERY-OPERATED AND PORTABLE EQUIPMENT s 1 SOT-223 2 INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS VDGR V GS I D(*) I D(*) I DM ( • ) P t ot Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω) Gate-source Voltage Drain Current (continuous) at T c = 25 o C Drain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipation at Tc = 25 C Derating Factor dv/dt ( 1) T stg Tj Peak Diode Recovery voltage slope St orage Temperature Max. Operating Junction Temperature (*) Limited by package o o Value 30 30 ± 15 4 2.5 16 2.5 0.02 6 -65 to 150 150 Uni t V V V A A A W W/ C V/ ns o o o C C (•) Pulse width limited by safe operating area (1)ISD ≤ 10A, di/dt ≤ 200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TjMAX August 1998 1/8 STN4NE03L THERMAL DATA R thj -pcb R t hj- amb Tl Thermal Resistance Junction-PC Board Max Thermal Resistance Junction-ambient Max (Surface Mounted) Maximum Lead Temperature For Soldering Purpose 50 60 260 o o C/W C/W o C AVALANCHE CHARACTERISTICS Symb ol I AR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, I D = IAR , VDD = 15 V) Max Valu e 4 20 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symb ol V (BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Cond ition s I D = 250 µ A V GS = 0 Min. 30 1 10 ± 100 Typ . Max. Un it V µA µA nA V DS = Max Rating Zero G ate Voltage Drain Current (VGS = 0) V DS = Max Rating Gate-body Leakage Current (V DS = 0) V GS = ± 1 5 V T c = 125 C o ON (∗) Symb ol V GS(th) R DS( on) Parameter Gate Threshold Voltage V DS = VGS Test Cond ition s ID = 250 µ A Min. 1 Typ . 1.6 0.033 0.046 4 Max. 2.5 0.05 0.06 Un it V Ω Ω A Static Drain-source On V GS = 10 V I D = 2 A Resistance V GS = 5 V ID = 2 A On State Drain Current V DS > I D(on) x R DS(on) max V GS = 10 V ID(o n) DYNAMIC Symb ol g fs ( ∗ ) C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Cond ition s V DS > I D(on) x R DS(on) max V DS = 25 V f = 1 MHz ID = 2 A VGS = 0 V Min. 1 Typ . 3 680 160 60 950 220 85 Max. Un it S pF pF pF 2/8 ® STN4NE03L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symb ol t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Cond ition s V DD = 15 V ID = 10 A VGS = 5 V R G = 4.7 Ω (see test circuit, figure 3) V DD = 24 V I D = 20 A V GS = 5 V Min. Typ . 15 70 22 7 7 Max. 20 100 30 Un it ns ns nC nC nC SWITCHING OFF Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Cond ition s V DD = 24 V I D = 20 A R G = 4.7 Ω V GS = 5 V (see test circuit, figure 5) Min. Typ . 12 33 55 Max. 17 46 77 Un it ns ns ns SOURCE DRAIN DIODE Symb ol I SD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 4 A VGS = 0 40 45 2.2 di/dt = 100 A/µ s I SD = 20 A o T j = 150 C V DD = 15 V (see test circuit, figure 5) Test Cond ition s Min. Typ . Max. 4 16 1.5 Un it A A V ns µC A ( ∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( •) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance ® 3/8 STN4NE03L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 ® STN4NE03L Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics ® 5/8 STN4NE03L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 ® STN4NE03L SOT-223 MECHANICAL DATA mm MIN. a b c d e1 e4 f g l1 l2 L 2.9 0.67 6.7 3.5 6.3 3 0.7 7 3.5 6.5 2.27 4.57 0.2 0.63 1.5 TYP. 2.3 4.6 0.4 0.65 1.6 MAX. 2.33 4.63 0.6 0.67 1.7 0.32 3.1 0.73 7.3 3.7 6.7 114.2 26.4 263.8 137.8 248 118.1 27.6 275.6 137.8 255.9 MIN. 89.4 179.9 7.9 24.8 59.1 mils TYP. 90.6 181.1 15.7 25.6 63 MAX. 91.7 182.3 23.6 26.4 66.9 12.6 122.1 28.7 287.4 145.7 263.8 DIM. L l2 e1 a b f d c e4 C l1 B C E g P008B 7/8 ® STN4NE03L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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