STNS01
Li-Ion linear battery charger with LDO
Datasheet - production data
Description
The STNS01 is a linear charger for single-cell LiIon batteries integrating an LDO regulator and
several battery protection functions.
Features
Charges single-cell Li-Ion batteries with
CC/CV algorithm and charge termination
Charge current programmable up to 200 mA
1% accuracy on floating voltage (4.2 V)
Integrated 3.1 V LDO regulator
Automatic power path management
Battery overcharge protection
Battery over-discharge protection
Battery overcurrent protection
Charging timeout
Very low battery leakage in overdischarge/shutdown mode
Low quiescent current
Charge/fault status output
Charger enable input
Available in a DFN12L (3x3x0.75 mm)
package
Applications
Portable MP3 players
Portable low-power devices
Fitness portable devices
December 2017
The STNS01 uses a CC/CV algorithm to charge
the battery; the fast-charge current can be
programmed using an external resistor. Precharge current and termination current are scaled
accordingly. The floating voltage value is 4.2 V.
The input supply voltage is normally used to
charge the battery and provide power to the LDO
regulator. When a valid input voltage is not
present and the battery is not empty, the device
automatically switches to battery power.
The STNS01 integrates overcharge, overdischarge and overcurrent protection circuitry to
prevent the battery from being damaged under
fault conditions. It also features a charger enable
input to stop the charging process when battery
overtemperature is detected by an external
circuitry.
When the shutdown mode is activated, the
battery power consumption is reduced to less
than 500 nA to maximize battery life during shelf
time or shipping. The device is available in the
DFN12L (3x3x0.75 mm) package.
Table 1: Device summary
Order code
Package
Packing
STNS01PUR
DFN12L
(3x3x0.75 mm)
3000
parts per reel
DocID024654 Rev 4
This is information on a product in full production.
1/29
www.st.com
Contents
STNS01
Contents
1
Application schematic .................................................................... 6
2
Block diagram.................................................................................. 7
3
Pin configuration ............................................................................. 8
4
5
Maximum ratings ............................................................................. 9
Electrical characteristics .............................................................. 10
6
Typical performance characteristics (curves) ............................. 13
7
8
2/29
6.1
IN .................................................................................................... 15
6.2
SYS ................................................................................................. 15
6.3
LDO ................................................................................................. 15
6.4
SD ................................................................................................... 15
6.5
CHG ................................................................................................ 16
6.6
CEN ................................................................................................ 16
6.7
GND ................................................................................................ 17
6.8
NTC................................................................................................. 17
6.9
ISET ................................................................................................ 17
6.10
BATMS ............................................................................................ 17
6.11
BATSNS .......................................................................................... 18
6.12
BAT ................................................................................................. 18
Operation description ................................................................... 19
7.1
Power-on ......................................................................................... 19
7.2
Battery charger................................................................................ 19
7.3
Battery temperature monitoring ....................................................... 21
7.4
Battery overcharge protection ......................................................... 22
7.5
Battery over-discharge protection ................................................... 22
7.6
Battery discharge overcurrent protection ........................................ 22
7.7
Input overcurrent protection ............................................................ 22
7.8
SYS and LDO short-circuit protection ............................................. 23
7.9
IN overvoltage protection ................................................................ 23
7.10
Shutdown mode .............................................................................. 23
7.11
Thermal shutdown ........................................................................... 23
7.12
Reverse current protection .............................................................. 23
Package information ..................................................................... 24
DocID024654 Rev 4
STNS01
9
Contents
8.1
DFN12L (3x3x0.75 mm) package information ................................. 24
8.2
DFN12L (3x3x0.75 mm) packing information .................................. 26
Revision history ............................................................................ 28
DocID024654 Rev 4
3/29
List of tables
STNS01
List of tables
Table 1: Device summary ........................................................................................................................... 1
Table 2: List of external components .......................................................................................................... 6
Table 3: Pin description .............................................................................................................................. 8
Table 4: Absolute maximum ratings ........................................................................................................... 9
Table 5: Thermal data ................................................................................................................................. 9
Table 6: Electrical characteristics ............................................................................................................. 10
Table 7: SYS pin voltage .......................................................................................................................... 15
Table 8: CHG pin state ............................................................................................................................. 16
Table 9: DFN12L (3x3x0.75 mm) package mechanical data ................................................................... 25
Table 10: Document revision history ........................................................................................................ 28
4/29
DocID024654 Rev 4
STNS01
List of figures
List of figures
Figure 1: STNS01 application schematic.................................................................................................... 6
Figure 2: STNS01 block diagram ................................................................................................................ 7
Figure 3: Pin configuration (top view) ......................................................................................................... 8
Figure 4: Start-up ...................................................................................................................................... 13
Figure 5: Start - up VBAT = 0 V ................................................................................................................ 13
Figure 6: Input OVP .................................................................................................................................. 13
Figure 7: IPRE-CHG to IFAST-CHG......................................................................................................... 13
Figure 8: Plug USB ................................................................................................................................... 14
Figure 9: Unplug USB (battery powered).................................................................................................. 14
Figure 10: RON-BS vs. temperature ......................................................................................................... 14
Figure 11: Battery voltage vs. charge current ........................................................................................... 14
Figure 12: Load transient LDO pre-chg .................................................................................................... 14
Figure 13: Load transient LDO fast-chg.................................................................................................... 14
Figure 14: VLDO vs. temperature ............................................................................................................. 15
Figure 15: VLDO load static regulation ..................................................................................................... 15
Figure 16: Shutdown mode entry and exit (not to scale, deglitch times not included) ............................. 16
Figure 17: Charge disable / enable ........................................................................................................... 17
Figure 18: Charging flowchart ................................................................................................................... 20
Figure 19: CC-CV charging profile (not to scale) ...................................................................................... 21
Figure 20: Charging cycle profile .............................................................................................................. 21
Figure 21: Discharging cycle profile .......................................................................................................... 22
Figure 22: DFN12L (3x3x0.75 mm) package outline ................................................................................ 24
Figure 23: DFN12L (3x3x0.75 mm) recommended footprint .................................................................... 25
Figure 24: Tape outline ............................................................................................................................. 26
Figure 25: Reel outline .............................................................................................................................. 27
DocID024654 Rev 4
5/29
Application schematic
1
STNS01
Application schematic
Figure 1: STNS01 application schematic
Table 2: List of external components
Symbol
Manufacturer
Value
Description
CIN
Murata
2.2 µF
GRM188R71A225KE15D
CSYS
Murata
2.2 µF
GRM188R71A225KE15D
CLDO
Murata
2.2 µF
GRM188R71A225KE15D
RISET
Any
1 kΩ – 13 kΩ
CBAT
Murata
4.7 µF
D1
Any
Diode led
RDIV1, DIV2
Any
Depending on the BATMS status
RCHG
Any
CLDO
6/29
Size
Resistor
GRM188R61A475KE15D
600 Ω
Resistor
2.2 µF
GRM188R71A225KE15D
DocID024654 Rev 4
0603
STNS01
2
Block diagram
Block diagram
Figure 2: STNS01 block diagram
DocID024654 Rev 4
7/29
Pin configuration
3
STNS01
Pin configuration
Figure 3: Pin configuration (top view)
Table 3: Pin description
Pin name
Number
IN
1
Input supply voltage. Bypass this pin to ground with a 2.2 µF capacitor
SYS
2
System output. Bypass this pin to GND with a 2.2 µF ceramic capacitor
LDO
3
3.1 V LDO output. Bypass this pin to ground with a 1 μF ceramic capacitor
SD
4
Shutdown. Active high. 500 kΩ internal pull-down
CHG
5
Charging/fault flag. Active low
CEN
6
Charger enable pin. Active high. 500 kΩ internal pull-up (to LDO)
GND
7
Ground
NTC
8
Battery temperature monitor pin
ISET
9
Fast-charge programming resistor
BATMS
10
Battery voltage measurement pin
BATSNS
11
Battery voltage sensing. Connect as close as possible to the battery
positive terminal
BAT
12
Battery positive terminal. Bypass this pin to GND with a 4.7 μF ceramic
capacitor
Exposed
pad
8/29
Description
Connect to GND
DocID024654 Rev 4
STNS01
4
Maximum ratings
Maximum ratings
Table 4: Absolute maximum ratings
Symbol
Parameter
VIN
Input supply voltage pin
Test conditions
Value
Unit
DC voltage
-0.3 to +10.0
V
Non repetitive, 60 s pulse
length
-0.3 to +16.0
V
VLDO
LDO output pin voltage
DC voltage
-0.3 to +4.0
V
VSYS
SYS pin voltage
DC voltage
-0.3 to +6.5
V
VCHG
CHG pin voltage
DC voltage
-0.3 to +6.5
V
VLGC
Voltage on logic pins (CEN, SD)
DC voltage
-0.3 to +4.0
V
VISET
Voltage on ISET pin
DC voltage
-0.3 to +2
V
VNTC
Voltage on NTC pin
DC voltage
-0.3 to 3.1
V
VBAT,
VBATSNS
Voltage on BAT, BATSNS pins
DC voltage
-0.3 to +5.5
V
VBATMS
Voltage on BATMS pin
DC voltage
-0.3 to
VBAT+0.3
V
ESD
Human body model
JS-001-2010
±2000
V
TAMB
Operating ambient temperature
-40 to +85
°C
TJ
Maximum junction temperature
+125
°C
TSTG
Storage temperature
-65 to +150
°C
Absolute maximum ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied.
Table 5: Thermal data
Symbol
Parameter
Value
RthJA
Thermal resistance junction-ambient
49
RthJC
Thermal resistance junction-case
4.2
Unit
°C/W
DocID024654 Rev 4
9/29
Electrical characteristics
5
STNS01
Electrical characteristics
The values given in the following table are valid for - 40 °C < TJ < + 85 °C, VIN = 5 V, VBAT =
3.6 V, CLDO = 1 µF, CBAT = 4.7 µF, CIN = CSYS = 2.2 µF, RISET = 1 kΩ, SD = low, CEN = high,
unless otherwise specified.
Table 6: Electrical characteristics
Symbol
Parameter
Test conditions
Min.
VIN
Operating input voltage
VIN rising
4.55
VINOVP
Input overvoltage protection
VIN rising
5.6
VINOVPH
Input overvoltage protection
hysteresis
VIN falling
VUVLO
Undervoltage lock-out
VIN falling
VUVLOH
Undervoltage lock-out
hysteresis
VIN rising
300
mV
Charger disabled mode (CEN =
low), ISYS = ILDO = 0 A
400
μA
Charging, VHOT < VNTC < VCOLD,
including RISET current
1.4
mA
IIN
VFLOAT
IBAT
IFAST
Typ.
5.9
Max.
Unit
5.4
V
6.2
V
200
3.95
4.18
mV
4.35
V
IN supply current
Battery floating voltage
IBAT = 1 mA
4.158
4.2
4.242
V
Battery-powered mode (VIN <
VUVLO), ILDO = 0 A
6
10
µA
Standby mode, charge terminated
6
10
µA
Shutdown mode (SD = high)
100
500
Over-discharge mode (VBAT <
VODC, VIN < VUVLO)
100
500
RISET = 500 Ω, constant-current
mode ILDO + ISYS < 100 mA
400
BAT pin supply current
Fast-charge current
nA
RISET = 1 kΩ, constant-current
mode
180
200
220
RISET = 13 kΩ, constant-current
mode
12
15
18
mA
RISET
Fast-charge programming
resistor range
VISET
ISET regulated voltage
VPRE
Pre-charge to fast-charge
battery voltage threshold
Charger active
3
V
IPRE
Pre-charge current
VBAT < 3 V, charger active
20
%IFAST
IEND
End-of-charge current
Charging in CV mode
10
%IFAST
VOCHG
Battery voltage overcharge
threshold
VBAT rising
4.245
4.275
4.305
V
VODC
Battery voltage overdischarge threshold
VIN < VUVLO, ILDO = 100 mA
2.750
2.8
2.850
V
VODCR
Battery voltage overdischarge release threshold
10/29
1
13
kΩ
1
3.0
DocID024654 Rev 4
V
STNS01
Electrical characteristics
Symbol
Parameter
RON-IB
Input to battery on-resistance
RON-BS
Battery to SYS on-resistance
RONBATMS
Test conditions
Min.
Typ.
Max.
Unit
1
1.5
Ω
ISINK = 100 mA
0.38
0.55
Ω
BATSNS to BATMS onresistance
ISINK = 500 µA
270
VOL
Output low level (CHG)
ISINK = 5 mA
VIL
Logic low input level (CEN,
SD)
Ω
0.4
V
0.4
V
VLDO = 3.1 V
VIH
Logic high input level (CEN,
SD)
1.6
RUP
CEN pull-up resistor
375
500
625
kΩ
RDOWN
SD pull-down resistor
375
500
625
kΩ
VLDO
LDO output voltage
ILDO = 1 mA
3.007
3.1
3.193
V
LDO static load regulation
ILDO = 1 mA to 150 mA
ISC
LDO short-circuit current
RLOAD = 0 Ω
250
IBATOCP
Battery discharge overcurrent
protection
VIN VILIMSCTH; VUVLO < VIN <
VINOVP (powered from IN)
1
A
IINIMSCTH
Input current limitation in
short-circuit conditions
VSYS < VILIMSCTHINOVP (powered
from IN)
400
mA
VILIMSCT H
SYS voltage threshold for
input current limitation shortcircuit detection
VUVLO < VIN < VINOVP
2
V
VSCLDO
LDO short-circuit protection
threshold
VIN < VUVLO or VIN > VINOVP
(powered from BAT)
0.7
V
VSCSYS
SYS short-circuit protection
threshold
VIN < VUVLO or VIN > VINOVP
(powered from BAT)
VBAT 0.8
V
INTCB
NTC pin bias current
VNTC = 0.25 V
48
50
52
µA
VHOT
Thermal hot threshold
Increasing NTC temperature
0.234
0.246
0.258
V
VCOLD
Thermal cold threshold
Decreasing NTC temperature
1.28
1.355
1.43
V
THYST
Hot/cold temperature
threshold hysteresis
10 kΩ NTC, ß = 3370
TSD
Thermal shutdown die
temperature
TFAULT
CHG pin blinking frequency
tCHGD
ΔVOUTLOAD
V
±0.002
%/mA
350
mA
650
mA
3
°C
180
°C
Fault condition
1
Hz
Input voltage connection to
charging-start delay
VBAT = 3.5 V, RNTC = 10 kΩ,
battery detection not included
(tBDSRC + tBDSNK)
240
ms
tOCD
Overcharge detection delay
VBAT> VOCHG, VUVLO IBATOCP, VIN
VINOVP
14
ms
tPFD
Pre-charge to fast-charge
transition deglitch time
Rising
100
ms
tFPD
Fast-charge to pre-charge
fault deglitch time
10
ms
tEND
End-of-charge deglitch time
100
ms
tPRE
Pre-charge timeout
1800
s
tFAST
Fast-charge timeout
36000
s
tNTCD
Battery temperature transition
deglitch time
100
ms
tPW
CEN/SD valid input pulse
width
tTHPD
Thermal protection deglitch
time
12/29
Min.
VBAT < VPRE, charging
Typ.
30
Unit
ms
10
DocID024654 Rev 4
Max.
ms
STNS01
6
Typical performance characteristics (curves)
Typical performance characteristics (curves)
Figure 5: Start - up VBAT = 0 V
Figure 4: Start-up
VIN = 0 V to 5 V, VBAT = 3.6 V, ICHG = 200 mA
VIN = 0 V to 5 V, VBAT = 30 V, ICHG = 100 mA
Figure 6: Input OVP
Figure 7: IPRE-CHG to IFAST-CHG
VIN = 5.5 V to 6.8 V, VBAT = 3.6 V, ICHG = 100 mA
VIN = 5 V, VBAT = 1.8 V - 3.6 V, ICHG = 200 mA
DocID024654 Rev 4
13/29
Typical performance characteristics (curves)
VIN = 0 V to 5 V, VBAT = 3.6 V, ICHG = 200 mA
VIN = 5 V to 0 V, VBAT = 3.6 V, ICHG = 200 mA
Figure 10: RON-BS vs. temperature
Shutdown mode to battery mode transition. VIN floating
Figure 12: Load transient LDO pre-chg
VIN = 5 V, VBAT < VPRE, IPRE = 20 mA, ILDO = 0 to 50 mA
14/29
STNS01
Figure 9: Unplug USB (battery powered)
Figure 8: Plug USB
Figure 11: Battery voltage vs. charge current
Shutdown mode to VIN mode transition
Figure 13: Load transient LDO fast-chg
VIN = 5 V, VBAT ≥ VPRE, IFAST = 100 mA, ILDO = 0 to 50 mA
DocID024654 Rev 4
STNS01
Typical performance characteristics (curves)
Figure 14: VLDO vs. temperature
6.1
Figure 15: VLDO load static regulation
IN
5 V input supply voltage.
This pin supplies power to the SYS pin and the battery charger when the input voltage is
higher than VUVLO and lower than VINOVP. Bypass this pin to GND with a 2.2 μF ceramic
capacitor.
6.2
SYS
LDO input voltage. This pin can be used to supply up to 100 mA to the external devices.
The voltage source of this pin can be either IN or BAT depending on the operating
conditions. Refer to table below for more details. Bypass this pin to GND with a 2.2 μF
ceramic capacitor.
Table 7: SYS pin voltage
VIN
> VUVLO and < VINOVP
VBAT
VSYS
LDO
X (do not care)
VIN(1)
ON
Not powered
OFF
< VODC
(2)
< VODC
(2)
> VINOVP
< VODC
(2)
> VINOVP
< VODC(2)
< VUVLO
< VUVLO
VBAT
(1)
ON
Not powered
OFF
VBAT(1)
ON
Notes:
(1)Voltage
(2)V
ODCR
6.3
drop over internal MOSFETs is not included.
if shutdown mode or over-discharge protection has been previously activated.
LDO
LDO output voltage.
This pin outputs a 3.1 V regulated voltage and can supply up to 100 mA. Bypass this pin to
GND with a 1 μF ceramic capacitor.
6.4
SD
Shutdown input. A logic high level on this pin when the input voltage (VIN) is not valid
makes the device enter shutdown mode. In this mode the battery drain is reduced to less
than 500 nA and the SYS and LDO voltages are not present. Connecting a valid input
DocID024654 Rev 4
15/29
Typical performance characteristics (curves)
STNS01
voltage (VUVLO VODCR).
7.11
Thermal shutdown
The STNS01 is protected against overheating which might be generated by the
combination of ambient temperature and internal heating due to power dissipation. When
the die temperature exceeds TSD the device is turned off. In order to restore normal
operation the input voltage (VIN) must be disconnected and reconnected.
7.12
Reverse current protection
In order to prevent undesired battery discharge, when the input voltage (V IN) is lower than
the battery voltage (VBAT), the current path from BAT to IN is blocked.
DocID024654 Rev 4
23/29
Package information
8
STNS01
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
8.1
DFN12L (3x3x0.75 mm) package information
Figure 22: DFN12L (3x3x0.75 mm) package outline
24/29
DocID024654 Rev 4
STNS01
Package information
Table 9: DFN12L (3x3x0.75 mm) package mechanical data
Dim.
mm
Min.
Typ.
Max.
A
0.70
0.75
0.80
A1
0
0.02
0.05
A3
0.20
b
0.18
0.25
0.30
D
2.85
3
3.15
D2
1.87
2.02
2.12
E
2.85
3
3.15
E2
1.06
1.21
1.31
e
L
0.45
0.30
0.40
0.50
Figure 23: DFN12L (3x3x0.75 mm) recommended footprint
DocID024654 Rev 4
25/29
Package information
8.2
STNS01
DFN12L (3x3x0.75 mm) packing information
Figure 24: Tape outline
26/29
DocID024654 Rev 4
STNS01
Package information
Figure 25: Reel outline
DocID024654 Rev 4
27/29
Revision history
9
STNS01
Revision history
Table 10: Document revision history
28/29
Date
Revision
Changes
17-May-2013
1
Initial release.
15-Jul-2013
2
Updated Table 6: Electrical characteristics.
11-May-2017
3
Updated section 5: "Electrical characteristics".
14-Dec-2017
4
Updated Table 5: "Thermal data" and Table 6:
"Electrical characteristics".
DocID024654 Rev 4
STNS01
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2017 STMicroelectronics – All rights reserved
DocID024654 Rev 4
29/29