STP08CP05MTR

STP08CP05 Low voltage, low current power 8-bit shift register Datasheet - production data Description The STP08CP05 is a monolithic, low voltage, low current, power 8-bit shift register designed for LED panel displays. The STP08CP05 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. In the output stage, eight regulated current sources were designed to provide 5-100 mA constant current to drive the LEDs, the output current setup time is 11 ns (typ), thus improving the system performance. DIP-16 TSSOP16 exposed pad TSSOP16 The STP08CP05 is backward compatible in functionality and footprint with STP8C/L596. Through an external resistor, users can adjust the STP08CP05 output current, controlling in this way the light intensity of LEDs, in addition, user can adjust LED’s brightness intensity from 0% to 100% via OE pin. SO-16 Features  Low voltage power supply down to 3 V  8 constant current output channels  Adjustable output current through external resistor  Serial data IN/parallel data OUT  3.3 V micro driver-able  Output current: 5-100 mA  30 MHz clock frequency  Available in high thermal efficiency TSSOP exposed pad The STP08CP05 guarantees a 20 V output driving capability, allowing users to connect more LEDs in series. The high clock frequency, 30 MHz, also satisfies the system requirement of high volume data transmission. The 3.3 V of voltage supply is useful for applications that interface with any micro from 3.3 V. Compared with a standard TSSOP package, the TSSOP exposed pad increases heat dissipation capability by a 2.5 factor.  ESD protection 2.5 kV HBM, 200 V MM Table 1. Device summary Order codes Package Packaging STP08CP05B1R DIP-16 25 parts per tube STP08CP05MTR SO-16 (Tape and reel) 2500 parts per reel STP08CP05TTR TSSOP16 (Tape and reel) 2500 parts per reel STP08CP05XTTR TSSOP16 exposed pad (Tape and reel) 2500 parts per reel August 2018 This is information on a product in full production. DocID13524 Rev 8 1/30 www.st.com Contents STP08CP05 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Truth table and timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.1 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 7.2 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2/30 DocID13524 Rev 8 STP08CP05 1 Summary description Summary description Table 2. Typical current accuracy Current accuracy Output voltage Output current Between bits Between ICs ± 1.5% ± 3% 1.3 V 1.1 20 to 100 mA Pin connection and description Figure 1. Connections diagram Note: The exposed pad should be electrically connected to a metal land electrically isolated or connected to ground. Table 3. Pin description Pin N° Symbol Name and function 1 GND Ground terminal 2 SDI Serial data input terminal 3 CLK Clock input terminal 4 LE Latch input terminal 5-12 OUT 0-7 13 OE 14 SDO 15 R-EXT 16 VDD Output terminal Output enable input terminal (active low) Serial data out terminal Constant current programming 5 V supply voltage terminal DocID13524 Rev 8 3/30 30 Block diagram 2 STP08CP05 Block diagram Figure 2. Block diagram 4/30 DocID13524 Rev 8 STP08CP05 3 Maximum rating Maximum rating Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 3.1 Absolute maximum ratings Table 4. Absolute maximum ratings Symbol 3.2 Parameter Value Unit 0 to 7 V VDD Supply voltage IGND VO Output voltage -0.5 to 20 V IO Output current 100 mA IGND GND terminal current 800 mA fCLK Clock frequency 50 MHz TOPR Operating temperature range -40 to +125 °C TSTG Storage temperature range -55 to +150 °C Thermal data Table 5. Thermal data Symbol Parameter RthJA Thermal resistance junction-ambient DIP-16 SO-16 TSSOP16 90 125 140 TSSOP16 (1) exposed pad Unit 37.5 °C/W 1. The exposed-pad should be soldered to the PBC to realize the thermal benefits DocID13524 Rev 8 5/30 30 Maximum rating 3.3 STP08CP05 Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Test conditions Min Typ Unit 5.5 V 20 V 100 mA VDD Supply voltage VO Output voltage IO Output current OUTn IOH Output current SERIAL-OUT +1 mA IOL Output current SERIAL-OUT -1 mA VIH Input voltage 0.7 VDD VDD+0.3 V VIL Input voltage -0.3 0.3 VDD V twLAT LE pulse width 20 ns twCLK CLK pulse width 20 ns twEN OE pulse width 200 ns 7 ns tHOLD(D) Hold time for DATA 4 ns tSETUP(L) Setup time for LATCH 15 ns tSETUP(D) Setup time for DATA fCLK Clock frequency 3.0 VDD = 3.0 to 5.0 V 5 Cascade operation (1) 1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully. 6/30 Max DocID13524 Rev 8 30 MHz STP08CP05 4 Electrical characteristics Electrical characteristics VDD = 3.3 V to 5 V, T = 25 °C, unless otherwise specified. Table 7. Electrical characteristics Symbol Parameter Test conditions Min Typ Max Unit VIH Input voltage high level 0.7 VDD VDD V VIL Input voltage low level GND 0.3VDD V IOH Output leakage current VOH = 20 V 0.5 10 A VOL Output voltage (Serial-OUT) IOL = 1 mA 0.03 0.4 V VOH Output voltage (Serial-OUT) IOH = -1 mA VOH - VDD =- 0.4 V V VO = 0.3 V, Rext = 3.9 k 4.25 5 5.75 VO = 0.3 V, Rext = 970  19.4 20 20.6 VO = 1.3 V, Rext = 190  97 100 103 VO = 0.3 VREXT = 3.9 k ±5 ±8 VO = 0.3 VREXT = 970  ± 1.5 ± 2.75 VO = 1.3 VREXT =190  ± 1.2 ± 2.5 150 300 600 K 100 200 400 K REXT = 980 OUT 0 to 7 = OFF 4 5 IDD(OFF2) REXT = 250 OUT 0 to 7 = OFF 11.2 13.5 IDD(ON1) REXT = 980 OUT 0 to 7 = ON 4.5 5 REXT = 250 OUT 0 to 7 = ON 11.7 13.5 IOL1 IOL2 Output current IOL3 IOL1 IOL2 IOL3 RSIN(up) Output current error between bit (All Output ON) Pull-up resistor RSIN(down) Pull-down resistor IDD(OFF1) mA % Supply current (OFF) mA Supply current (ON) IDD(ON2) Thermal Thermal protection (1) 170 °C 1. Guaranteed by design (not tested) The thermal protection switches OFF only the outputs DocID13524 Rev 8 7/30 30 Switching characteristics 5 STP08CP05 Switching characteristics VDD = 5 V, T = 25 °C, unless otherwise specified. Table 8. Switching characteristics Symbol Parameter Test conditions Min Typ Max VDD = 3.3 V 35 50 VDD = 5 V 18 28 tPLH1 Propagation delay time, CLK-OUTn, LE = H, OE = L Propagation delay time, LE -OUTn, OE = L VDD = 3.3 V 48 74 tPLH2 VDD = 5 V 30 50 Propagation delay time, OE -OUTn, LE = H VDD = 3.3 V 55 82 tPLH3 VDD = 5 V 37 58 Propagation delay time, CLK-SDO VDD = 3.3 V 21 28 tPLH VDD = 5 V 17 22 Propagation delay time, CLK-OUTn, LE = H, OE = L VDD = 3.3 V 11 17 tPHL1 VDD = 5 V 7 11 Propagation delay time, LE -OUTn, OE = L VDD = 3.3 V 24 40 tPHL2 VDD = 5 V 21 31 Propagation delay time, OE -OUTn, LE = H VDD = 3.3 V 20 35 tPHL3 VDD = 5 V 18 28 Propagation delay time, CLK-SDO VDD = 3.3 V 24 32 tPHL VDD = 5 V 19 25 Output fall time 10~90% of voltage waveform VDD = 3.3 V 26 40 tON VDD = 5 V 11 17 Output rise time 90~10% of voltage waveform VDD = 3.3 V 5 10 tOFF VDD = 5 V 4 8 tr tf ns ns ns VDD = 3.3 V VIL = GND IO = 20 mA REXT = 1 K VIH = VDD CL = 10 pF VL = 3.0 V RL = 60  ns ns ns ns ns (1) 1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully. 8/30 ns ns CLK rise time (1) CLK fall time Unit DocID13524 Rev 8 5000 ns 5000 ns STP08CP05 6 Equivalent circuit and outputs Equivalent circuit and outputs Figure 3. OE terminal Figure 4. LE terminal Figure 5. CLK, SDI terminal DocID13524 Rev 8 9/30 30 Equivalent circuit and outputs STP08CP05 Figure 6. SDO terminal 10/30 DocID13524 Rev 8 STP08CP05 Truth table and timing diagram 7 Truth table and timing diagram 7.1 Truth table Table 9. Truth table Clock LE OE SDI OUT0 ........ OUT0 ........ OUT7 SDO H L Dn Dn ..... Dn -5 ..... Dn -7 Dn -7 L L Dn + 1 No change Dn -7 H L Dn + 2 Dn +2 ..... Dn -3 ..... Dn -5 Dn -5 X L Dn + 3 Dn +2 ..... Dn -3 ..... Dn -5 Dn -5 X H Dn + 3 OFF Dn -5 Note: OUT0 to OUT7 = ON when Dn = H; OUT0 to OUT7 = OFF when Dn = L. 7.2 Timing diagram Figure 7. Timing diagram DocID13524 Rev 8 11/30 30 Truth table and timing diagram STP08CP05 Figure 8. Clock, serial-in, serial-out Figure 9. Clock, serial-in, latch, enable, outputs 12/30 DocID13524 Rev 8 STP08CP05 Truth table and timing diagram Figure 10. Outputs DocID13524 Rev 8 13/30 30 Typical characteristics 8 STP08CP05 Typical characteristics Figure 11. Output current-REXT resistor TA = 25 °C, Iset = 3 mA; 5 mA; 10 mA; 20 mA; 50 mA; 80 mA; Max Table 10. Output current-REXT resistor Note: 14/30 Output current (mA) 3 5 10 20 50 80 130 Rext () 6740 3930 1913 963 386 241 124 Maximum output current capabilities setting was 130 mA applying an Rext = 124  DocID13524 Rev 8 STP08CP05 Typical characteristics Figure 12. ISET vs. drop out voltage (VDROP) Minimum Vdrop Characteristics 910 810 Vdrop (mV) 710 610 Vdd 5.0V Vdd 3.0V 510 410 310 210 110 10 0 10 20 30 40 50 60 70 80 90 100 110 Iset (mA) Table 11. ISET vs drop out voltage (VDROP) Vdd Iset Rext Vdrop AVG (mA) () Vdrop min (mV) Vdrop max (V) (mV) (mV) 3 6470 30.6 31.2 30.93 5 3930 46.5 52.9 48.63 10 1910 80.9 100 82.26 20 963 150 161 157 50 386 392 396 394.3 80 241 636 646 640.3 100 192 846 850 848 3 6470 25.6 29 26.96 5 3930 40.8 41.7 41.16 10 1910 80.1 105 89.2 20 963 153 154 154 50 386 379 386 382 80 241 618 626 621 100 192 825 830 827 3 5 DocID13524 Rev 8 15/30 30 Typical characteristics STP08CP05 Figure 13. Power dissipation vs temperature package Note: The exposed-pad should be soldered to the PBC to realize the thermal benefits. % Figure 14. Current precision between outputs vs output current 6 5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 1 10 Iset (mA) 16/30 DocID13524 Rev 8 100 STP08CP05 9 Test circuit Test circuit Figure 15. DC characteristics Figure 16. AC characteristics DocID13524 Rev 8 17/30 30 Package mechanical data 10 STP08CP05 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 18/30 DocID13524 Rev 8 STP08CP05 Package mechanical data Table 12. DIP-16 mechanical data mm Dim. Min. a1 0.51 B 0.77 Typ. Max. 1.65 b 0.5 b1 0.25 D 20 E 8.5 e 2.54 e3 17.78 F 7.1 I 5.1 L 3.3 Z 1.27 Figure 17. DIP-16 drawing DocID13524 Rev 8 19/30 30 Package mechanical data STP08CP05 Table 13. TSSOP16 exposed pad mechanical data mm Dim. Min. Max. A 1.20 A1 0.15 A2 0.80 b 0.19 0.30 c 0.09 0.20 D 4.90 D1 1.00 5.00 1.05 5.10 3.00 E 6.20 6.40 6.60 E1 4.30 4.40 4.50 E2 3.00 e 0.65 L 0.45 L1 k 0.60 0.75 1.00 0.00 aaa 20/30 Typ. 8.00 0.10 DocID13524 Rev 8 STP08CP05 Package mechanical data Figure 18. TSSOP16 exposed pad drawing  DocID13524 Rev 8 21/30 30 Package mechanical data STP08CP05 Table 14. TSSOP16 mechanical data mm Dim. Min. Typ. A 1.20 A1 0.05 A2 0.80 b 0.19 0.30 c 0.09 0.20 D 4.90 5.00 5.10 E 6.20 6.40 6.60 E1 4.30 4.40 4.50 e L k 0.15 1.00 1.05 0.65 0.45 L1 0.60 0.75 1.00 0 aaa 22/30 Max. 8 0.10 DocID13524 Rev 8 STP08CP05 Package mechanical data Figure 19. TSSOP16 mechanical drawing L D % 5'#6+0) 2.#0' & - - 
NN ("(&
1-"/& & " "  CCC % %  F C "  1*/

*%&/5*'*$"5*0/ DocID13524 Rev 8   23/30 30 Package mechanical data STP08CP05 Table 15. SO-16 dimensions mm Dim. Min. Typ. A 1.75 A1 0.10 0.25 A2 1.25 b 0.31 0.51 c 0.17 0.25 D 9.80 9.90 10.00 E 5.80 6.00 6.20 E1 3.80 3.90 4.00 e 1.27 h 0.25 0.50 L 0.40 1.27 k 0 8° ccc 24/30 Max. 0.10 DocID13524 Rev 8 STP08CP05 Package mechanical data Figure 20. SO-16 package drawing 0016020_F DocID13524 Rev 8 25/30 30 Package mechanical data STP08CP05 Figure 21. SO-16 recommended footprint (dimensions are in mm) 26/30 DocID13524 Rev 8 STP08CP05 11 Packaging mechanical data Packaging mechanical data Table 16. TSSOP16 exposed pad and TSSOP16 tape and reel mechanical data mm Dim. Min. A Typ. Max. 330 C 12.8 D 20.2 N 60 T 13.2 22.4 Ao 6.7 6.9 Bo 5.3 5.5 Ko 1.6 1.8 Po 3.9 4.1 P 7.9 8.1 DocID13524 Rev 8 27/30 30 Packaging mechanical data STP08CP05 Figure 22. Tape and reel for TSSOP16 exposed pad and TSSOP16 28/30 DocID13524 Rev 8 STP08CP05 12 Revision history Revision history Table 17. Document revision history Date Revision 23-May-2007 1 First release 28-Jun-2007 2 Updated Table 7 on page 7 12-Mar-2008 3 Updated Table 8 on page 8 and added Figure 11 and Figure 12 on page 15 07-Aug-2008 4 Updated Section 8: Typical characteristics on page 14 27-Aug-2010 5 Updated Note: on page 3 10-Jul-2013 6 Updated Section 10: Package mechanical data, Figure 3: OE terminal and Figure 4: LE terminal Added Section 11: Packaging mechanical data 28-Jun-2018 7 Updated: Table 14: TSSOP16 mechanical data and Figure 20: TSSOP16 mechanical drawing 8 Updated: Figure 7: Timing diagram, Figure 8: Clock, serialin, serial-out, Figure 9: Clock, serial-in, latch, enable, outputs, Figure 10: Outputs, Figure 15: DC characteristics and Figure 16: AC characteristics. Minor text changes. 29-Aug-2018 Changes DocID13524 Rev 8 29/30 30 STP08CP05 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved 30/30 DocID13524 Rev 8