STP11NM50N

STP11NM50N N-channel 500 V, 0.40 Ω typ., 8.5 A MDmesh™ II Power MOSFET in a TO-220 package Datasheet - obsolete product Features 7$% Order code VDS @ TJ max RDS(on) max ID STP11NM50N 550 V 0.47 Ω 8.5 A ) s ( ct • 100% avalanche tested • Low input capacitance and gate charge    u d o • Low gate input resistance r P e Applications 72 t e l Description o s b -O • Switching applications Figure 1. Internal schematic diagram '7$% u d o * r P e let o s b ) s ( ct This device is an N-channel Power MOSFET developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. 6 O 6& Table 1. Device summary Order code Marking Package Packaging STP11NM50N 11NM50N TO-220 Tube November 2015 This is information on a discontinued product. DocID17156 Rev 4 1/13 www.st.com Contents STP11NM50N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 2/13 DocID17156 Rev 4 STP11NM50N 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 500 V VGS Gate-source voltage ± 25 V ID Drain current (continuous) at TC = 25 °C 8.5 A ID Drain current (continuous) at TC = 100 °C 6 A Drain current (pulsed) 34 A Total dissipation at TC = 25 °C 70 Peak diode recovery voltage slope 15 IDM (1) PTOT dv/dt (2) Tstg u d o Storage temperature Tj ) s ( ct - 55 to 150 Max. operating junction temperature 1. Pulse width limited by safe operating area . e t e ol 2. ISD ≤ 8.5 A, di/dt ≤ 400 A/µs, VDSpeak ≤ V(BR)DSS, VDD = 80% V(BR)DSS Pr s b O W V/ns °C 150 °C Value Unit 1.79 °C/W 62.5 °C/W Table 3. Thermal data Symbol Parameter )- Rthj-case Thermal resistance junction-case max t(s Rthj-amb Thermal resistance junction-ambient max o r P Symbol e t e ol IAR s b O EAS c u d Table 4. Avalanche characteristics Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting TJ=25 °C, ID=IAR, VDD=50 V) DocID17156 Rev 4 Value Unit 3 A 150 mJ 3/13 13 Electrical characteristics 2 STP11NM50N Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 5. On/off states Symbol Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 IDSS Zero gate voltage drain current (VGS = 0) VDS = 500 V VDS = 500 V, TC= 125 °C IGSS Gate-body leakage current (VDS = 0) VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 4.5 A V(BR)DSS e t e ol Min. Typ. Max. Unit 500 V Pr 3 µA µA ±100 µA 4 V 0.47 Ω ) s ( ct u d o 2 1 100 0.40 Table 6. Dynamic Symbol Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq. (1) Equivalent output capacitance Qg Total gate charge O 4/13 ct u d o Qgs Gate-source charge Qgd Gate-drain charge RG Gate input resistance s b O Test conditions ) (s r P e let o s b Parameter VDS = 50 V, f = 1 MHz, VGS = 0 VGS = 0, VDS = 0 to 400 V VDD = 400 V, ID = 8.5 A, VGS = 10 V (see Figure 14) f=1 MHz, ID=0 Min. Typ. Max. Unit - 547 - pF - 42 - pF - 2 - pF - 210 - pF - 19 - nC - 3.7 - nC - 10 - nC - 5.8 - Ω 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS DocID17156 Rev 4 STP11NM50N Electrical characteristics Table 7. Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Min. Typ. - 8 - ns - 10 - ns - 33 - ns - 10 - ns Turn-on delay time VDD = 250 V, ID = 4.25 A RG = 4.7 Ω VGS = 10 V (see Figure 15 and Figure 18) Rise time Turn-off delay time Fall time Table 8. Source drain diode Symbol Parameter Test conditions ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ) s ( ct Typ. Max. Unit u d o - ISD = 8.5 A, VGS = 0 trr Min. r P e ISD = 8.5 A, di/dt = 100 A/µs VDD = 60 V (see Figure 15) o s b let ISD = 8.5 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 15) O ) Max. Unit - 8.5 34 A A 1.5 V - 230 ns - 2.1 µC - 18 A - 275 ns - 2.5 µC - 18 A s ( t c 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% u d o r P e t e l o s b O DocID17156 Rev 4 5/13 13 Electrical characteristics 2.1 STP11NM50N Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance $0Y ,' $ 2 /L SHU P DW LWH LR G QL E\ Q P WKL D[ VD  5 UH D LV  ' 6 RQ  —V  —V PV PV ) s ( ct 7M ƒ& 7F ƒ&  6LQJOH SXOVH     u d o 9'69  Figure 4. Output characteristics t e l o $0Y ,' $ ,' $ 9*6 9   O )  uc   od   e t e ol Pr    bs O 9'6      9'' 9 ,' $   9'69 $0Y 9'69       9*69 $0Y 2KP    5'6RQ    Figure 7. Static drain-source on resistance   9*6 9         6/13      9 Figure 6. Gate charge vs gate-source voltage 9*6 9  t(s  9'6 9  9  $0Y bs    r P e Figure 5. Transfer characteristics        4JQ&      DocID17156 Rev 4     ,'$ STP11NM50N Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy $0Y & S) $0Y (RVV —-    &LVV    I 0+] &RVV          9'69 Figure 10. Normalized gate threshold voltage vs temperature QRUP QRUP ,' —$ e t e ol    ) (s     u d o Pr      9'69 Pr $0Y ,' $ 9'6 9 s b O ct    u d o 5'6RQ     Figure 11. Normalized on-resistance vs temperature $0Y 9*6WK ) s ( ct  &UVV   7-ƒ&         7-ƒ& Figure 12. Normalized V(BR)DSS vs temperature e t e l 9%5'66 QRUP $0Y ,' P$ o s b  O               7-ƒ& DocID17156 Rev 4 7/13 13 Test circuits 3 STP11NM50N Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior 9'' 9 VGS μF VDD ,* &2167 VD 9L 9 9*0$; RG  —) D.U.T. ȍ Nȍ AM01468v1 e t e ol Figure 15. Test circuit for inductive load switching and diode recovery times A c u d D.U.T. FAST DIODE A B B S )- L=100μH s ( t c 3.3 μF B 25 Ω D G 1000 μF S r P e t e l o s b O 2200 μF 3.3 μF Vi D.U.T. Pw AM01471v1 AM01470v1 Figure 18. Switching time waveform 9%5'66 WRQ 9' WGRQ WRII WU WGRII     ,' 9'' $0Y 8/13 WI  ,'0 9'' VDD ID Figure 17. Unclamped inductive waveform s b O $0Y L VD VDD u d o RG o r P Figure 16. Unclamped inductive load test circuit D G ) s ( t 9* Nȍ 3: '87 Nȍ PW A Nȍ Q) 3.3 μF 2200 RL Nȍ 9*6  DocID17156 Rev 4  9'6  $0Y STP11NM50N 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O DocID17156 Rev 4 9/13 13 Package information 4.1 STP11NM50N TO-220 type A package information Figure 19. TO-220 type A package outline ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O BW\SH$B5HYB7 10/13 DocID17156 Rev 4 STP11NM50N Package information Table 9. TO-220 type A mechanical data mm Dim. Min. Typ. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 ) s ( ct 1.27 E 10 e 2.40 e1 4.95 F 1.23 H1 6.20 J1 2.40 L 13 L1 3.50 10.40 du 2.70 L30 )- 3.75 du Q s b O s ( t c øP ete ol L20 e t e ol Max. 2.65 o r P 5.15 1.32 6.60 2.72 14 3.93 16.40 28.90 3.85 2.95 o r P s b O DocID17156 Rev 4 11/13 13 Revision history 5 STP11NM50N Revision history Table 10. Document revision history Date Revision Changes 22-Feb-2010 1 First release. 26-Apr-2010 2 Updated Table 8: Source drain diode. 24-Nov-2010 3 New value inserted in Table 6: Dynamic. 24-Nov-2015 4 The part numbers STD11NM50N and STF11NM50N have been moved to separate datasheets ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 12/13 DocID17156 Rev 4 STP11NM50N ) s ( ct u d o r P e t e l o ) (s s b O t c u IMPORTANT NOTICE – PLEASE READ CAREFULLY d o r STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. P e t e l o s b O Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID17156 Rev 4 13/13 13