STP14NF12FP

STP14NF12 STP14NF12FP N-CHANNEL 120V - 0.16Ω - 14A TO-220/TO-220FP LOW GATE CHARGE STripFET™ POWER MOSFET TYPE STP14NF12 STP14NF12FP s s s VDSS 120 V 120 V RDS(on) < 0.18 Ω < 0.18 Ω ID 14 A 14 A TYPICAL RDS(on) = 0.16Ω EXCEPTIONAL dv/dt CAPABILITY APPLICATION ORIENTED CHARACTERIZATION TO-220 3 1 2 1 3 2 TO-220FP DESCRIPTION This Power MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and Computer application. It is also intended for any application with low gate charge drive requirements INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH-EFFICIENCY DC-DC CONVERTERS s UPS AND MOTOR CONTROL s ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM ( ) PTOT dv/dt (1) EAS (2) VISO Tj Tstg Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Insulation Withstand Voltage (DC) Operating Junction Temperature Storage Temperature -55 to 175 (1) ISD ≤14A, di/dt ≤ 300A/µs, VDD ≤ V(BR)DSS, Tj ≤ T JMAX. (2) Starting Tj = 25°C, ID = 14A, VDD = 50V Value STP14NF12 120 120 ±20 14 9 56 60 0.4 9 60 2500 8.5 6 34 25 0.17 STP14NF12FP Unit V V V A A A W W/°C V/ns mJ V °C (q ) Pulse width limited by safe operating area August 2002 1/9 STP14NF12/STP14NF12FP THERMAL DATA TO-220 Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 2.5 62.5 300 TO-220FP 6 °C/W °C/W °C ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ±20V Min. 120 1 10 ±100 Typ. Max. Unit V µA µA nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250µA VGS = 10V, ID = 7 A Min. 2 Typ. 3 0.16 Max. 4 0.18 Unit V Ω DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15V , ID = 7 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 4 460 70 30 Max. Unit S pF pF pF 2/9 STP14NF12/STP14NF12FP ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 50 V, ID = 7 A RG = 4.7Ω VGS = 10V (Resistive Load, see Figure 3) VDD = 80 V, ID = 14 A, VGS = 10V Min. Typ. 16 25 15.5 3.7 4.7 21 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions VDD = 50 V, ID = 7 A, RG = 4.7Ω, VGS = 10V (Resistive Load, see Figure 3) Min. Typ. 32 8 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 14 A, VGS = 0 ISD = 14 A, di/dt = 100A/µs, VDD = 50 V, Tj = 150°C (see test circuit, Figure 5) 92 230 5 Test Conditions Min. Typ. Max. 14 56 1.5 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area For TO-220 Safe Operating Area For TO-220FP 3/9 STP14NF12/STP14NF12FP Thermal Impedance For TO-220 Thermal Impedance For TO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP14NF12/STP14NF12FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature 5/9 STP14NF12/STP14NF12FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP14NF12/STP14NF12FP TO-220 MECHANICAL DATA DIM. A C D E F F1 F2 G G1 H2 L2 L3 L4 L5 L6 L7 L9 DIA 13 2.65 15.25 6.20 3.50 3.75 mm. MIN. 4.40 1.23 2.40 0.49 0.61 1.14 1.14 4.95 2.40 10 16.40 28.90 14 2.95 15.75 6.60 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 TYP MAX. 4.60 1.32 2.72 0.70 0.88 1.70 1.70 5.15 2.70 10.40 MIN. 0.173 0.048 0.094 0.019 0.024 0.044 0.044 0.194 0.094 0.393 0.645 1.137 0.551 0.116 0.620 0.259 0.154 0.151 inch TYP. MAX. 0.181 0.051 0.107 0.027 0.034 0.066 0.066 0.202 0.106 0.409 1 7/9 STP14NF12/STP14NF12FP TO-220FP MECHANICAL DATA mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409 DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 Ø A B L3 L6 L7 F1 F D G1 H F2 L2 L5 E 123 L4 8/9 G STP14NF12/STP14NF12FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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