STP18N60DM2

STP18N60DM2 N-channel 600 V, 0.260 Ω typ., 12 A MDmesh™ DM2 Power MOSFET in a TO-220 package Datasheet - production data Features • • • • • • Figure 1: Internal schematic diagram Order code VDS RDS(on) max. ID STP18N60DM2 600 V 0.295 Ω 12 A Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications D(2, TAB) • Switching applications Description This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. G(1) S(3) AM15572v1_tab Table 1: Device summary Order code Marking Package Packing STP18N60DM2 18N60DM2 TO-220 Tube May 2015 DocID027674 Rev 2 This is information on a product in full production. 1/13 www.st.com Contents STP18N60DM2 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 5 2/13 TO-220 type A package information................................................ 10 Revision history ............................................................................ 12 DocID027674 Rev 2 STP18N60DM2 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol VGS ID (1) IDM PTOT Parameter Gate-source voltage Value Unit ± 25 V Drain current (continuous) at Tcase = 25 °C 12 Drain current (continuous) at Tcase= 100 °C 7.6 Drain current (pulsed) 48 A W Total dissipation at Tcase = 25 °C 90 dv/dt (2) Peak diode recovery voltage slope 40 dv/dt (3) MOSFET dv/dt ruggedness 50 Tstg Tj Storage temperature Maximum junction temperature –55 to 150 150 A V/ns °C Notes: (1) Pulse width is limited by safe operating area. (2) ISD ≤ 12 A, di/dt ≤ 400 A/µs, VDS(peak) < V(BR)DSS, VDD = 80% V(BR)DSS. (3) VDS ≤ 480 V. Table 3: Thermal data Symbol Parameter Value Rthj-case Thermal resistance junction-case 1.39 Rthj-amb Thermal resistance junction-ambient 62.5 Unit °C/W Table 4: Avalanche characteristics Symbol (1) IAR (2) EAR Parameter Value Unit Avalanche current, repetitive or not repetitive 2.5 A Single pulse avalanche energy 380 mJ Notes: (1) (2) Pulse width is limited by Tjmax. starting Tj = 25 °C, ID = IAR, VDD = 50 V. DocID027674 Rev 2 3/13 Electrical characteristics 2 STP18N60DM2 Electrical characteristics (Tcase= 25 °C unless otherwise specified) Table 5: Static Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions VGS = 0 V, ID = 1 mA Min. Typ. Max. 600 Uni t V VGS = 0 V, VDS = 600 V 1.5 VGS = 0 V, VDS = 600 V, Tcase = 125 °C 100 Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 6 A 0.260 0.295 Ω Min. Typ. Max. Unit - 800 - - 40 - - 1.33 - IDSS Zero gate voltage drain current IGSS 3 µA Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V pF Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 80 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 5.6 - Ω Qg Total gate charge - 20 - Qgs Gate-source charge - 5.2 - Qgd Gate-drain charge - 8.5 - Coss eq. (1) VDD = 480 V, ID = 12 A, VGS = 10 V (see Figure 14: "Gate charge test circuit") nC Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol td(on) tr td(off) tf 4/13 Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions Min. Typ. Max. VDD = 300 V, ID = 6 A RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Switching times test circuit for resistive load" and Figure 18: "Switching time waveform") - 13.5 - - 8 - - 9.5 - - 32.5 - DocID027674 Rev 2 Unit ns STP18N60DM2 Electrical characteristics Table 8: Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 12 A (1) Source-drain current (pulsed) - 48 A (2) Forward on voltage - 1.6 V ISDM VSD trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current VGS = 0 V, ISD = 12 A ISD = 12 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 15: "Test circuit for inductive load switching and diode recovery times") ISD = 12 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 125 ns - 680 nC - 11 A - 190 ns - 1200 nC - 13 A Notes: (1) (2) Pulse width is limited by safe operating area Pulse test: pulse duration = 300 µs, duty cycle 1.5% DocID027674 Rev 2 5/13 Electrical characteristics 2.1 6/13 STP18N60DM2 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID027674 Rev 2 STP18N60DM2 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics DocID027674 Rev 2 7/13 Test circuits 3 STP18N60DM2 Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit VDD 47 k Ω 12 V 1 kΩ 100 nF I G = CONST Vi ≤ V GS 100 Ω D.U.T. 2.7 k Ω 2200 μ F VG 47 k Ω 1 kΩ PW AM01469v 1 Figure 15: Test circuit for inductive load switching and diode recovery times A A D.U.T. FAST DIODE B B Figure 16: Unclamped inductive load test circuit A D G S 25 Ω L=100 µH 3.3 µF B 1000 µF D G RG VDD D.U.T. S AM01470v1 Figure 18: Switching time waveform Figure 17: Unclamped inductive waveform t on V(BR)DSS t d(on) toff tr t d(off) tf VD 90% 90% I DM 10% 0 ID VDD VDD AM01472v 1 8/13 10% VGS 0 DocID027674 Rev 2 10% VDS 90% AM01473v 1 STP18N60DM2 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. DocID027674 Rev 2 9/13 Package information 4.1 STP18N60DM2 TO-220 type A package information Figure 19: TO-220 type A package outline 10/13 DocID027674 Rev 2 STP18N60DM2 Package information Table 9: TO-220 type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95 DocID027674 Rev 2 11/13 Revision history 5 STP18N60DM2 Revision history Table 10: Document revision history Date Revision 01-Apr-2015 1 First release. 2 Text edits throughout document In Section 2.1 Electrical characteristics (curves): - updated Figure 4: Output characteristics - updated Figure 5: Transfer characteristics 21-May-2015 12/13 Changes DocID027674 Rev 2 STP18N60DM2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID027674 Rev 2 13/13