STP35NF10

STP35NF10 STB35NF10 N-CHANNEL 100V - 0.030Ω - 40A TO-220 / D2PAK LOW GATE CHARGE STripFET™ POWER MOSFET TYPE STP35NF10 STB35NF10 s s s s VDSS 100 V 100 V RDS(on) < 0.035 Ω < 0.035 Ω ID 40 A 40 A TYPICAL RDS(on) = 0.030Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION TO-220 3 3 1 2 1 D2PAK DESCRIPTION This Power Mosfet series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and Computer application. It is also intended for any application with low gate charge drive requirements. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH-EFFICIENCY DC-DC CONVERTERS s UPS AND MOTOR CONTROL s ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM ( ) PTOT dv/dt (1) EAS (2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Operating Junction Temperature Value 100 100 ±20 40 28 160 115 0.77 13 300 – 55 to 175 (1) ISD ≤35A, di/dt ≤ 300A/µs, VDD ≤ V(BR)DSS, Tj ≤ T JMAX. (2) Starting Tj = 25°C, ID = 20A, VDD = 80V Unit V V V A A A W W/°C V/ns mJ °C (q ) Pulse width limited by safe operating area April 2003 1/10 STP35NF10 - STB35NF10 THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1.30 62.5 300 °C/W °C/W °C ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ±20V Min. 100 1 10 ±100 Typ. Max. Unit V µA µA nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250µA VGS = 10V, ID = 17.5 A Min. 2 Typ. 3 0.030 Max. 4 0.035 Unit V Ω DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15V , ID = 17.5 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 20 1550 220 95 Max. Unit S pF pF pF 2/10 STP35NF10 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 50V, ID = 17.5 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 80V, ID =35A,VGS = 10V Min. Typ. 17 60 55 12 20 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions VDD = 50V, ID = 17.5 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) Min. Typ. 60 15 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 35 A, VGS = 0 ISD = 35 A, di/dt = 100A/µs, VDD = 25V, Tj = 150°C (see test circuit, Figure 5) 160 720 9 Test Conditions Min. Typ. Max. 40 160 1.5 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/10 STP35NF10 - STB35NF10 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/10 STP35NF10 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/10 STP35NF10 - STB35NF10 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/10 STP35NF10 TO-220 MECHANICAL DATA mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154 DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 øP Q 7/10 STP35NF10 - STB35NF10 D2PAK MECHANICAL DATA mm. DIM. MIN. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2 0º 4.88 15 1.27 1.4 2.4 0.4 8º 10 8.5 5.28 15.85 1.4 1.75 3.2 0.192 0.590 0.050 0.055 0.094 0.015 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10.4 0.393 0.334 0.208 0.625 0.055 0.068 0.126 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 MIN. 0.173 0.098 0.001 0.027 0.044 0.017 0.048 0.352 0.315 TYP. MAX. 0.181 0.106 0.009 0.036 0.067 0.023 0.053 0.368 inch 8/10 3 1 STP35NF10 D PAK FOOTPRINT 2 TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* REEL MECHANICAL DATA DIM. A B C D G N T 1.5 12.8 20.2 24.4 100 30.4 26.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0795 0.960 1.039 3.937 1.197 BULK QTY 1000 inch MIN. MAX. 12.992 TAPE MECHANICAL DATA DIM. A0 B0 D D1 E F K0 P0 P1 P2 R T W mm MIN. 10.5 15.7 1.5 1.59 1.65 11.4 4.8 3.9 11.9 1.9 50 0.25 23.7 24.3 MAX. 10.7 15.9 1.6 1.61 1.85 11.6 5.0 4.1 12.1 2.1 inch MIN. MAX. 0.413 0.421 0.618 0.626 0.059 0.063 0.062 0.063 0.065 0.073 0.449 0.456 0.189 0.197 0.153 0.161 0.468 0.476 0.075 0.082 1.574 0.35 0.0098 0.0137 0.933 0.956 BASE QTY 1000 * on sales type 9/10 STP35NF10 - STB35NF10 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 10/10