STP38N06
N - CHANNEL ENHANCEMENT MODE ”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR
PRELIMINARY DATA TYPE ST P38N06
s s s s s s s s
V DSS 60 V
R DS(on) < 0.03 Ω
ID 38 A (*)
TYPICAL RDS(on) = 0.026 Ω AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100oC HIGH CURRENT CAPABILITY 175oC OPERATING TEMPERATURE HIGH dV/dt RUGGEDNESS APPLICATION ORIENTED CHARACTERIZATION
1
2
3
TO-220
APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s POWER MOTOR CONTROL s DC-DC & DC-AC CONVERTERS s SYNCRONOUS RECTIFICATION INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol V DS VDGR V GS ID ID I DM ( • ) P t ot dV/dt(1 ) T stg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 25 C Drain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipation at T c = 25 C Derating Factor Peak Diode Recovery voltage slope St orage Temperature Max. Operating Junction Temperature
o o o
Value 60 60 ± 20 38 26 152 90 0.6 7 -65 to 175 175
Uni t V V V A A A W W/ o C V/ ns
o o
C C
(•) Pulse width limited by safe operating area
March 1996
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STP38N06
THERMAL DATA
R t hj-ca se R t hj- amb R thc- si nk Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead T emperature For Soldering Purpose Max Max Typ 1.66 62.5 0.5 300
o o
C/W C/W o C/W o C
AVALANCHE CHARACTERISTICS
Symb ol I AR E AS E AR I AR Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ < 1%) Single Pulse Avalanche Energy o (starting Tj = 25 C, ID = I AR , V DD = 25 V) Repetitive Avalanche Energy (pulse width limited by Tj max, δ < 1%) Avalanche Current, Repetitive or Not-Repetitive o (T c = 100 C, pulse width limited by Tj max, δ < 1%) Max Valu e 38 300 75 26 Unit A mJ mJ A
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symb ol V (BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Cond ition s I D = 250 µA VGS = 0 Min. 60 250 1000 ± 100 Typ . Max. Un it V µA µA nA
Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating x 0.8 T c = 125 o C Gate-body Leakage Current (V DS = 0) V GS = ± 2 0 V
ON (∗)
Symb ol V GS(th) R DS( on) ID(o n) Parameter Gate T hreshold Voltage V DS = VGS Static Drain-source On Resistance On State Drain Current V GS = 10V V GS = 10V Test Cond ition s ID = 250 µ A I D = 19 A ID = 19 A T c = 100 o C 38 Min. 2 Typ . 3 0.026 Max. 4 0.03 0.06 Un it V Ω Ω A
V DS > I D(on) x R DS(on) max V GS = 10 V
DYNAMIC
Symb ol g fs ( ∗ ) C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Cond ition s V DS > I D(on) x R DS(on) max V DS = 25 V f = 1 MHz I D = 19 A VGS = 0 Min. 14 Typ . 19 2000 350 80 2800 450 120 Max. Un it S pF pF pF
2/11
STP38N06
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symb ol t d(on) tr (di/dt) on Parameter Turn-on T ime Rise Time Turn-on Current Slope Test Cond ition s V DD = 30 V ID = 19 A VGS = 10 V R G = 50 Ω (see test circuit, figure 3) V DD = 48 V ID = 38 A R G = 50 Ω V GS = 10 V (see test circuit, figure 5) V DD = 40 V ID = 38 A V GS = 10 V Min. Typ . 45 280 240 Max. 65 380 Un it ns ns A/ µ s
Qg Q gs Q gd
Total Gate Charge Gate-Source Charge Gate-Drain Charge
60 10 20
80
nC nC nC
SWITCHING OFF
Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall T ime Cross-over T ime Test Cond ition s V DD = 48 V I D = 38 A R G = 50 Ω VGS = 10 V (see test circuit, figure 5) Min. Typ . 65 140 230 Max. 85 180 300 Un it ns ns ns
SOURCE DRAIN DIODE
Symb ol I SD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward O n Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 38 A V GS = 0 85 0.3 7 I SD = 38 A di/dt = 100 A/µ s o Tj = 150 C V DD = 40 V (see test circuit, figure 5) Test Cond ition s Min. Typ . Max. 38 152 1.5 Un it A A V ns µC A
( ∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( •) Pulse width limited by safe operating area ( 1) ISD ≤ 20 A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
Safe Operating Area
Thermal Impedance
3/11
STP38N06
Derating Curve Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
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STP38N06
Capacitance Variations Normalized Gate Threshold Voltage vs Temperature
Normalized On Resistance vs Temperature
Turn-on Current Slope
Turn-off Drain-source Voltage Slope
Cross-over Time
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STP38N06
Switching Safe Operating Area Accidental Overload Area
Source-drain Diode Forward Characteristics
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
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STP38N06
Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And DIode Recovery Times
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STP38N06
PSPICE PARAMETERS SUBCIRCUIT COMPONENTS
Symb ol S1 S2 LD LG LS RDRAIN RG ATE CG D CGS ALFA RG N Parameter (V14_16
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